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05/18/1993
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07872015
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04/22/1992
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03/15/1994
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07931095
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08/14/1992
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09/27/1994
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07941412
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09/08/1992
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11/09/1993
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09/09/1992
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10/25/1994
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09/11/1992
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12/20/1994
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09/11/1992
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05/17/1994
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09/11/1992
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02/08/1994
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07945206
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09/15/1992
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METHOD AND APPARATUS FOR PROVIDING A FASTER ONES VOLTAGE LEVEL RESTORE OPERATION IN A DRAM
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06/08/1993
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07946196
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09/16/1992
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07/20/1993
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07947942
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09/21/1992
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10/26/1993
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09/21/1992
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06/08/1993
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07950812
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09/24/1992
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08/16/1994
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07954743
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09/30/1992
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04/26/1994
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07954977
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09/30/1992
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09/21/1993
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01/22/1993
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09/20/1994
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08046246
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04/13/1993
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METHOD AND APPARATUS FOR TESTING INTEGRATED CIRCUITS
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11/15/1994
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08055080
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04/29/1993
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05/12/1998
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08085508
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06/30/1993
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12/03/1996
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08096684
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07/23/1993
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10/24/1995
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08099936
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07/29/1993
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05/25/1999
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10/20/1993
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01/03/1995
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08161506
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12/02/1993
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SITU STRINGER REMOVAL DURING POLYSILICON CAPACITOR CELL PLATE DELINEATION
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12/26/1995
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08161720
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12/03/1993
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UNITARY WAFER PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION HOLDING DEVICE
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03/21/1995
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08166585
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12/13/1993
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RAM ROW DECODE CIRCUITRY THAT UTILIZES A PRECHARGE CIRCUIT THAT IS DEACTIVATED BY A FEEDBACK FROM AN ACTIVATED WORD LINE DRIVER
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12/05/1995
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08167531
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12/14/1993
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TAB TAPE
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01/30/1996
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08171554
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12/21/1993
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01/24/1995
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08171865
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12/22/1993
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Title:
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PROGRAMMABLE LOGIC DEVICE MACROCELL WITH AN EXCLUSIVE FEEDBACK AND AN EXCLUSIVE EXTERNAL INPUT LINE FOR A COMBINATORIAL MODE AND ACCOMMODATING TWO SEPARATE PROGRAMMABLE OR PLANES
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08/08/2000
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12/22/1993
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METHOD AND DEVICE FOR ACQUIRING REDUNDANCY INFORMATION FROM A PACKAGED MEMORY CHIP
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10/22/1996
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08172853
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12/22/1993
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DATA COMPARING SENSE AMPLIFIER
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11/10/1998
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08172854
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12/22/1993
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11/19/1996
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08173197
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12/22/1993
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02/13/1996
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08174139
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12/28/1993
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08/06/1996
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12/29/1993
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CRITICAL PATH PREDICTION FOR DESIGN OF CIRCUITS
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10/25/1994
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08175481
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12/30/1993
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06/11/1996
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08175599
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12/30/1993
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METHOD AND CIRCUITRY FOR ENABLING AND PERMANENTLY DISABLING TEST MODE ACCESS IN A FLASH MEMORY DEVICE
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06/13/1995
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12/30/1993
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07/18/2000
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02/03/1994
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06/10/1997
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02/10/1994
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02/15/2000
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08201817
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02/24/1994
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ARCHITECTURE AND METHOD FOR PROVIDING GUARANTEED ACCESS FOR A RETRYING BUS MASTER TO A DATA TRANSFER BRIDGE CONNECTING TWO BUSES IN A COMPUTER SYSTEM
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09/17/1996
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06/27/1994
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PARALLEL FLEXIBLE TRANSMISSION CABLE
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11/09/1999
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07/29/1994
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07/25/2000
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08/15/1994
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SPUTTER AND CVD DEPOSITED TITANIUM NITRIDE BARRIER LAYER BETWEEN A PLATINUM LAYER AND A POLYSILICON PLUG
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10/14/1997
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08/17/1994
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11/05/1996
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09/16/1994
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06/15/1999
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09/14/1994
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METHOD FOR FABRICATING STACKED LAYER SILICON NITRIDE FOR LOW LEAKAGE AND HIGH CAPACITANCE
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04/11/1995
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10/04/1994
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PROCESS FOR FABRICATING ULSI CMOS CIRCUITS USING A SINGLE POLYSILICON GATE LAYER AND DISPOSABLE SPACERS
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02/27/1996
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10/13/1994
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SPLIT-POLYSILICON CMOS PROCESS FOR MULTI-MEGABIT DYNAMIC MEMORIES INCORPORATING STACKED CONTAINER CAPACITOR CELLS
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02/20/1996
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10/13/1994
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METHOD FOR FABRICATING SPACER SUPPORT STRUCTURES USEFUL IN FLAT PANEL DISPLAYS
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01/16/1996
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10/13/1994
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02/06/1996
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10/14/1994
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06/11/1996
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10/19/1994
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POWER VALIDATION TOOL FOR MICROPROCESSOR SYSTEMS
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02/27/1996
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10/19/1994
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02/25/1997
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10/21/1994
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METHOD AND APPARATUS FOR COMBINING CONTROLLER FIRMWARE STORAGE AND CONTROLLER LOGIC IN A MASS STORAGE SYSTEM
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11/07/1995
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10/24/1994
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METHOD FOR FORMING A CAPACITOR HAVING RECRSSED LATERAL REACTION BARRIER LAYER EDGES
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10/03/2000
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10/24/1994
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12/31/1996
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10/26/1994
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09/03/1996
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10/26/1994
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07/30/1996
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08330170
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10/27/1994
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03/11/1997
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10/31/1994
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05/14/1996
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08331892
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10/31/1994
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LOW CURRENT DIFFERENTIAL LEVEL SHIFTER
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09/17/1996
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08332583
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10/31/1994
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06/10/1997
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11/01/1994
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08/22/1995
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08333262
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11/02/1994
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11/21/1995
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08333264
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11/02/1994
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05/21/2002
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08347788
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11/30/1994
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STABLE REFERENCE VOLTAGE GENERATOR CIRCUIT
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05/19/1998
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08390295
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01/20/1995
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VERY HIGH-DENSITY DRAM CELL STRUCTURE AND METHOD FOR FABRICATING IT
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09/02/1997
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08391159
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02/21/1995
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INTERNAL TIMING METHOD AND CIRCUIT FOR PROGRAMMABLE MEMORIES
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10/08/1996
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08394545
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02/22/1995
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METHOD OF FORMING A BIT LINE OVER CAPACITOR ARRAY OF MEMORY CELLS AND AN ARRAY OF BIT LINE OVER CAPACITOR ARRAY OF MEMORY CELLS
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11/17/1998
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03/20/1995
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02/04/1997
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08412326
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03/31/1995
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08/24/1999
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03/29/1995
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10/06/1998
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08420239
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04/11/1995
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HIGH PERFORMANCE METHOD OF AND SYSTEM FOR SELECTING ONE OF A PLURALITY OF IC CHIPS WHILE REQUIRING MINIMAL SELECT LINES
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07/28/1998
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08423397
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04/18/1995
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METALLIZATION OVER TUNGSTEN PLUGS
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12/03/1996
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08425678
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04/18/1995
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STATIC DISCHARGE CIRCUIT HAVING LOW BREAKDOWN VOLTAGE BIPOLAR CLAMP
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06/18/1996
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08431952
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05/01/1995
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APPARATUS AND METHOD FOR TESTING AN INTEGRATED CIRCUIT USING A VOLTAGE REFERENCE POTENTIAL AND A REFERENCE INTEGRATED CIRCUIT
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11/26/1996
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08432111
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05/01/1995
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METHOD AND APPARATUS FOR TESTING UNPACKAGED SEMICONDUCTOR DICE
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02/03/1998
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08432838
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Filing Dt:
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05/02/1995
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Title:
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SENSE AMPLIFIER WITH HYSTERESIS
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Patent #:
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Issue Dt:
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05/28/1996
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Application #:
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08434703
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Filing Dt:
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05/04/1995
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Title:
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TESTING MAPPED SIGNAL SOURCES
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Patent #:
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Issue Dt:
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05/06/1997
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Application #:
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08437090
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Filing Dt:
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05/05/1995
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Title:
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MEMORY UNIT WITH BIT LINE DISCHARGER
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Patent #:
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Issue Dt:
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10/15/1996
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Application #:
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08437438
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Filing Dt:
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05/05/1995
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Title:
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PROGRAMMABLE CIRCUIT FOR ENABLING AN ASSOCIATED CIRCUIT
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Patent #:
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Issue Dt:
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10/29/1996
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Application #:
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08438276
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Filing Dt:
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05/10/1995
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Title:
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APPARATUS AND METHOD FOR ENABLING A BUS DRIVER WHEN A DATA SIGNAL IS VALID
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Patent #:
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Issue Dt:
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11/05/1996
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Application #:
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08438349
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Filing Dt:
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05/10/1995
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Title:
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APPARATUS AND METHOD FOR MAPPING A REDUNDANT MEMORY COLUMN TO A DEFECTIVE MEMORY COLUMN
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Patent #:
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Issue Dt:
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11/12/1996
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Application #:
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08438903
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Filing Dt:
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05/10/1995
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Title:
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APPARATUS AND METHOD FOR MAPPING A REDUNDANT MEMORY COLUMN TO A DEFECTIVE MEMORY COLUMN
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Patent #:
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Issue Dt:
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08/19/1997
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Application #:
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08439022
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Filing Dt:
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05/11/1995
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Title:
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METHOD TO FORM HEMISPHERICAL GRAIN (HSG) SILICON BY IMPLANT SEEDING FOLLOWED BY VACUUM ANNEAL
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Patent #:
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Issue Dt:
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02/18/1997
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Application #:
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08440212
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Filing Dt:
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05/12/1995
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Title:
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METHOD OF FORMING A CYLINDRICAL CONTAINER STACKED CAPACITOR
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Patent #:
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Issue Dt:
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11/05/1996
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Application #:
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08440222
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Filing Dt:
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05/12/1995
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Title:
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METHOD OF FORMING CMOS INTEGRATED CIRCUITRY
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Patent #:
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Issue Dt:
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08/05/1997
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Application #:
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08442837
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Filing Dt:
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05/17/1995
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Title:
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METHOD FOR FORMING A CAPACITOR WITH ELECTRICALLY INTERCONNECTED CON- STRUCTION
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Patent #:
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Issue Dt:
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03/12/1996
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Application #:
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08443818
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Filing Dt:
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05/18/1995
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Title:
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SYSTEM HAVING MULTIPLE SUBSYSTEMS AND TEST SIGNAL SOURCE UPON COMMON SUBSTRATE
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Patent #:
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Issue Dt:
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05/13/1997
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Application #:
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08444594
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Filing Dt:
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05/19/1995
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Title:
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METHOD AND APPARATUS FOR MONITORING A LASER ABLATION OPERATION INVOLVING MULTIPLE ABLATION SITES ON A WORKPIECE
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Patent #:
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Issue Dt:
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09/02/1997
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Application #:
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08444750
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Filing Dt:
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05/19/1995
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Title:
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PROCESSOR TO MEMORY INTERFACE LOGIC FOR USE IN A COMPUTER SYSTEM USING A MULTIPLEXED MEMORY ADDRESS
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Patent #:
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Issue Dt:
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09/09/1997
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Application #:
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08444852
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Filing Dt:
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05/19/1995
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Title:
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METHOD OF FORMING CAPICITORS HAVING AN AMORPHOUS ELECTRICALLY CONDUCTIVE LAYER
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Patent #:
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Issue Dt:
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09/02/1997
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Application #:
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08444853
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Filing Dt:
|
05/19/1995
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Title:
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METHOD OF FORMING A TA2O5 DIELECTRIC LAYER WITH AMORPHOUS DIFFUSION BARRIER LAYER AND METHOD OF FORMING A CAPACITOR HAVING A TA205 DILECTRIC LAYER WITH AMORPHOUS DIFFUSION BARRIER LAYER
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Patent #:
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Issue Dt:
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08/26/1997
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Application #:
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08444859
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Filing Dt:
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05/19/1995
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Title:
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METHOD OF FORMING A NON-VOLATILE MEMORY ARRAY
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Patent #:
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Issue Dt:
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08/19/1997
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Application #:
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08446335
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Filing Dt:
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05/22/1995
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Title:
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MULTI-PORT MEMORY WITH MULTIPLE FUNCTION ACCESS CYCLES AND TRANSFERS WITH SIMULTANEOUS RANDOM ACCESS
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Patent #:
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Issue Dt:
|
09/24/1996
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Application #:
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08447750
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Filing Dt:
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05/23/1995
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Title:
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CAPACITOR CONSTRUCTION WITH OXIDATION BARRIER BLOCKS
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Patent #:
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Issue Dt:
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02/06/1996
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Application #:
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08449300
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Filing Dt:
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05/24/1995
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Title:
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METHOD OF FORMING CMOS DEVICES USING INDEPENDENT THICKNESS SPACERS IN A SPLIT-POLYSILICON DRAM PROCESS
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Patent #:
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Issue Dt:
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07/30/1996
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Application #:
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08450916
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Filing Dt:
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05/26/1995
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Title:
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FOLDED BIT LINE FERROELECTRIC MEMORY DEVICE
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Patent #:
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Issue Dt:
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11/05/1996
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Application #:
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08451037
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Filing Dt:
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05/25/1995
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Title:
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POWER SUPPLY CONFIGURED SENSING SCHEME FOR FLASH EEPROM
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Patent #:
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Issue Dt:
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02/04/1997
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Application #:
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08452134
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Filing Dt:
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05/26/1995
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Title:
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CONDUCTIVE POLYSILICON LINES AND THIN FILM TRANSISTORS
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Patent #:
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Issue Dt:
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04/16/1996
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Application #:
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08452203
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Filing Dt:
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05/26/1995
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Title:
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LOW CURRENT REDUNDANCY FUSE ASSEMBLY
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