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Patent Assignment Details
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Reel/Frame:054633/0001   Pages: 1245
Recorded: 11/02/2020
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 8468
Page 10 of 85
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85
1
Patent #:
6834378
Issue Dt:
12/21/2004
Application #:
10264162
Filing Dt:
10/03/2002
Publication #:
US20040068707
Pub Dt:
04/08/2004
Title:
SYSTEM ON A CHIP BUS WITH AUTOMATIC PIPELINE STAGE INSERTION FOR TIMING CLOSURE
2
Patent #:
6737364
Issue Dt:
05/18/2004
Application #:
10266000
Filing Dt:
10/07/2002
Publication #:
US20040067659
Pub Dt:
04/08/2004
Title:
METHOD FOR FABRICATING CRYSTALLINE-DIELECTRIC THIN FILMS AND DEVICES FORMED USING SAME
3
Patent #:
6766083
Issue Dt:
07/20/2004
Application #:
10268638
Filing Dt:
10/10/2002
Publication #:
US20030072534
Pub Dt:
04/17/2003
Title:
TUNABLE COUPLER DEVICE AND OPTICAL FILTER
4
Patent #:
6759346
Issue Dt:
07/06/2004
Application #:
10270325
Filing Dt:
10/15/2002
Title:
METHOD OF FORMING DIELECTRIC LAYERS
5
Patent #:
6801693
Issue Dt:
10/05/2004
Application #:
10272694
Filing Dt:
10/16/2002
Publication #:
US20040208453
Pub Dt:
10/21/2004
Title:
OPTICAL BACKPLANE ARRAY CONNECTOR
6
Patent #:
6649511
Issue Dt:
11/18/2003
Application #:
10272760
Filing Dt:
10/16/2002
Title:
METHOD OF MANUFACTURING A SEED LAYER WITH ANNEALED REGION FOR INTEGRATED CIRCUIT INTERCONNECTS
7
Patent #:
6707106
Issue Dt:
03/16/2004
Application #:
10272979
Filing Dt:
10/18/2002
Title:
SEMICONDUCTOR DEVICE WITH TENSILE STRAIN SILICON INTRODUCED BY COMPRESSIVE MATERIAL IN A BURIED OXIDE LAYER
8
Patent #:
6664604
Issue Dt:
12/16/2003
Application #:
10273306
Filing Dt:
10/18/2002
Title:
METAL GATE STACK WITH ETCH STOP LAYER
9
Patent #:
6833588
Issue Dt:
12/21/2004
Application #:
10274867
Filing Dt:
10/22/2002
Publication #:
US20040075121
Pub Dt:
04/22/2004
Title:
SEMICONDUCTOR DEVICE HAVING A U-SHAPED GATE STRUCTURE
10
Patent #:
6706571
Issue Dt:
03/16/2004
Application #:
10274951
Filing Dt:
10/22/2002
Title:
METHOD FOR FORMING MULTIPLE STRUCTURES IN A SEMICONDUCTOR DEVICE
11
Patent #:
6702648
Issue Dt:
03/09/2004
Application #:
10277559
Filing Dt:
10/22/2002
Title:
USE OF SCATTEROMETRY/REFLECTOMETRY TO MEASURE THIN FILM DELAMINATION DURING CMP
12
Patent #:
6661069
Issue Dt:
12/09/2003
Application #:
10278211
Filing Dt:
10/22/2002
Title:
MICRO-ELECTROMECHANICAL VARACTOR WITH ENHANCED TUNING RANGE
13
Patent #:
6787852
Issue Dt:
09/07/2004
Application #:
10278420
Filing Dt:
10/23/2002
Title:
SEMICONDUCTOR-ON-INSULATOR (SOI) DEVICE HAVING SOURCE/DRAIN SILICON-GERMANIUM REGIONS
14
Patent #:
7023093
Issue Dt:
04/04/2006
Application #:
10280283
Filing Dt:
10/24/2002
Publication #:
US20040087135
Pub Dt:
05/06/2004
Title:
VERY LOW EFFECTIVE DIELECTRIC CONSTANT INTERCONNECT STRUCTURES AND METHODS FOR FABRICATING THE SAME
15
Patent #:
6835983
Issue Dt:
12/28/2004
Application #:
10280661
Filing Dt:
10/25/2002
Publication #:
US20040079993
Pub Dt:
04/29/2004
Title:
SILICON-ON-INSULATOR (SOI) INTEGRATED CIRCUIT (IC) CHIP WITH THE SILICON LAYERS CONSISTING OF REGIONS OF DIFFERENT THICKNESS
16
Patent #:
6734259
Issue Dt:
05/11/2004
Application #:
10281038
Filing Dt:
10/24/2002
Publication #:
US20040082730
Pub Dt:
04/29/2004
Title:
RESIN COMPOSITION WITH A POLYMERIZING AGENT AND METHOD OF MANUFACTURING PREPREG AND OTHER LAMINATE STRUCTURES THEREFROM
17
Patent #:
6703648
Issue Dt:
03/09/2004
Application #:
10282559
Filing Dt:
10/29/2002
Title:
STRAINED SILICON PMOS HAVING SILICON GERMANIUM SOURCE/DRAIN EXTENSIONS AND METHOD FOR ITS FABRICATION
18
Patent #:
6864163
Issue Dt:
03/08/2005
Application #:
10283523
Filing Dt:
10/30/2002
Title:
FABRICATION OF DUAL WORK-FUNCTION METAL GATE STRUCTURE FOR COMPLEMENTARY FIELD EFFECT TRANSISTORS
19
Patent #:
6781141
Issue Dt:
08/24/2004
Application #:
10284509
Filing Dt:
10/29/2002
Publication #:
US20040079895
Pub Dt:
04/29/2004
Title:
METHOD AND STRUCTURE FOR DETECTION AND MEASUREMENT OF ELECTRICAL AND MECHANICAL RESONANCE ASSOCIATED WITH AN E-BEAM LITHOGRAPHY TOOL
20
Patent #:
7003271
Issue Dt:
02/21/2006
Application #:
10284642
Filing Dt:
10/31/2002
Publication #:
US20030203727
Pub Dt:
10/30/2003
Title:
DIRECT CONVERSION RECEIVER HAVING A GAIN-SETTING DEPENDENT FILTER PARAMETER
21
Patent #:
6660543
Issue Dt:
12/09/2003
Application #:
10284996
Filing Dt:
10/31/2002
Title:
METHOD OF MEASURING IMPLANT PROFILES USING SCATTEROMETRIC TECHNIQUES WHEREIN DISPERSION COEFFICIENTS ARE VARIED BASED UPON DEPTH
22
Patent #:
6656825
Issue Dt:
12/02/2003
Application #:
10285004
Filing Dt:
10/31/2002
Publication #:
US20030201490
Pub Dt:
10/30/2003
Title:
SEMICONDUCTOR DEVICE HAVING AN IMPROVED LOCAL INTERCONNECT STRUCTURE AND A METHOD FOR FORMING SUCH A DEVICE
23
Patent #:
6638607
Issue Dt:
10/28/2003
Application #:
10285162
Filing Dt:
10/30/2002
Title:
METHOD AND STRUCTURE FOR PRODUCING Z-AXIS INTERCONNECTION ASSEMBLY OF PRINTED WIRING BOARD ELEMENTS
24
Patent #:
7016994
Issue Dt:
03/21/2006
Application #:
10285935
Filing Dt:
11/01/2002
Publication #:
US20040024949
Pub Dt:
02/05/2004
Title:
RETRY MECHANISM FOR BLOCKING INTERFACES
25
Patent #:
6597596
Issue Dt:
07/22/2003
Application #:
10286206
Filing Dt:
11/01/2002
Publication #:
US20030065880
Pub Dt:
04/03/2003
Title:
CONTENT ADDRESSABLE MEMORY HAVING CASCADED SUB-ENTRY ARCHITECTURE
26
Patent #:
6654660
Issue Dt:
11/25/2003
Application #:
10287292
Filing Dt:
11/04/2002
Title:
CONTROLLING THERMAL EXPANSION OF MASK SUBSTRATES BY SCATTEROMETRY
27
Patent #:
6641899
Issue Dt:
11/04/2003
Application #:
10287935
Filing Dt:
11/05/2002
Title:
NONLITHOGRAPHIC METHOD TO PRODUCE MASKS BY SELECTIVE REACTION, ARTICLES PRODUCED, AND COMPOSITION FOR SAME
28
Patent #:
6624075
Issue Dt:
09/23/2003
Application #:
10288862
Filing Dt:
11/05/2002
Title:
METHOD OF REDUCING ELECTROMIGRATION IN A COPPER LINE BY ZINC-DOPING OF A COPPER SURFACE FROM AN ELECTROPLATED COPPER-ZINC ALLOY THIN FILM AND A SEMICONDUCTOR DEVICE THEREBY FORMED
29
Patent #:
6707095
Issue Dt:
03/16/2004
Application #:
10290400
Filing Dt:
11/06/2002
Title:
STRUCTURE AND METHOD FOR IMPROVED VERTICAL MOSFET DRAM CELL-TO-CELL ISOLATION
30
Patent #:
6783862
Issue Dt:
08/31/2004
Application #:
10290682
Filing Dt:
11/08/2002
Publication #:
US20030114013
Pub Dt:
06/19/2003
Title:
TOUGHNESS, ADHESION AND SMOOTH METAL LINES OF POROUS LOW K DIELECTRIC INTERCONNECT STRUCTURES
31
Patent #:
6716742
Issue Dt:
04/06/2004
Application #:
10292205
Filing Dt:
11/12/2002
Publication #:
US20030075803
Pub Dt:
04/24/2003
Title:
LOW-K INTERCONNECT STRUCTURE COMPRISED OF A MULTILAYER OF SPIN-ON POROUS DIELECTRICS
32
Patent #:
6819160
Issue Dt:
11/16/2004
Application #:
10293340
Filing Dt:
11/13/2002
Publication #:
US20040090261
Pub Dt:
05/13/2004
Title:
SELF-TIMED AND SELF-TESTED FUSE BLOW
33
Patent #:
6917108
Issue Dt:
07/12/2005
Application #:
10294139
Filing Dt:
11/14/2002
Publication #:
US20040094839
Pub Dt:
05/20/2004
Title:
RELIABLE LOW-K INTERCONNECT STRUCTURE WITH HYBRID DIELECTRIC
34
Patent #:
6776885
Issue Dt:
08/17/2004
Application #:
10294199
Filing Dt:
11/14/2002
Publication #:
US20040094403
Pub Dt:
05/20/2004
Title:
INTEGRATED PLATING AND PLANARIZATION APPARATUS HAVING A VARIABLE-DIAMETER COUNTERELECTRODE
35
Patent #:
6773570
Issue Dt:
08/10/2004
Application #:
10294200
Filing Dt:
11/14/2002
Publication #:
US20040094427
Pub Dt:
05/20/2004
Title:
INTEGRATED PLATING AND PLANARIZATION PROCESS AND APPARATUS THEREFOR
36
Patent #:
6771534
Issue Dt:
08/03/2004
Application #:
10295678
Filing Dt:
11/15/2002
Publication #:
US20040095801
Pub Dt:
05/20/2004
Title:
THERMALLY-ASSISTED MAGNETIC WRITING USING AN OXIDE LAYER AND CURRENT-INDUCED HEATING
37
Patent #:
6822260
Issue Dt:
11/23/2004
Application #:
10298664
Filing Dt:
11/19/2002
Title:
LINEWIDTH MEASUREMENT STRUCTURE WITH EMBEDDED SCATTEROMETRY STRUCTURE
38
Patent #:
6812506
Issue Dt:
11/02/2004
Application #:
10298923
Filing Dt:
11/19/2002
Title:
POLYSILICON LINEWIDTH MEASUREMENT STRUCTURE WITH EMBEDDED TRANSISTOR
39
Patent #:
6846734
Issue Dt:
01/25/2005
Application #:
10300165
Filing Dt:
11/20/2002
Publication #:
US20040094804
Pub Dt:
05/20/2004
Title:
METHOD AND PROCESS TO MAKE MULTIPLE-THRESHOLD METAL GATES CMOS TECHNOLOGY
40
Patent #:
6946373
Issue Dt:
09/20/2005
Application #:
10300189
Filing Dt:
11/20/2002
Publication #:
US20040094763
Pub Dt:
05/20/2004
Title:
RELAXED, LOW-DEFECT SGOI FOR STRAINED SI CMOS APPLICATIONS
41
Patent #:
6800503
Issue Dt:
10/05/2004
Application #:
10300520
Filing Dt:
11/20/2002
Publication #:
US20040097003
Pub Dt:
05/20/2004
Title:
MEMS ENCAPSULATED STRUCTURE AND METHOD OF MAKING SAME
42
Patent #:
6963080
Issue Dt:
11/08/2005
Application #:
10300630
Filing Dt:
11/20/2002
Publication #:
US20030136964
Pub Dt:
07/24/2003
Title:
THIN FILM TRANSISTORS USING SOLUTION PROCESSED PENTACENE PRECURSOR AS ORGANIC SEMICONDUCTOR
43
Patent #:
6686637
Issue Dt:
02/03/2004
Application #:
10301436
Filing Dt:
11/21/2002
Title:
GATE STRUCTURE WITH INDEPENDENTLY TAILORED VERTICAL DOPING PROFILE
44
Patent #:
6842048
Issue Dt:
01/11/2005
Application #:
10301617
Filing Dt:
11/22/2002
Publication #:
US20040100306
Pub Dt:
05/27/2004
Title:
TWO TRANSISTOR NOR DEVICE
45
Patent #:
6730445
Issue Dt:
05/04/2004
Application #:
10303341
Filing Dt:
11/22/2002
Publication #:
US20030194569
Pub Dt:
10/16/2003
Title:
ATTENUATED EMBEDDED PHASE SHIFT PHOTOMASK BLANKS
46
Patent #:
6709982
Issue Dt:
03/23/2004
Application #:
10303702
Filing Dt:
11/26/2002
Title:
DOUBLE SPACER FINFET FORMATION
47
Patent #:
6815235
Issue Dt:
11/09/2004
Application #:
10304114
Filing Dt:
11/25/2002
Title:
METHODS OF CONTROLLING FORMATION OF METAL SILICIDE REGIONS, AND SYSTEM FOR PERFORMING SAME
48
Patent #:
6838695
Issue Dt:
01/04/2005
Application #:
10304163
Filing Dt:
11/25/2002
Publication #:
US20040099860
Pub Dt:
05/27/2004
Title:
CMOS DEVICE STRUCTURE WITH IMPROVED PFET GATE ELECTRODE
49
Patent #:
7017094
Issue Dt:
03/21/2006
Application #:
10304246
Filing Dt:
11/26/2002
Publication #:
US20040103355
Pub Dt:
05/27/2004
Title:
PERFORMANCE BUILT-IN SELF TEST SYSTEM FOR A DEVICE AND A METHOD OF USE
50
Patent #:
7339963
Issue Dt:
03/04/2008
Application #:
10305516
Filing Dt:
11/27/2002
Publication #:
US20040101007
Pub Dt:
05/27/2004
Title:
HIGH SPEED DATA CHANNEL INCLUDING A CMOS VCSEL DRIVER AND A HIGH PERFORMANCE PHOTODETECTOR AND CMOS PHOTORECEIVER
51
Patent #:
6699736
Issue Dt:
03/02/2004
Application #:
10305643
Filing Dt:
11/26/2002
Publication #:
US20030082853
Pub Dt:
05/01/2003
Title:
ELECTRICAL COUPLING OF A STIFFENER TO A CHIP CARRIER
52
Patent #:
7120327
Issue Dt:
10/10/2006
Application #:
10305853
Filing Dt:
11/27/2002
Publication #:
US20040100782
Pub Dt:
05/27/2004
Title:
BACKPLANE ASSEMBLY WITH BOARD TO BOARD OPTICAL INTERCONNECTIONS
53
Patent #:
6900395
Issue Dt:
05/31/2005
Application #:
10306756
Filing Dt:
11/26/2002
Publication #:
US20040100754
Pub Dt:
05/27/2004
Title:
ENHANCED HIGH-FREQUENCY VIA INTERCONNECTION FOR IMPROVED RELIABILITY
54
Patent #:
6829413
Issue Dt:
12/07/2004
Application #:
10307951
Filing Dt:
12/02/2002
Publication #:
US20040105648
Pub Dt:
06/03/2004
Title:
FERRULE-LESS OPTICAL FIBER APPARATUS FOR OPTICAL BACKPLANE CONNECTOR SYSTEMS
55
Patent #:
7417315
Issue Dt:
08/26/2008
Application #:
10310532
Filing Dt:
12/05/2002
Publication #:
US20040110322
Pub Dt:
06/10/2004
Title:
NEGATIVE THERMAL EXPANSION SYSTEM (NTES) DEVICE FOR TCE COMPENSATION IN ELASTOMER COMPOSITES AND CONDUCTIVE ELASTOMER INTERCONNECTS IN MICROELECTRONIC PACKAGING
56
Patent #:
6686231
Issue Dt:
02/03/2004
Application #:
10310777
Filing Dt:
12/06/2002
Title:
DAMASCENE GATE PROCESS WITH SACRIFICIAL OXIDE IN SEMICONDUCTOR DEVICES
57
Patent #:
6645797
Issue Dt:
11/11/2003
Application #:
10310926
Filing Dt:
12/06/2002
Title:
METHOD FOR FORMING FINS IN A FINFET DEVICE USING SACRIFICIAL CARBON LAYER
58
Patent #:
7030481
Issue Dt:
04/18/2006
Application #:
10314589
Filing Dt:
12/09/2002
Publication #:
US20040108587
Pub Dt:
06/10/2004
Title:
HIGH DENSITY CHIP CARRIER WITH INTEGRATED PASSIVE DEVICES
59
Patent #:
6918982
Issue Dt:
07/19/2005
Application #:
10314632
Filing Dt:
12/09/2002
Publication #:
US20040108047
Pub Dt:
06/10/2004
Title:
SYSTEM AND METHOD OF TRANSFER PRINTING AN ORGANIC SEMICONDUCTOR
60
Patent #:
7825516
Issue Dt:
11/02/2010
Application #:
10316484
Filing Dt:
12/11/2002
Publication #:
US20040113277
Pub Dt:
06/17/2004
Title:
FORMATION OF ALIGNED CAPPED METAL LINES AND INTERCONNECTIONS IN MULTILEVEL SEMICONDUCTOR STRUCTURES
61
Patent #:
7613534
Issue Dt:
11/03/2009
Application #:
10316815
Filing Dt:
12/11/2002
Title:
WEB BASED SEMICONDUCTOR ORDERING ARCHITECTURE
62
Patent #:
6734527
Issue Dt:
05/11/2004
Application #:
10316826
Filing Dt:
12/12/2002
Title:
CMOS DEVICES WITH BALANCED DRIVE CURRENTS BASED ON SIGE
63
Patent #:
6974981
Issue Dt:
12/13/2005
Application #:
10318600
Filing Dt:
12/12/2002
Publication #:
US20040113174
Pub Dt:
06/17/2004
Title:
ISOLATION STRUCTURES FOR IMPOSING STRESS PATTERNS
64
Patent #:
6717216
Issue Dt:
04/06/2004
Application #:
10318601
Filing Dt:
12/12/2002
Title:
FIELD EFFECT TRANSISTOR WITH STRESSED CHANNEL AND METHOD FOR MAKING SAME
65
Patent #:
6831363
Issue Dt:
12/14/2004
Application #:
10319032
Filing Dt:
12/12/2002
Publication #:
US20040113278
Pub Dt:
06/17/2004
Title:
STRUCTURE AND METHOD FOR REDUCING THERMO-MECHANICAL STRESS IN STACKED VIAS
66
Patent #:
6992344
Issue Dt:
01/31/2006
Application #:
10319724
Filing Dt:
12/13/2002
Publication #:
US20040113235
Pub Dt:
06/17/2004
Title:
DAMASCENE INTEGRATION SCHEME FOR DEVELOPING METAL-INSULATOR-METAL CAPACITORS
67
Patent #:
6657864
Issue Dt:
12/02/2003
Application #:
10320845
Filing Dt:
12/16/2002
Title:
HIGH DENSITY THERMAL SOLUTION FOR DIRECT ATTACH MODULES
68
Patent #:
6833764
Issue Dt:
12/21/2004
Application #:
10320851
Filing Dt:
12/16/2002
Title:
APPARATUS AND METHOD FOR SYNTHESIZING A FREQUENCY USING VERNIER DIVIDES
69
Patent #:
6830941
Issue Dt:
12/14/2004
Application #:
10321000
Filing Dt:
12/17/2002
Title:
METHOD AND APPARATUS FOR IDENTIFYING INDIVIDUAL DIE DURING FAILURE ANALYSIS
70
Patent #:
7022544
Issue Dt:
04/04/2006
Application #:
10321660
Filing Dt:
12/18/2002
Publication #:
US20040119093
Pub Dt:
06/24/2004
Title:
HIGH SPEED PHOTODIODE WITH A BARRIER LAYER FOR BLOCKING OR ELIMINATING SLOW PHOTONIC CARRIERS AND METHOD FOR FORMING SAME
71
Patent #:
6787783
Issue Dt:
09/07/2004
Application #:
10321942
Filing Dt:
12/17/2002
Publication #:
US20040113097
Pub Dt:
06/17/2004
Title:
APPARATUS AND TECHNIQUES FOR SCANNING ELECTRON BEAM BASED CHIP REPAIR
72
Patent #:
6833332
Issue Dt:
12/21/2004
Application #:
10323024
Filing Dt:
12/18/2002
Publication #:
US20030127646
Pub Dt:
07/10/2003
Title:
METHOD FOR FABRICATION OF RELAXED SIGE BUFFER LAYERS ON SILICON-ON-INSULATORS AND STRUCTURES CONTAINING THE SAME
73
Patent #:
8359494
Issue Dt:
01/22/2013
Application #:
10323272
Filing Dt:
12/18/2002
Publication #:
US20040123182
Pub Dt:
06/24/2004
Title:
Parallel fault detection
74
Patent #:
6790686
Issue Dt:
09/14/2004
Application #:
10323562
Filing Dt:
12/18/2002
Title:
METHOD AND APPARATUS FOR INTEGRATING DISPATCH AND PROCESS CONTROL ACTIONS
75
Patent #:
7177880
Issue Dt:
02/13/2007
Application #:
10323566
Filing Dt:
12/19/2002
Publication #:
US20040122855
Pub Dt:
06/24/2004
Title:
METHOD OF CREATING AND DISPLAYING RELATIONSHIP CHAINS BETWEEN USERS OF A COMPUTERIZED NETWORK
76
Patent #:
7053401
Issue Dt:
05/30/2006
Application #:
10323899
Filing Dt:
12/20/2002
Publication #:
US20040119073
Pub Dt:
06/24/2004
Title:
SYNTHESIS AND APPLICATION OF PHOTOSENSITIVE PENTACENE PRECURSOR IN ORGANIC THIN FILM TRANSISTORS
77
Patent #:
7305663
Issue Dt:
12/04/2007
Application #:
10323987
Filing Dt:
12/18/2002
Title:
SYSTEM AND METHOD FOR STATE-BASED PROFILING OF MULTIPROCESSOR SYSTEMS
78
Patent #:
6756300
Issue Dt:
06/29/2004
Application #:
10324259
Filing Dt:
12/18/2002
Title:
METHOD FOR FORMING DUAL DAMASCENE INTERCONNECT STRUCTURE
79
Patent #:
6833718
Issue Dt:
12/21/2004
Application #:
10324328
Filing Dt:
12/20/2002
Title:
PHOTON BEACON
80
Patent #:
6856946
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Title:
MOS TRANSISTOR
Assignor
1
GLOBALFOUNDRIES INC.
Exec Dt:
10/22/2020
Assignee
1
GLOBALFOUNDRIES U.S. INC.
2600 GREAT AMERICA WAY
SANTA CLARA, CALIFORNIA 95054
Correspondence name and address
GLOBALFOUNDRIES SINGAPORE PTE. LTD.
60 WOODLANDS INDUSTRIAL PARK D STREET 2,
SINGAPORE, 738406 SINGAPORE

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