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Reel/Frame:051028/0001   Pages: 834
Recorded: 11/12/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 16529
Page 11 of 166
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1
Patent #:
6287879
Issue Dt:
09/11/2001
Application #:
09371827
Filing Dt:
08/11/1999
Title:
ENDPOINT STABILIZATION FOR POLISHING PROCESS
2
Patent #:
6301188
Issue Dt:
10/09/2001
Application #:
09372245
Filing Dt:
08/11/1999
Title:
METHOD AND APPARATUS FOR REGISTERING FREE FLOW INFORMATION
3
Patent #:
6141266
Issue Dt:
10/31/2000
Application #:
09372347
Filing Dt:
08/11/1999
Title:
METHOD AND APPARATUS FOR GENERATING A SIGNAL WITH A VOLTAGE INSENSITIVE OR CONTROLLED DELAY
4
Patent #:
6114557
Issue Dt:
09/05/2000
Application #:
09372427
Filing Dt:
08/11/1999
Title:
METHODS FOR PREPARING RUTHENIUM AND OSMIUM COMPOUNDS
5
Patent #:
6098639
Issue Dt:
08/08/2000
Application #:
09373175
Filing Dt:
08/12/1999
Title:
WET CLEANS FOR COMPOSITE SURFACES
6
Patent #:
6180527
Issue Dt:
01/30/2001
Application #:
09374128
Filing Dt:
08/09/1999
Title:
METHOD AND APPARATUS FOR THINNING ARTICLE, AND ARTICLE
7
Patent #:
6172540
Issue Dt:
01/09/2001
Application #:
09374798
Filing Dt:
08/16/1999
Title:
APPARATUS FOR FAST LOGIC TRANSFER OF DATA ACROSS ASYNCHRONOUS CLOCK DOMAINS
8
Patent #:
6630701
Issue Dt:
10/07/2003
Application #:
09374988
Filing Dt:
08/16/1999
Title:
BURIED CHANNEL CMOS IMAGER AND METHOD OF FORMING SAME
9
Patent #:
6261104
Issue Dt:
07/17/2001
Application #:
09375157
Filing Dt:
08/16/1999
Title:
RISER CARD ASSEMBLY AND METHOD FOR ITS INSTALLATION
10
Patent #:
6198144
Issue Dt:
03/06/2001
Application #:
09376232
Filing Dt:
08/18/1999
Title:
PASSIVATION OF SIDEWALLS OF A WORD LINE STACK
11
Patent #:
6285609
Issue Dt:
09/04/2001
Application #:
09376528
Filing Dt:
08/18/1999
Title:
METHOD AND APPARATUS FOR TESTING MEMORY DEVICES
12
Patent #:
6362429
Issue Dt:
03/26/2002
Application #:
09376699
Filing Dt:
08/18/1999
Publication #:
US20020046857
Pub Dt:
04/25/2002
Title:
STRESS RELIEVING TAPE BONDING INTERCONNECT
13
Patent #:
6735729
Issue Dt:
05/11/2004
Application #:
09376786
Filing Dt:
08/18/1999
Title:
COMPRESSION CIRCUIT FOR TESTING A MEMORY DEVICE
14
Patent #:
6252811
Issue Dt:
06/26/2001
Application #:
09376934
Filing Dt:
08/18/1999
Title:
METHOD AND APPARATUS FOR TESTING MEMORY DEVICES
15
Patent #:
6373500
Issue Dt:
04/16/2002
Application #:
09377069
Filing Dt:
08/19/1999
Title:
METHOD FOR IMPLEMENTING PICTURE-IN-PICTURE FUNCTION FOR MULTIPLE COMPUTERS
16
Patent #:
6559076
Issue Dt:
05/06/2003
Application #:
09377070
Filing Dt:
08/19/1999
Title:
METHOD OF REMOVING FREE HALOGEN FROM A HALOGENATED POLYMER INSULATING LAYER OF A SEMICONDUCTOR DEVICE
17
Patent #:
6221748
Issue Dt:
04/24/2001
Application #:
09378198
Filing Dt:
08/19/1999
Title:
APPARATUS AND METHOD FOR PROVIDING MECHANICALLY PRE-FORMED CONDUCTIVE LEADS
18
Patent #:
6224942
Issue Dt:
05/01/2001
Application #:
09378551
Filing Dt:
08/19/1999
Title:
METHOD OF FORMING AN ALUMINUM COMPRISING LINE HAVING A TITANIUM NITRIDE COMPRISING LAYER THEREON
19
Patent #:
6199743
Issue Dt:
03/13/2001
Application #:
09378552
Filing Dt:
08/19/1999
Title:
APPARATUSES FOR FORMINGWIRE BONDS FROM CIRCUITRY ON A SUBSTRATE TO SEMICONDUCTOR CHIP, AND METHODS OF FORMING SEMICONDUCTOR CHIP ASSEMBLIES
20
Patent #:
6510473
Issue Dt:
01/21/2003
Application #:
09378560
Filing Dt:
08/19/1999
Title:
APPARATUS AND METHOD FOR AUTOMATICALLY SELECTING AN APPROPRIATE SIGNAL FROM A PLURALITY OF SIGNALS, BASED ON THE CONFIGURATION OF A PERIPHERAL INSTALLED WITHIN A COMPUTING DEVICE
21
Patent #:
6288575
Issue Dt:
09/11/2001
Application #:
09379532
Filing Dt:
08/24/1999
Title:
PSEUDO-DIFFERENTIAL CURRENT SENSE AMPLIFIER WITH HYSTERESIS
22
Patent #:
6275063
Issue Dt:
08/14/2001
Application #:
09379658
Filing Dt:
08/24/1999
Title:
METHOD AND APPARATUS FOR LIMITED REPROGRAMMABILITY OF FUSE OPTIONS USING ONE-TIME PROGRAMMABLE ELEMENTS
23
Patent #:
6630716
Issue Dt:
10/07/2003
Application #:
09382040
Filing Dt:
08/24/1999
Title:
DISPOSABLE SPACER
24
Patent #:
6268292
Issue Dt:
07/31/2001
Application #:
09382041
Filing Dt:
08/24/1999
Title:
METHODS FOR USE IN FORMATION OF TITANIUM NITRIDE INTERCONNECTS
25
Patent #:
6426288
Issue Dt:
07/30/2002
Application #:
09382218
Filing Dt:
08/24/1999
Title:
METHOD FOR REMOVING AN UPPER LAYER OF MATERIAL FROM A SEMICONDUCTOR WAFER
26
Patent #:
6635939
Issue Dt:
10/21/2003
Application #:
09382295
Filing Dt:
08/24/1999
Publication #:
US20020030235
Pub Dt:
03/14/2002
Title:
BORON INCORPORATED DIFFUSION BARRIER MATERIAL
27
Patent #:
7125768
Issue Dt:
10/24/2006
Application #:
09382442
Filing Dt:
08/25/1999
Publication #:
US20010044186
Pub Dt:
11/22/2001
Title:
METHOD FOR REDUCING SINGLE BIT DATA LOSS IN A MEMORY CIRCUIT
28
Patent #:
6275119
Issue Dt:
08/14/2001
Application #:
09382525
Filing Dt:
08/25/1999
Title:
METHOD TO FIND A VALUE WITHIN A RANGE USING WEIGHTED SUBRANGES
29
Patent #:
6213144
Issue Dt:
04/10/2001
Application #:
09382549
Filing Dt:
08/25/1999
Title:
IN-LINE VALVE
30
Patent #:
6716758
Issue Dt:
04/06/2004
Application #:
09382584
Filing Dt:
08/25/1999
Title:
ASPECT RATIO CONTROLLED ETCH SELECTIVITY USING TIME MODULATED DC BIAS VOLTAGE
31
Patent #:
6387600
Issue Dt:
05/14/2002
Application #:
09382881
Filing Dt:
08/25/1999
Title:
PROTECTIVE LAYER DURING LITHOGRAPHY AND ETCH
32
Patent #:
6403457
Issue Dt:
06/11/2002
Application #:
09382930
Filing Dt:
08/25/1999
Publication #:
US20020011666
Pub Dt:
01/31/2002
Title:
SELECTIVELY COATING BOND PADS
33
Patent #:
6326295
Issue Dt:
12/04/2001
Application #:
09382931
Filing Dt:
08/25/1999
Title:
METHOD AND STRUCTURE FOR IMPROVED ALIGNMENT TOLERANCE IN MULTIPLE, SINGULATED PLUGS AND INTERCONNECTION
34
Patent #:
6330654
Issue Dt:
12/11/2001
Application #:
09383468
Filing Dt:
08/26/1999
Title:
MEMORY CACHE WITH SEQUENTIAL PAGE INDICATORS
35
Patent #:
6498362
Issue Dt:
12/24/2002
Application #:
09383726
Filing Dt:
08/26/1999
Title:
WEAK FERROELECTRIC TRANSISTOR
36
Patent #:
6115306
Issue Dt:
09/05/2000
Application #:
09384134
Filing Dt:
08/27/1999
Title:
METHOD AND APPARATUS FOR MULTIPLE ROW ACTIVATION IN MEMORY DEVICES
37
Patent #:
6526519
Issue Dt:
02/25/2003
Application #:
09384192
Filing Dt:
08/27/1999
Title:
METHOD AND APPARATUS FOR REDUCING SIGNAL TIMING SKEW ON A PRINTED CIRCUIT BOARD
38
Patent #:
6413858
Issue Dt:
07/02/2002
Application #:
09384347
Filing Dt:
08/27/1999
Title:
BARRIER AND ELECTROPLATING SEED LAYER
39
Patent #:
6636920
Issue Dt:
10/21/2003
Application #:
09384665
Filing Dt:
08/27/1999
Title:
ENHANCED BUS CONNECTIVITY THROUGH DISTRIBUTED LOADING
40
Patent #:
6118179
Issue Dt:
09/12/2000
Application #:
09384783
Filing Dt:
08/27/1999
Title:
SEMICONDUCTOR COMPONENT WITH EXTERNAL CONTACT POLYMER SUPPORT MEMBER AND METHOD OF FABRICATION
41
Patent #:
6337808
Issue Dt:
01/08/2002
Application #:
09385045
Filing Dt:
08/30/1999
Title:
MEMORY CIRCUIT AND METHOD OF USING SAME
42
Patent #:
6229381
Issue Dt:
05/08/2001
Application #:
09385106
Filing Dt:
08/27/1999
Title:
TWO-STAGE VOLTAGE PUMP
43
Patent #:
6150277
Issue Dt:
11/21/2000
Application #:
09385156
Filing Dt:
08/30/1999
Title:
METHOD OF MAKING AN OXIDE STRUCTRUE HAVING A FINELY CALIBRATED THICKNESS
44
Patent #:
6339253
Issue Dt:
01/15/2002
Application #:
09385203
Filing Dt:
08/30/1999
Title:
SEMICONDUCTOR PACKAGE
45
Patent #:
6424684
Issue Dt:
07/23/2002
Application #:
09385348
Filing Dt:
08/30/1999
Title:
METHOD AND APPARATUS FOR RECEIVING SYNCHRONOUS DATA
46
Patent #:
6539490
Issue Dt:
03/25/2003
Application #:
09385379
Filing Dt:
08/30/1999
Title:
SYSTEM FOR DISTRIBUTING CLOCK SIGNAL WITH A RISK RATE SUCH THAT SIGNALS APPEARING AT FIRST AND SECOND OUTPUT TERMINALS HAVE SUBSTANTIALLY NO SIGNAL SKEW
47
Patent #:
6141238
Issue Dt:
10/31/2000
Application #:
09385380
Filing Dt:
08/30/1999
Title:
DYNAMIC RANDOM ACCESS MEMORY (DRAM) CELLS WITH REPRESSED FERROELECTRIC MEMORY METHODS OF READING SAME, AND APPARATUSES INCLUDING SAME
48
Patent #:
6111803
Issue Dt:
08/29/2000
Application #:
09385478
Filing Dt:
08/30/1999
Title:
REDUCED CELL VOLTAGE FOR MEMORY DEVICE
49
Patent #:
6121131
Issue Dt:
09/19/2000
Application #:
09385579
Filing Dt:
08/31/1999
Title:
METHOD FOR FORMING CONDUCTIVE STRUCTURES
50
Patent #:
6429133
Issue Dt:
08/06/2002
Application #:
09385580
Filing Dt:
08/31/1999
Title:
COMPOSITION COMPATIBLE WITH ALUMINUM PLANARIZATION AND METHODS THEREFORE
51
Patent #:
6444478
Issue Dt:
09/03/2002
Application #:
09385581
Filing Dt:
08/31/1999
Title:
DIELECTRIC FILMS AND METHODS OF FORMING SAME
52
Patent #:
6440850
Issue Dt:
08/27/2002
Application #:
09385586
Filing Dt:
08/27/1999
Title:
IMPROVED STRUCTURE FOR AN ELECTRICAL CONTACT TO A THIN FILM IN A SEMICONDUCTOR STRUCTURE AND METHOD FOR MAKING THE SAME
53
Patent #:
6455923
Issue Dt:
09/24/2002
Application #:
09385765
Filing Dt:
08/30/1999
Publication #:
US20020070047
Pub Dt:
06/13/2002
Title:
APPARATUS AND METHODS FOR PROVIDING SUBSTRATE STRUCTURES HAVING METALLIC LAYERS FOR MICROELECTRONICS DEVICES
54
Patent #:
6294839
Issue Dt:
09/25/2001
Application #:
09385766
Filing Dt:
08/30/1999
Title:
APPARATUS AND METHODS OF PACKAGING AND TESTING DIE
55
Patent #:
6294825
Issue Dt:
09/25/2001
Application #:
09385981
Filing Dt:
08/30/1999
Title:
ASYMMETRICAL MOLD OF MULTIPLE PART MATRIXES
56
Patent #:
6093661
Issue Dt:
07/25/2000
Application #:
09386076
Filing Dt:
08/30/1999
Title:
INTEGRATED CIRCUITRY AND SEMICONDUCTOR PROCESSING METHOD OF FORMING FIELD EFFECT TRANSISTORS
57
Patent #:
6191995
Issue Dt:
02/20/2001
Application #:
09386101
Filing Dt:
08/30/1999
Title:
SHARING SIGNAL LINES IN A MEMORY DEVICE
58
Patent #:
6420275
Issue Dt:
07/16/2002
Application #:
09386124
Filing Dt:
08/30/1999
Title:
SYSTEM AND METHOD FOR ANALYZING A SEMICONDUCTOR SURFACE
59
Patent #:
6245615
Issue Dt:
06/12/2001
Application #:
09386181
Filing Dt:
08/31/1999
Title:
METHOD AND APPARATUS ON (110) SURFACES OF SILICON STRUCTURES WITH CONDUCTION IN THE <110> DIRECTION
60
Patent #:
6383871
Issue Dt:
05/07/2002
Application #:
09386185
Filing Dt:
08/31/1999
Title:
METHOD OF FORMING MULTIPLE OXIDE THICKNESSES FOR MERGED MEMORY AND LOGIC APPLICATIONS
61
Patent #:
6175221
Issue Dt:
01/16/2001
Application #:
09386312
Filing Dt:
08/31/1999
Title:
FREQUENCY SENSING NMOS VOLTAGE REGULATOR
62
Patent #:
6483171
Issue Dt:
11/19/2002
Application #:
09386313
Filing Dt:
08/13/1999
Title:
VERTICAL SUB-MICRON CMOS TRANSISTORS ON (110), (111), (311), (511), AND HIGHER ORDER SURFACES OF BULK, SOI AND THIN FILM STRUCTURES AND METHOD OF FORMING SAME
63
Patent #:
6238824
Issue Dt:
05/29/2001
Application #:
09386314
Filing Dt:
08/31/1999
Title:
METHOD FOR DESIGNING AND MAKING PHOTOLITHOGRAPHIC RETICLE, RETICLE, AND PHOTOLITHOGRAPHIC PROCESS
64
Patent #:
6436748
Issue Dt:
08/20/2002
Application #:
09386315
Filing Dt:
08/31/1999
Title:
METHOD FOR FABRICATING CMOS TRANSISTORS HAVING MATCHING CHARACTERISTICS AND APPARATUS FORMED THEREBY
65
Patent #:
6208519
Issue Dt:
03/27/2001
Application #:
09386319
Filing Dt:
08/31/1999
Title:
THERMALLY ENHANCED SEMICONDUCTOR PACKAGE
66
Patent #:
6380787
Issue Dt:
04/30/2002
Application #:
09386505
Filing Dt:
08/31/1999
Title:
INTEGRATED CIRCUIT AND METHOD FOR MINIMIZING CLOCK SKEWS
67
Patent #:
6212767
Issue Dt:
04/10/2001
Application #:
09386623
Filing Dt:
08/31/1999
Title:
ASSEMBLING A STACKED DIE PACKAGE
68
Patent #:
6206754
Issue Dt:
03/27/2001
Application #:
09386645
Filing Dt:
08/31/1999
Title:
ENDPOINT DETECTION APPARATUS, PLANARIZING MACHINES WITH ENDPOINTING APPARATUS, AND ENDPOINTING METHODS FOR MECHANICAL OR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATE ASSEMBLIES
69
Patent #:
6464824
Issue Dt:
10/15/2002
Application #:
09386648
Filing Dt:
08/31/1999
Title:
METHODS AND APPARATUSES FOR MONITORING AND CONTROLLING MECHANICAL OR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATE ASSEMBLIES
70
Patent #:
6742074
Issue Dt:
05/25/2004
Application #:
09386808
Filing Dt:
08/31/1999
Publication #:
US20030084223
Pub Dt:
05/01/2003
Title:
BUS TO SYSTEM MEMORY DELAYED READ PROCESSING
71
Patent #:
6291364
Issue Dt:
09/18/2001
Application #:
09386941
Filing Dt:
08/31/1999
Title:
METHOD AND APPARATUS FOR STABILIZING HIGH PRESSURE OXIDATION OF A SEMICONDUCTOR DEVICE
72
Patent #:
6210992
Issue Dt:
04/03/2001
Application #:
09386971
Filing Dt:
08/31/1999
Title:
CONTROLLING PACKAGING ENCAPSULANT LEAKAGE
73
Patent #:
6330647
Issue Dt:
12/11/2001
Application #:
09386973
Filing Dt:
08/31/1999
Title:
MEMORY BANDWIDTH ALLOCATION BASED ON ACCESS COUNT PRIORITY SCHEME
74
Patent #:
6391756
Issue Dt:
05/21/2002
Application #:
09387040
Filing Dt:
08/31/1999
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING CONTACT OPENINGS
75
Patent #:
6187484
Issue Dt:
02/13/2001
Application #:
09387132
Filing Dt:
08/31/1999
Title:
IRRADIATION MASK
76
Patent #:
6140701
Issue Dt:
10/31/2000
Application #:
09387133
Filing Dt:
08/31/1999
Title:
SUPPRESSION OF HILLOCK FORMATION IN THIN ALUMINUM FILMS
77
Patent #:
6244944
Issue Dt:
06/12/2001
Application #:
09387190
Filing Dt:
08/31/1999
Title:
METHOD AND APPARATUS FOR SUPPORTING AND CLEANING A POLISHING PAD FOR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATES
78
Patent #:
6492273
Issue Dt:
12/10/2002
Application #:
09387309
Filing Dt:
08/31/1999
Title:
METHODS AND APPARATUSES FOR MONITORING AND CONTROLLING MECHANICAL OR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATE ASSEMBLIES
79
Patent #:
6424033
Issue Dt:
07/23/2002
Application #:
09387640
Filing Dt:
08/31/1999
Title:
CHIP PACKAGE WITH GREASE HEAT SINK AND METHOD OF MAKING
80
Patent #:
6144593
Issue Dt:
11/07/2000
Application #:
09387650
Filing Dt:
09/01/1999
Title:
CIRCUIT AND METHOD FOR A MULTIPLEXED REDUNDANCY SCHEME IN A MEMORY DEVICE
81
Patent #:
6412768
Issue Dt:
07/02/2002
Application #:
09387774
Filing Dt:
09/01/1999
Title:
SELF-ADJUSTING PRINTED CIRCUIT BOARD SUPPORT AND METHOD OF USE
82
Patent #:
6605331
Issue Dt:
08/12/2003
Application #:
09388045
Filing Dt:
09/01/1999
Title:
ASYMMETRIC TRANSFER MOLDING METHOD AND AN ASYMMETRIC ENCAPSULATION MADE THEREFROM
83
Patent #:
6219293
Issue Dt:
04/17/2001
Application #:
09388126
Filing Dt:
09/01/1999
Title:
METHOD AND APPARATUS FOR SUPPLYING REGULATED POWER TO MEMORY DEVICE COMPONENTS
84
Patent #:
6265297
Issue Dt:
07/24/2001
Application #:
09388133
Filing Dt:
09/01/1999
Title:
AMMONIA PASSIVATION OF METAL GATE ELECTRODES TO INHIBIT OXIDATION OF METAL
85
Patent #:
6168696
Issue Dt:
01/02/2001
Application #:
09388246
Filing Dt:
09/01/1999
Title:
NON-KNURLED INDUCTION COIL FOR IONIZED METAL DEPOSITION, SPUTTERING APPARATUS INCLUDING SAME, AND METHOD OF CONSTRUCTING THE APPARATUS
86
Patent #:
6461915
Issue Dt:
10/08/2002
Application #:
09388287
Filing Dt:
09/01/1999
Publication #:
US20020094636
Pub Dt:
07/18/2002
Title:
METHOD AND STRUCTURE FOR AN IMPROVED FLOATING GATE MEMORY CELL
87
Patent #:
6284660
Issue Dt:
09/04/2001
Application #:
09388450
Filing Dt:
09/02/1999
Title:
METHOD FOR IMPROVING CMP PROCESSING
88
Patent #:
7388289
Issue Dt:
06/17/2008
Application #:
09388567
Filing Dt:
09/02/1999
Title:
LOCAL MULTILAYERED METALLIZATION
89
Patent #:
6509278
Issue Dt:
01/21/2003
Application #:
09388660
Filing Dt:
09/02/1999
Title:
METHOD OF FORMING A SEMICONDUCTOR CONTACT THAT INCLUDES SELECTIVELY REMOVING A TI-CONTAINING LAYER FROM THE SURFACE
90
Patent #:
6217645
Issue Dt:
04/17/2001
Application #:
09388667
Filing Dt:
09/02/1999
Title:
METHOD OF DEPOSITING FILMS BY USING CARBOXYLATE COMPLEXES
91
Patent #:
6366266
Issue Dt:
04/02/2002
Application #:
09388671
Filing Dt:
09/02/1999
Title:
METHOD AND APPARATUS FOR PROGRAMMABLE FIELD EMISSION DISPLAY
92
Patent #:
6258729
Issue Dt:
07/10/2001
Application #:
09388685
Filing Dt:
09/02/1999
Title:
OXIDE ETCHING METHOD AND STRUCTURES RESULTING FROM SAME
93
Patent #:
6553510
Issue Dt:
04/22/2003
Application #:
09388687
Filing Dt:
09/02/1999
Title:
MEMORY DEVICE INCLUDING REDUNDANCY ROUTINE FOR CORRECTING RANDOM ERRORS
94
Patent #:
6249047
Issue Dt:
06/19/2001
Application #:
09388706
Filing Dt:
09/02/1999
Title:
BALL ARRAY LAYOUT
95
Patent #:
6391801
Issue Dt:
05/21/2002
Application #:
09388731
Filing Dt:
09/01/1999
Title:
METHOD OF FORMING A LAYER COMPRISING TUNGSTEN OXIDE
96
Patent #:
6376909
Issue Dt:
04/23/2002
Application #:
09388764
Filing Dt:
09/02/1999
Title:
MIXED-MODE STACKED INTEGRATED CIRCUIT WITH POWER SUPPLY CIRCUIT PART OF THE STACK
97
Patent #:
6180508
Issue Dt:
01/30/2001
Application #:
09388769
Filing Dt:
09/02/1999
Title:
METHODS OF FABRICATING BURIED DIGIT LINES AND SEMICONDUCTOR DEVICES INCLUDING SAME
98
Patent #:
6273796
Issue Dt:
08/14/2001
Application #:
09388828
Filing Dt:
09/01/1999
Title:
METHOD AND APPARATUS FOR PLANARIZING A MICROELECTRONIC SUBSTRATE WITH A TILTED PLANARIZING SURFACE
99
Patent #:
6436805
Issue Dt:
08/20/2002
Application #:
09388832
Filing Dt:
09/01/1999
Title:
LOCAL INTERCONNECT STRUCTURES AND METHODS FOR MAKING THE SAME
100
Patent #:
6579751
Issue Dt:
06/17/2003
Application #:
09388856
Filing Dt:
09/01/1999
Publication #:
US20010051407
Pub Dt:
12/13/2001
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY
Assignor
1
JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Exec Dt:
07/31/2019
Assignees
1
MICRON TECHNOLOGY, INC.
8000 S FEDERAL WAY
BOISE, IDAHO 83707
2
MICRON SEMICONDUCTOR PRODUCTS, INC.
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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