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Patent Assignment Details
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Reel/Frame:054633/0001   Pages: 1245
Recorded: 11/02/2020
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 8468
Page 11 of 85
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85
1
Patent #:
Issue Dt:
04/04/2006
Application #:
10341187
Filing Dt:
01/13/2003
Publication #:
Pub Dt:
07/15/2004
Title:
TRENCH CAPACITOR VERTICAL STRUCTURE
2
Patent #:
Issue Dt:
04/06/2004
Application #:
10341819
Filing Dt:
01/14/2003
Publication #:
Pub Dt:
07/24/2003
Title:
ULTIMATE SIMOX
3
Patent #:
Issue Dt:
01/19/2010
Application #:
10341863
Filing Dt:
01/14/2003
Publication #:
Pub Dt:
07/15/2004
Title:
SHALLOW TRENCH ISOLATION PROCESS
4
Patent #:
Issue Dt:
04/27/2004
Application #:
10342419
Filing Dt:
01/14/2003
Title:
DRAM HAVING OFFSET VERTICAL TRANSISTORS AND METHOD
5
Patent #:
Issue Dt:
08/31/2004
Application #:
10345288
Filing Dt:
01/16/2003
Publication #:
Pub Dt:
06/05/2003
Title:
METHOD TO SELECTIVELY CAP INTERCONNECTS WITH INDIUM OR TIN BRONZES AND/OR OXIDES THEREOF AND THE INTERCONNECT SO CAPPED
6
Patent #:
Issue Dt:
04/13/2004
Application #:
10345344
Filing Dt:
01/15/2003
Title:
LOW-K GATE SPACERS BY FLUORINE IMPLANTATION
7
Patent #:
Issue Dt:
01/11/2005
Application #:
10345472
Filing Dt:
01/15/2003
Publication #:
Pub Dt:
07/15/2004
Title:
LOW-GIDL MOSFET STRUCTURE AND METHOD FOR FABRICATION
8
Patent #:
Issue Dt:
03/16/2004
Application #:
10346437
Filing Dt:
01/16/2003
Publication #:
Pub Dt:
06/12/2003
Title:
METHOD FOR FORMING REFRACTORY METAL-SILICON-NITROGEN CAPACITORS AND STRUCTURES FORMED
9
Patent #:
Issue Dt:
10/05/2004
Application #:
10348014
Filing Dt:
01/22/2003
Title:
RING OSCILLATOR WITH EMBEDDED SCATTEROMETRY GRATE ARRAY
10
Patent #:
Issue Dt:
07/13/2004
Application #:
10348910
Filing Dt:
01/23/2003
Title:
NARROW FIN FINFET
11
Patent #:
Issue Dt:
03/30/2004
Application #:
10351919
Filing Dt:
01/27/2003
Publication #:
Pub Dt:
08/07/2003
Title:
MICRO-STRUCTURES AND METHODS FOR THEIR MANUFACTURE
12
Patent #:
Issue Dt:
04/27/2004
Application #:
10360719
Filing Dt:
02/10/2003
Title:
ENGINEERED METAL GATE ELECTRODE
13
Patent #:
Issue Dt:
06/08/2004
Application #:
10361086
Filing Dt:
02/07/2003
Publication #:
Pub Dt:
01/01/2004
Title:
PHASE-LOCKED LOOP WITH AUTOMATIC FREQUENCY TUNING
14
Patent #:
Issue Dt:
06/06/2006
Application #:
10361088
Filing Dt:
02/07/2003
Publication #:
Pub Dt:
05/06/2004
Title:
EQUALIZING CIRCUIT WITH NOTCH COMPENSATION FOR A DIRECT COVERSION RECEIVER
15
Patent #:
Issue Dt:
08/08/2006
Application #:
10366780
Filing Dt:
02/13/2003
Publication #:
Pub Dt:
08/07/2003
Title:
NITROGEN-CONTAINING POLYMERS AS POROGENS IN THE PREPARATION OF HIGHLY POROUS, LOW DIELECTRIC CONSTANT MATERIALS
16
Patent #:
Issue Dt:
06/15/2004
Application #:
10367407
Filing Dt:
02/14/2003
Title:
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE USING AMORPHOUS CARBON HAVING IMPROVED ETCH RESISTANCE
17
Patent #:
Issue Dt:
06/20/2006
Application #:
10370325
Filing Dt:
02/19/2003
Title:
SIMULTANEOUS MULTIPROCESSOR MEMORY TESTING AND INITIALIZATION
18
Patent #:
Issue Dt:
11/02/2004
Application #:
10371270
Filing Dt:
02/21/2003
Publication #:
Pub Dt:
08/14/2003
Title:
DEFECT-FREE DIELECTRIC COATINGS AND PREPARATION THEREOF USING POLYMERIC NITROGENOUS POROGENS
19
Patent #:
Issue Dt:
09/21/2004
Application #:
10374395
Filing Dt:
02/26/2003
Publication #:
Pub Dt:
08/14/2003
Title:
SEMICONDUCTOR DEVICE INCORPORATING ELEMENTS FORMED OF REFRACTORY METAL-SILICON-NITROGEN AND METHOD FOR FABRICATION
20
Patent #:
Issue Dt:
03/16/2004
Application #:
10376399
Filing Dt:
02/28/2003
Title:
METHOD FOR FORMING AN ALLOYED METAL CONDUCTIVE ELEMENT OF AN INTEGRATED CIRCUIT
21
Patent #:
Issue Dt:
03/20/2007
Application #:
10377359
Filing Dt:
02/28/2003
Publication #:
Pub Dt:
09/02/2004
Title:
METHOD, APPARATUS AND PROGRAM STORAGE DEVICE FOR PROVIDING DATA PATH OPTIMIZATION
22
Patent #:
Issue Dt:
11/09/2004
Application #:
10377388
Filing Dt:
02/28/2003
Publication #:
Pub Dt:
09/02/2004
Title:
MULTIPLE GATE MOSFET STRUCTURE WITH STRAINED SI FIN BODY
23
Patent #:
Issue Dt:
04/27/2004
Application #:
10379239
Filing Dt:
03/03/2003
Publication #:
Pub Dt:
07/24/2003
Title:
SELF-ALIGNED TRIPLE GATE SILICON-ON-INSULATOR (SOI) DEVICE
24
Patent #:
Issue Dt:
12/16/2003
Application #:
10382736
Filing Dt:
03/05/2003
Publication #:
Pub Dt:
09/04/2003
Title:
DAMASCENE CAPACITOR HAVING A RECESSED PLATE
25
Patent #:
Issue Dt:
06/01/2004
Application #:
10382894
Filing Dt:
03/06/2003
Publication #:
Pub Dt:
08/14/2003
Title:
HIGH DIELECTRIC CONSTANT MATERIALS FORMING COMPONENTS OF DRAM SUCH AS DEEP-TRENCH CAPACITORS AND GATE DIELECTRIC (INSULATORS) FOR SUPPORT CIRCUITS
26
Patent #:
Issue Dt:
08/31/2004
Application #:
10383119
Filing Dt:
03/05/2003
Title:
POLARIZATION MEASUREMENT DEVICE AND METHOD
27
Patent #:
Issue Dt:
08/10/2004
Application #:
10384350
Filing Dt:
03/07/2003
Title:
METHOD AND STRUCTURE FOR LOW-K DIELECTRIC CONSTANT APPLICATIONS
28
Patent #:
Issue Dt:
09/07/2004
Application #:
10385753
Filing Dt:
03/12/2003
Title:
METHOD FOR FORMING A FIN IN A FINFET DEVICE
29
Patent #:
Issue Dt:
02/21/2006
Application #:
10388538
Filing Dt:
03/17/2003
Publication #:
Pub Dt:
09/23/2004
Title:
TUNABLE THIN FILM OPTICAL DEVICES AND FABRICATION METHODS FOR TUNABLE THIN FILM OPTICAL DEVICES
30
Patent #:
Issue Dt:
11/07/2006
Application #:
10392983
Filing Dt:
03/21/2003
Publication #:
Pub Dt:
09/23/2004
Title:
ELECTRONIC DEVICE INCLUDING A SELF-ASSEMBLED MONOLAYER, AND A METHOD OF FABRICATING THE SAME
31
Patent #:
Issue Dt:
12/14/2004
Application #:
10396274
Filing Dt:
03/25/2003
Publication #:
Pub Dt:
10/02/2003
Title:
LOW-K INTERCONNECT STRUCTURE COMPRISED OF A MULTILAYER OF SPIN-ON POROUS DIELECTRICS
32
Patent #:
Issue Dt:
12/01/2009
Application #:
10400226
Filing Dt:
03/27/2003
Publication #:
Pub Dt:
04/01/2004
Title:
SEMICONDUCTOR DEVICE HAVING IMPROVED HALO STRUCTURES AND A METHOD OF FORMING THE HALO STRUCTURES OF A SEMICONDUCTOR DEVICE
33
Patent #:
Issue Dt:
08/23/2005
Application #:
10401410
Filing Dt:
03/27/2003
Publication #:
Pub Dt:
09/30/2004
Title:
COMPUTER CHIP HEAT RESPONSIVE METHOD AND APPARATUS
34
Patent #:
Issue Dt:
10/31/2006
Application #:
10401564
Filing Dt:
03/31/2003
Publication #:
Pub Dt:
09/30/2004
Title:
THERMAL MEMORY CELL AND MEMORY DEVICE INCLUDING THE THERMAL MEMORY CELL
35
Patent #:
Issue Dt:
01/04/2005
Application #:
10402585
Filing Dt:
03/28/2003
Publication #:
Pub Dt:
04/01/2004
Title:
CIRCUIT ELEMENT HAVING A METAL SILICIDE REGION THERMALLY STABILIZED BY A BARRIER DIFFUSION MATERIAL
36
Patent #:
Issue Dt:
11/02/2004
Application #:
10403584
Filing Dt:
03/31/2003
Publication #:
Pub Dt:
01/29/2004
Title:
METHOD OF FILLING AN OPENING IN A MATERIAL LAYER WITH AN INSULATING MATERIAL
37
Patent #:
Issue Dt:
04/04/2006
Application #:
10405295
Filing Dt:
04/02/2003
Title:
DYNAMICALLY ADJUSTABLE PROBE TIPS
38
Patent #:
Issue Dt:
11/06/2007
Application #:
10406131
Filing Dt:
04/03/2003
Title:
BMC-HOSTED BOOT ROM INTERFACE
39
Patent #:
Issue Dt:
08/30/2005
Application #:
10409778
Filing Dt:
04/08/2003
Publication #:
Pub Dt:
09/11/2003
Title:
INCREASED CAPACITANCE TRENCH CAPACITOR
40
Patent #:
Issue Dt:
07/13/2004
Application #:
10411727
Filing Dt:
04/11/2003
Publication #:
Pub Dt:
10/16/2003
Title:
DAMASCENE DOUBLE-GATE FET
41
Patent #:
Issue Dt:
07/27/2004
Application #:
10413829
Filing Dt:
04/15/2003
Publication #:
Pub Dt:
09/25/2003
Title:
MEMORY DEVICE
42
Patent #:
Issue Dt:
06/01/2004
Application #:
10414538
Filing Dt:
04/15/2003
Title:
PRINTED WIRING BOARD THICKNESS CONTROL FOR COMPRESSION CONNECTORS USED IN ELECTRONIC PACKAGING
43
Patent #:
Issue Dt:
10/05/2004
Application #:
10417002
Filing Dt:
04/16/2003
Title:
SYSTEM AND METHOD FOR PROVIDING CAPACITIVE SPARE FILL CELLS IN AN INTEGRATED CIRCUIT
44
Patent #:
Issue Dt:
10/31/2006
Application #:
10419091
Filing Dt:
04/18/2003
Title:
METHOD FOR SELECTIVELY DISABLING INTERRUPTS ON A SECURE EXECUTION MODE-CAPABLE PROCESSOR
45
Patent #:
Issue Dt:
02/24/2009
Application #:
10419120
Filing Dt:
04/18/2003
Title:
METHOD AND APPARATUS FOR CONTROLLING OPERATION OF A SECURE EXECUTION MODE-CAPABLE PROCESSOR IN SYSTEM MANAGEMENT MODE
46
Patent #:
Issue Dt:
07/04/2006
Application #:
10420721
Filing Dt:
04/23/2003
Publication #:
Pub Dt:
10/28/2004
Title:
METHOD OF FORMING A METAL GATE STRUCTURE WITH TUNING OF WORK FUNCTION BY SILICON INCORPORATION
47
Patent #:
Issue Dt:
05/25/2004
Application #:
10421272
Filing Dt:
04/23/2003
Publication #:
Pub Dt:
10/09/2003
Title:
PRINTED WIRING BOARD
48
Patent #:
Issue Dt:
02/24/2004
Application #:
10421963
Filing Dt:
04/23/2003
Publication #:
Pub Dt:
10/23/2003
Title:
METHOD AND APPARATUS FOR ADJUSTING CONTROL CIRCUIT PULL-UP MARGIN FOR CONTENT ADDRESSABLE MEMORY (CAM)
49
Patent #:
Issue Dt:
09/28/2004
Application #:
10421969
Filing Dt:
04/23/2003
Publication #:
Pub Dt:
11/13/2003
Title:
METHOD FOR FORMING A RETROGRADE IMPLANT
50
Patent #:
Issue Dt:
06/08/2004
Application #:
10422492
Filing Dt:
04/24/2003
Publication #:
Pub Dt:
03/04/2004
Title:
SEMICONDUCTOR DEVICE HAVING A POLYSILICON LINE STRUCTURE WITH INCREASED METAL SILICIDE PORTIONS AND METHOD FOR FORMING THE POLYSILICON LINE STRUCTURE OF A SEMICONDUCTOR DEVICE
51
Patent #:
Issue Dt:
03/07/2006
Application #:
10422665
Filing Dt:
04/24/2003
Publication #:
Pub Dt:
10/23/2003
Title:
SOI DEVICE WITH REDUCED JUNCTION CAPACITANCE
52
Patent #:
Issue Dt:
01/31/2006
Application #:
10422794
Filing Dt:
04/25/2003
Publication #:
Pub Dt:
10/30/2003
Title:
PRODUCTION OF METAL INSULATOR METAL (MIM) STRUCTURES USING ANODIZING PROCESS
53
Patent #:
Issue Dt:
04/25/2006
Application #:
10423993
Filing Dt:
04/25/2003
Title:
SYSTEM AND METHOD FOR FACILITATING COMMUNICATION ACROSS AN ASYNCHRONOUS CLOCK BOUNDARY
54
Patent #:
Issue Dt:
11/02/2004
Application #:
10425270
Filing Dt:
04/29/2003
Publication #:
Pub Dt:
10/30/2003
Title:
EPITAXIAL BASE BIPOLAR TRANSISTOR WITH RAISED EXTRINSIC BASE
55
Patent #:
Issue Dt:
02/13/2007
Application #:
10425974
Filing Dt:
04/29/2003
Title:
DDR ON-THE-FLY SYNCHRONIZATION
56
Patent #:
Issue Dt:
09/12/2006
Application #:
10426040
Filing Dt:
04/29/2003
Title:
BUS ARCHITECTURE USING DEBUG PACKETS TO MONITOR TRANSACTIONS ON AN INTERNAL DATA PROCESSOR BUS
57
Patent #:
Issue Dt:
09/28/2004
Application #:
10426336
Filing Dt:
04/30/2003
Publication #:
Pub Dt:
10/30/2003
Title:
VERTICAL THERMAL NITRIDE MASK (ANTI-COLLAR) AND PROCESSING THEREOF
58
Patent #:
Issue Dt:
03/23/2004
Application #:
10426337
Filing Dt:
04/30/2003
Publication #:
Pub Dt:
10/30/2003
Title:
RELAXED SIGE LAYERS ON SI OR SILICON-ON-INSULATOR SUBSTRATES BY ION IMPLANTATION AND THERMAL ANNEALING
59
Patent #:
Issue Dt:
05/02/2006
Application #:
10426487
Filing Dt:
04/30/2003
Title:
APPARATUS AND METHOD FOR INITIATING A SLEEP STATE IN A SYSTEM ON A CHIP DEVICE
60
Patent #:
Issue Dt:
05/30/2006
Application #:
10426755
Filing Dt:
04/30/2003
Title:
SYSTEM AND METHOD FOR BLOCKING CACHE USE DURING DEBUGGING
61
Patent #:
Issue Dt:
10/19/2004
Application #:
10428270
Filing Dt:
05/02/2003
Title:
EUV MASK WHICH FACILITATES ELECTRO-STATIC CHUCKING
62
Patent #:
Issue Dt:
11/02/2004
Application #:
10428705
Filing Dt:
05/02/2003
Publication #:
Pub Dt:
01/15/2004
Title:
SELF-ALIGNED DOG-BONE STRUCTURE FOR FINFET APPLICATIONS AND METHODS TO FABRICATE THE SAME
63
Patent #:
Issue Dt:
09/04/2007
Application #:
10429159
Filing Dt:
05/02/2003
Publication #:
Pub Dt:
11/04/2004
Title:
SPECULATION POINTERS TO IDENTIFY DATA-SPECULATIVE OPERATIONS IN MICROPROCESSOR
64
Patent #:
Issue Dt:
07/20/2004
Application #:
10429697
Filing Dt:
05/06/2003
Title:
FINFET-BASED SRAM CELL
65
Patent #:
Issue Dt:
02/19/2008
Application #:
10434692
Filing Dt:
05/09/2003
Title:
APPARATUS AND METHOD FOR BALANCED SPINLOCK SUPPORT IN NUMA SYSTEMS
66
Patent #:
Issue Dt:
09/28/2004
Application #:
10434999
Filing Dt:
05/09/2003
Publication #:
Pub Dt:
07/01/2004
Title:
METHOD OF FABRICATING MICRO-ELECTROMECHANICAL SWITCHES ON CMOS COMPATIBLE SUBSTRATES
67
Patent #:
Issue Dt:
01/02/2007
Application #:
10435842
Filing Dt:
05/12/2003
Publication #:
Pub Dt:
11/18/2004
Title:
BUILT-IN SELF TEST SYSTEM AND METHOD
68
Patent #:
Issue Dt:
03/07/2006
Application #:
10436213
Filing Dt:
05/12/2003
Publication #:
Pub Dt:
11/18/2004
Title:
METHOD OF OPTIMIZING AND ANALYZING SELECTED PORTIONS OF A DIGITAL INTEGRATED CIRCUIT
69
Patent #:
Issue Dt:
03/15/2005
Application #:
10436432
Filing Dt:
05/12/2003
Publication #:
Pub Dt:
11/18/2004
Title:
COUPLED BODY CONTACTS FOR SOI DIFFERENTIAL CIRCUITS
70
Patent #:
Issue Dt:
09/28/2004
Application #:
10440847
Filing Dt:
05/19/2003
Title:
NICKEL ALLOY FOR SMOS PROCESS SILICIDATION
71
Patent #:
Issue Dt:
07/19/2005
Application #:
10442131
Filing Dt:
05/21/2003
Publication #:
Pub Dt:
11/25/2004
Title:
MULTIPLE-GATE MOS DEVICE AND METHOD FOR MAKING THE SAME
72
Patent #:
Issue Dt:
08/30/2005
Application #:
10442975
Filing Dt:
05/22/2003
Title:
STRAINED-SILICON DEVICE WITH DIFFERENT SILICON THICKNESSES
73
Patent #:
Issue Dt:
01/06/2004
Application #:
10444226
Filing Dt:
05/23/2003
Title:
COLUMN REDUNDANCY SYSTEM AND METHOD FOR A MICRO-CELL EMBEDDED DRAM (E-DRAM) ARCHITECTURE
74
Patent #:
Issue Dt:
11/09/2004
Application #:
10446297
Filing Dt:
05/28/2003
Publication #:
Pub Dt:
12/02/2004
Title:
MAGNETIC RANDOM ACCESS MEMORY USING MEMORY CELLS WITH ROTATED MAGNETIC STORAGE ELEMENTS
75
Patent #:
Issue Dt:
11/21/2006
Application #:
10447047
Filing Dt:
05/28/2003
Publication #:
Pub Dt:
12/02/2004
Title:
METHOD OF FABRICATING BODY-TIED SOI TRANSISTOR HAVING HALO IMPLANT REGION UNDERLYING HAMMERHEAD PORTION OF GATE
76
Patent #:
Issue Dt:
09/14/2004
Application #:
10448723
Filing Dt:
05/30/2003
Title:
SRAM CELL WITH BOOTSTRAPPED POWER LINE
77
Patent #:
Issue Dt:
11/09/2004
Application #:
10448776
Filing Dt:
05/29/2003
Publication #:
Pub Dt:
12/02/2004
Title:
BI-DIRECTIONAL READ WRITE DATA STRUCTURE AND METHOD FOR MEMORY
78
Patent #:
Issue Dt:
04/11/2006
Application #:
10448954
Filing Dt:
05/30/2003
Publication #:
Pub Dt:
12/02/2004
Title:
SIGE LATTICE ENGINEERING USING A COMBINATION OF OXIDATION, THINNING AND EPITAXIAL REGROWTH
79
Patent #:
Issue Dt:
04/05/2005
Application #:
10455601
Filing Dt:
06/05/2003
Publication #:
Pub Dt:
12/09/2004
Title:
DECODE PATH GATED LOW ACTIVE POWER SRAM
80
Patent #:
Issue Dt:
05/24/2005
Application #:
10458147
Filing Dt:
06/10/2003
Publication #:
Pub Dt:
12/16/2004
Title:
SYSTEM AND METHOD FOR WRITING TO A MAGNETIC SHIFT REGISTER
81
Patent #:
Issue Dt:
12/21/2004
Application #:
10458554
Filing Dt:
06/10/2003
Publication #:
Pub Dt:
12/16/2004
Title:
SHIFTABLE MAGNETIC SHIFT REGISTER AND METHOD OF USING THE SAME
82
Patent #:
Issue Dt:
07/27/2004
Application #:
10459328
Filing Dt:
06/11/2003
Title:
METHOD FOR FORMING DUAL INLAID STRUCTURES FOR IC INTERCONNECTIONS
83
Patent #:
Issue Dt:
10/18/2011
Application #:
10459344
Filing Dt:
06/11/2003
Title:
FASTER MEMORY ACCESS IN NON-UNIFIED MEMORY ACCESS SYSTEMS
84
Patent #:
Issue Dt:
06/29/2004
Application #:
10459579
Filing Dt:
06/12/2003
Title:
DUAL SILICON LAYER FOR CHEMICAL MECHANICAL POLISHING PLANARIZATION
85
Patent #:
Issue Dt:
02/24/2004
Application #:
10459978
Filing Dt:
06/12/2003
Title:
MICRO-ELECTROMECHANICAL VARACTOR WITH ENHANCED TUNING RANGE
86
Patent #:
Issue Dt:
11/09/2004
Application #:
10460615
Filing Dt:
06/11/2003
Title:
METHOD OF SIMULTANEOUS DISPLAY OF DIE AND WAFER CHARACTERIZATION IN INTEGRATED CIRCUIT TECHNOLOGY DEVELOPMENT
87
Patent #:
Issue Dt:
05/30/2006
Application #:
10461090
Filing Dt:
06/13/2003
Publication #:
Pub Dt:
12/16/2004
Title:
BILAYERED METAL HARDMASKS FOR USE IN DUAL DAMASCENE ETCH SCHEMES
88
Patent #:
Issue Dt:
01/11/2005
Application #:
10461821
Filing Dt:
06/13/2003
Publication #:
Pub Dt:
11/13/2003
Title:
FULLY-DEPLETED SOI MOSFETS WITH LOW SOURCE AND DRAIN RESISTANCE AND MINIMAL OVERLAP CAPACITANCE USING A RECESSED CHANNEL DAMASCENE GATE PROCESS
89
Patent #:
Issue Dt:
08/09/2005
Application #:
10462933
Filing Dt:
06/17/2003
Publication #:
Pub Dt:
12/23/2004
Title:
HIGH SPEED LATERAL HETEROJUNCTION MISFETS REALIZED BY 2-DIMENSIONAL BANDGAP ENGINEERING AND METHODS THEREOF
90
Patent #:
Issue Dt:
04/17/2007
Application #:
10463038
Filing Dt:
06/17/2003
Publication #:
Pub Dt:
08/12/2004
Title:
ULTRA SCALABLE HIGH SPEED HETEROJUNCTION VERTICAL N-CHANNEL MISFETS AND METHODS THEREOF
91
Patent #:
Issue Dt:
04/27/2004
Application #:
10464339
Filing Dt:
06/18/2003
Publication #:
Pub Dt:
11/13/2003
Title:
ALL-IN-ONE DISPOSABLE/PERMANENT SPACER ELEVATED SOURCE/DRAIN, SELF-ALIGNED SILICIDE CMOS
92
Patent #:
Issue Dt:
07/27/2004
Application #:
10464400
Filing Dt:
06/19/2003
Publication #:
Pub Dt:
11/20/2003
Title:
ASYMMETRICAL MOSFET LAYOUT FOR HIGH CURRENTS AND HIGH SPEED OPERATION
93
Patent #:
Issue Dt:
02/15/2005
Application #:
10465506
Filing Dt:
06/19/2003
Publication #:
Pub Dt:
11/20/2003
Title:
CHIP AND WAFER INTEGRATION PROCESS USING VERTICAL CONNECTIONS
94
Patent #:
Issue Dt:
05/16/2006
Application #:
10465797
Filing Dt:
06/20/2003
Publication #:
Pub Dt:
12/23/2004
Title:
NONVOLATILE MEMORY DEVICE USING SEMICONDUCTOR NANOCRYSTALS AND METHOD OF FORMING SAME
95
Patent #:
Issue Dt:
02/07/2006
Application #:
10499538
Filing Dt:
06/21/2004
Publication #:
Pub Dt:
03/03/2005
Title:
ELECTRODE STRUCTURE FOR ELECTRONIC AND OPTO-ELECTRONIC DEVICES
96
Patent #:
Issue Dt:
08/14/2007
Application #:
10523310
Filing Dt:
01/27/2005
Publication #:
Pub Dt:
01/26/2006
Title:
DIAPHRAGM ACTIVATED MICRO-ELECTROMECHANICAL SWITCH
97
Patent #:
Issue Dt:
06/17/2008
Application #:
10536483
Filing Dt:
05/24/2005
Publication #:
Pub Dt:
03/16/2006
Title:
STRAINED FINFET CMOS DEVICE STRUCTURES
98
Patent #:
Issue Dt:
02/12/2008
Application #:
10537238
Filing Dt:
05/31/2005
Publication #:
Pub Dt:
05/04/2006
Title:
METHOD AND DEVICE FOR FLOWING A LIQUID ON A SURFACE
99
Patent #:
Issue Dt:
08/08/2006
Application #:
10539333
Filing Dt:
06/15/2005
Publication #:
Pub Dt:
06/15/2006
Title:
INTEGRATED ANTIFUSE STRUCTURE FOR FINFET AND CMOS DEVICES
100
Patent #:
Issue Dt:
04/26/2011
Application #:
10596022
Filing Dt:
05/25/2006
Publication #:
Pub Dt:
01/15/2009
Title:
CARBON NANOTUBE CONDUCTOR FOR TRENCH CAPACITORS
Assignor
1
Exec Dt:
10/22/2020
Assignee
1
2600 GREAT AMERICA WAY
SANTA CLARA, CALIFORNIA 95054
Correspondence name and address
GLOBALFOUNDRIES SINGAPORE PTE. LTD.
60 WOODLANDS INDUSTRIAL PARK D STREET 2,
SINGAPORE, 738406 SINGAPORE

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