skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:047540/0001   Pages: 843
Recorded: 07/13/2018
Attorney Dkt #:509265/2155
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
06/10/2014
Application #:
13337943
Filing Dt:
12/27/2011
Publication #:
Pub Dt:
04/19/2012
Title:
MICROELECTRONIC DEVICES AND METHODS FOR FILING VIAS IN MICROELECTRONIC DEVICES
2
Patent #:
Issue Dt:
05/28/2013
Application #:
13338484
Filing Dt:
12/28/2011
Publication #:
Pub Dt:
04/26/2012
Title:
METHODS OF FORMING SILICON OXIDES AND METHODS OF FORMING INTERLEVEL DIELECTRICS
3
Patent #:
Issue Dt:
07/30/2013
Application #:
13338527
Filing Dt:
12/28/2011
Publication #:
Pub Dt:
04/26/2012
Title:
Capacitors Including Conductive TiOxNx
4
Patent #:
Issue Dt:
09/10/2013
Application #:
13339692
Filing Dt:
12/29/2011
Publication #:
Pub Dt:
04/26/2012
Title:
Methods of Forming Capacitors
5
Patent #:
Issue Dt:
02/03/2015
Application #:
13339721
Filing Dt:
12/29/2011
Publication #:
Pub Dt:
07/04/2013
Title:
SHARING LOCAL CONTROL LINES ACROSS MULTIPLE PLANES IN A MEMORY DEVICE
6
Patent #:
Issue Dt:
09/15/2015
Application #:
13340375
Filing Dt:
12/29/2011
Publication #:
Pub Dt:
07/04/2013
Title:
Memory Structures and Arrays
7
Patent #:
Issue Dt:
04/16/2013
Application #:
13341418
Filing Dt:
12/30/2011
Publication #:
Pub Dt:
07/19/2012
Title:
SEAMLESS COARSE AND FINE DELAY STRUCTURE FOR HIGH PERFORMANCE DLL
8
Patent #:
Issue Dt:
02/26/2013
Application #:
13341512
Filing Dt:
12/30/2011
Publication #:
Pub Dt:
04/26/2012
Title:
CMOS IMAGER WITH INTEGRATED CIRCUITRY
9
Patent #:
Issue Dt:
12/10/2013
Application #:
13342201
Filing Dt:
01/03/2012
Publication #:
Pub Dt:
05/09/2013
Title:
Semiconductor Structure Having Lateral Through Silicon Via
10
Patent #:
Issue Dt:
03/11/2014
Application #:
13342826
Filing Dt:
01/03/2012
Publication #:
Pub Dt:
06/14/2012
Title:
BOOT BLOCK FEATURES IN SYNCHRONOUS SERIAL INTERFACE NAND
11
Patent #:
Issue Dt:
09/09/2014
Application #:
13342844
Filing Dt:
01/03/2012
Publication #:
Pub Dt:
04/26/2012
Title:
QUANTIZING CIRCUITS WITH VARIABLE PARAMETERS
12
Patent #:
Issue Dt:
07/02/2013
Application #:
13342876
Filing Dt:
01/03/2012
Publication #:
Pub Dt:
04/26/2012
Title:
METHODS AND APPARATUS FOR A STACKED-DIE INTERPOSER
13
Patent #:
Issue Dt:
12/17/2013
Application #:
13343023
Filing Dt:
01/04/2012
Publication #:
Pub Dt:
05/03/2012
Title:
NON-VOLATILE MULTILEVEL MEMORY CELLS
14
Patent #:
Issue Dt:
12/09/2014
Application #:
13343087
Filing Dt:
01/04/2012
Publication #:
Pub Dt:
07/04/2013
Title:
SOURCE/DRAIN ZONES WITH A DELECTRIC PLUG OVER AN ISOLATION REGION BETWEEN ACTIVE REGIONS AND METHODS
15
Patent #:
Issue Dt:
06/25/2013
Application #:
13343668
Filing Dt:
01/04/2012
Publication #:
Pub Dt:
05/16/2013
Title:
MEMORY LAYOUT STRUCTURE
16
Patent #:
Issue Dt:
08/16/2016
Application #:
13344226
Filing Dt:
01/05/2012
Publication #:
Pub Dt:
07/11/2013
Title:
SOLID-STATE RADIATION TRANSDUCER DEVICES HAVING AT LEAST PARTIALLY TRANSPARENT BURIED-CONTACT ELEMENTS, AND ASSOCIATED SYSTEMS AND METHODS
17
Patent #:
Issue Dt:
11/06/2012
Application #:
13344329
Filing Dt:
01/05/2012
Publication #:
Pub Dt:
05/03/2012
Title:
METHOD OF FABRICATING DIFFERENT GATE OXIDES FOR DIFFERENT TRANSISTORS IN AN INTEGRATED CIRCUIT
18
Patent #:
Issue Dt:
12/04/2012
Application #:
13345379
Filing Dt:
01/06/2012
Publication #:
Pub Dt:
05/03/2012
Title:
METHOD AND APPARATUS FOR SENDING DATA FROM MULTIPLE SOURCES OVER A COMMUNICATIONS BUS
19
Patent #:
Issue Dt:
11/04/2014
Application #:
13345417
Filing Dt:
01/06/2012
Publication #:
Pub Dt:
04/26/2012
Title:
MULTI-RESISTIVE INTEGRATED CIRCUIT MEMORY
20
Patent #:
Issue Dt:
09/01/2015
Application #:
13345422
Filing Dt:
01/06/2012
Publication #:
Pub Dt:
07/11/2013
Title:
INTEGRATED CIRCUIT CONSTRUCTIONS HAVING THROUGH SUBSTRATE VIAS AND METHODS OF FORMING INTEGRATED CIRCUIT CONSTRUCTIONS HAVING THROUGH SUBSTRATE VIAS
21
Patent #:
Issue Dt:
08/12/2014
Application #:
13345446
Filing Dt:
01/06/2012
Publication #:
Pub Dt:
05/03/2012
Title:
ELECTRONIC DEVICE WITH ASYMMETRIC GATE STRAIN
22
Patent #:
Issue Dt:
07/22/2014
Application #:
13345530
Filing Dt:
01/06/2012
Publication #:
Pub Dt:
05/10/2012
Title:
LOW POWER, HASH-CONTENT ADDRESSABLE MEMORY ARCHITECTURE
23
Patent #:
Issue Dt:
10/16/2012
Application #:
13345896
Filing Dt:
01/09/2012
Publication #:
Pub Dt:
05/03/2012
Title:
PROGRAMMING ERROR CORRECTION CODE INTO A SOLID STATE MEMORY DEVICE WITH VARYING BITS PER CELL
24
Patent #:
Issue Dt:
03/19/2013
Application #:
13345984
Filing Dt:
01/09/2012
Publication #:
Pub Dt:
05/03/2012
Title:
ELECTRONIC APPARATUS CONTAINING LANTHANIDE YTTRIUM ALUMINUM OXIDE
25
Patent #:
Issue Dt:
06/24/2014
Application #:
13346076
Filing Dt:
01/09/2012
Title:
INTEGRATED CIRCUIT DICE WITH EDGE FINISHING
26
Patent #:
Issue Dt:
04/16/2013
Application #:
13346115
Filing Dt:
01/09/2012
Publication #:
Pub Dt:
05/03/2012
Title:
SYSTEMS AND METHODS FOR ERASING A MEMORY
27
Patent #:
Issue Dt:
10/16/2012
Application #:
13346290
Filing Dt:
01/09/2012
Publication #:
Pub Dt:
05/03/2012
Title:
MACRO AND COMMAND EXECUTION FROM MEMORY ARRAY
28
Patent #:
Issue Dt:
08/06/2013
Application #:
13346402
Filing Dt:
01/09/2012
Publication #:
Pub Dt:
05/03/2012
Title:
STACKED MICROELECTRONIC DEVICES AND METHODS FOR MANUFACTURING STACKED MICROELECTRONIC DEVICES
29
Patent #:
Issue Dt:
12/03/2013
Application #:
13346495
Filing Dt:
01/09/2012
Publication #:
Pub Dt:
07/11/2013
Title:
VERTICAL SOLID-STATE TRANSDUCERS AND SOLID-STATE TRANSDUCER ARRAYS HAVING BACKSIDE TERMINALS AND ASSOCIATED SYSTEMS AND METHODS
30
Patent #:
Issue Dt:
01/15/2013
Application #:
13346538
Filing Dt:
01/09/2012
Publication #:
Pub Dt:
05/03/2012
Title:
ERROR SCANNING IN FLASH MEMORY
31
Patent #:
Issue Dt:
11/13/2012
Application #:
13347054
Filing Dt:
01/10/2012
Publication #:
Pub Dt:
05/17/2012
Title:
MEMORY BLOCK MANAGEMENT
32
Patent #:
Issue Dt:
01/01/2013
Application #:
13347478
Filing Dt:
01/10/2012
Publication #:
Pub Dt:
05/03/2012
Title:
METHODS OF FORMING AN INTEGRATED CIRCUIT WITH SELF-ALIGNED TRENCH FORMATION
33
Patent #:
Issue Dt:
05/17/2016
Application #:
13347613
Filing Dt:
01/10/2012
Publication #:
Pub Dt:
07/11/2013
Title:
APPARATUSES AND METHODS FOR LOW POWER CURRENT MODE SENSE AMPLIFICATION
34
Patent #:
Issue Dt:
06/02/2015
Application #:
13347840
Filing Dt:
01/11/2012
Publication #:
Pub Dt:
07/11/2013
Title:
MEMORY CELLS INCLUDING TOP ELECTRODES COMPRISING METAL SILICIDE, APPARATUSES INCLUDING SUCH CELLS, AND RELATED METHODS
35
Patent #:
Issue Dt:
08/12/2014
Application #:
13348447
Filing Dt:
01/11/2012
Publication #:
Pub Dt:
07/11/2013
Title:
CIRCUITS, INTEGRATED CIRCUITS, AND METHODS FOR INTERLEAVED PARITY COMPUTATION
36
Patent #:
Issue Dt:
04/23/2013
Application #:
13348734
Filing Dt:
01/12/2012
Publication #:
Pub Dt:
03/21/2013
Title:
METHOD OF PLANAR IMAGING ON SEMICONDUCTOR CHIPS USING FOCUSED ION BEAM
37
Patent #:
Issue Dt:
02/10/2015
Application #:
13349432
Filing Dt:
01/12/2012
Publication #:
Pub Dt:
07/18/2013
Title:
SEMICONDUCTOR GROWTH SUBSTRATES AND ASSOCIATED SYSTEMS AND METHODS FOR DIE SINGULATION
38
Patent #:
Issue Dt:
06/03/2014
Application #:
13349652
Filing Dt:
01/13/2012
Publication #:
Pub Dt:
07/18/2013
Title:
MEMORY DEVICES AND PROGRAMMING METHODS THAT PROGRAM A MEMORY CELL WITH A DATA VALUE, READ THE DATA VALUE FROM THE MEMORY CELL AND REPROGRAM THE MEMORY CELL WITH THE READ DATA VALUE
39
Patent #:
Issue Dt:
07/14/2015
Application #:
13350061
Filing Dt:
01/13/2012
Publication #:
Pub Dt:
07/18/2013
Title:
MEMORY CELLS HAVING A COMMON GATE TERMINAL
40
Patent #:
Issue Dt:
11/03/2015
Application #:
13350136
Filing Dt:
01/13/2012
Publication #:
Pub Dt:
07/18/2013
Title:
Methods Of Patterning Substrates
41
Patent #:
Issue Dt:
05/12/2015
Application #:
13351106
Filing Dt:
01/16/2012
Publication #:
Pub Dt:
05/17/2012
Title:
ANTIBLOOMING IMAGING APPARATUS, SYSTEMS, AND METHODS
42
Patent #:
Issue Dt:
11/26/2013
Application #:
13351147
Filing Dt:
01/16/2012
Publication #:
Pub Dt:
05/17/2012
Title:
TOPOGRAPHY BASED PATTERNING
43
Patent #:
Issue Dt:
01/21/2014
Application #:
13351148
Filing Dt:
01/16/2012
Publication #:
Pub Dt:
05/10/2012
Title:
METHODS OF OPERATING A MEMORY DEVICE HAVING A BURIED BOOSTING PLATE
44
Patent #:
Issue Dt:
11/06/2012
Application #:
13351525
Filing Dt:
01/17/2012
Publication #:
Pub Dt:
05/10/2012
Title:
MEMORY DEVICE PROGRAM WINDOW ADJUSTMENT
45
Patent #:
Issue Dt:
05/14/2013
Application #:
13351575
Filing Dt:
01/17/2012
Publication #:
Pub Dt:
05/10/2012
Title:
MEMORY DEVICES HAVING REDUNDANT ARRAYS FOR REPAIR
46
Patent #:
Issue Dt:
07/16/2013
Application #:
13351708
Filing Dt:
01/17/2012
Publication #:
Pub Dt:
05/10/2012
Title:
MEMORY DEVICES OPERATED WITHIN A COMMUNICATION PROTOCOL STANDARD TIMEOUT REQUIREMENT
47
Patent #:
Issue Dt:
01/08/2013
Application #:
13352652
Filing Dt:
01/18/2012
Publication #:
Pub Dt:
06/14/2012
Title:
MEMORY ARRAY AND MEMORY DEVICE
48
Patent #:
Issue Dt:
04/19/2016
Application #:
13352680
Filing Dt:
01/18/2012
Publication #:
Pub Dt:
07/18/2013
Title:
RESISTIVE MEMORY CELL STRUCTURES AND METHODS
49
Patent #:
Issue Dt:
07/02/2013
Application #:
13352833
Filing Dt:
01/18/2012
Publication #:
Pub Dt:
05/10/2012
Title:
HIGH-PERFORMANCE DIODE DEVICE STRUCTURE AND MATERIALS USED FOR THE SAME
50
Patent #:
Issue Dt:
10/14/2014
Application #:
13353452
Filing Dt:
01/19/2012
Publication #:
Pub Dt:
05/10/2012
Title:
CONFIGURATION FINALIZATION ON FIRST VALID NAND COMMAND
51
Patent #:
Issue Dt:
12/25/2012
Application #:
13353603
Filing Dt:
01/19/2012
Publication #:
Pub Dt:
05/10/2012
Title:
EXPLICIT SKEW INTERFACE FOR REDUCING CROSSTALK AND SIMULTANEOUS SWITCHING NOISE
52
Patent #:
Issue Dt:
01/28/2014
Application #:
13354163
Filing Dt:
01/19/2012
Publication #:
Pub Dt:
05/17/2012
Title:
Methods of Forming a Non-Volatile Resistive Oxide Memory Array
53
Patent #:
Issue Dt:
09/25/2012
Application #:
13354453
Filing Dt:
01/20/2012
Publication #:
Pub Dt:
05/10/2012
Title:
MITIGATION OF DATA CORRUPTION FROM BACK PATTERN AND PROGRAM DISTURB IN A NON-VOLATILE MEMORY DEVICE
54
Patent #:
Issue Dt:
03/25/2014
Application #:
13354767
Filing Dt:
01/20/2012
Publication #:
Pub Dt:
07/25/2013
Title:
PHOTONIC DEVICE AND METHODS OF FORMATION
55
Patent #:
Issue Dt:
04/17/2018
Application #:
13354957
Filing Dt:
01/20/2012
Publication #:
Pub Dt:
07/25/2013
Title:
SEMICONDUCTOR DEVICE STRUCTURES INCLUDING BURIED DIGIT LINES AND RELATED METHODS
56
Patent #:
Issue Dt:
02/24/2015
Application #:
13354966
Filing Dt:
01/20/2012
Publication #:
Pub Dt:
07/25/2013
Title:
MEMORY CELLS HAVING HEATERS WITH ANGLED SIDEWALLS
57
Patent #:
Issue Dt:
12/10/2013
Application #:
13354982
Filing Dt:
01/20/2012
Publication #:
Pub Dt:
07/25/2013
Title:
METHODS FOR FORMING VERTICAL MEMORY DEVICES AND APPARATUSES
58
Patent #:
Issue Dt:
04/09/2013
Application #:
13355197
Filing Dt:
01/20/2012
Publication #:
Pub Dt:
05/17/2012
Title:
MULTIPLE DEVICE APPARATUS, SYSTEMS, AND METHODS
59
Patent #:
Issue Dt:
11/12/2013
Application #:
13355382
Filing Dt:
01/20/2012
Publication #:
Pub Dt:
07/25/2013
Title:
MEMORY CELLS
60
Patent #:
Issue Dt:
10/08/2013
Application #:
13355407
Filing Dt:
01/20/2012
Publication #:
Pub Dt:
07/25/2013
Title:
METHODS OF FORMING PATTERNS
61
Patent #:
Issue Dt:
07/15/2014
Application #:
13355820
Filing Dt:
01/23/2012
Publication #:
Pub Dt:
07/25/2013
Title:
APPARATUSES AND METHODS FOR READING AND/OR PROGRAMMING DATA IN MEMORY ARRAYS HAVING VARYING AVAILABLE STORAGE RANGES
62
Patent #:
Issue Dt:
05/07/2013
Application #:
13355841
Filing Dt:
01/23/2012
Publication #:
Pub Dt:
07/26/2012
Title:
POWER-OFF APPARATUS, SYSTEMS, AND METHODS
63
Patent #:
Issue Dt:
03/25/2014
Application #:
13355904
Filing Dt:
01/23/2012
Publication #:
Pub Dt:
07/25/2013
Title:
MEMORY CELLS
64
Patent #:
Issue Dt:
12/10/2013
Application #:
13356438
Filing Dt:
01/23/2012
Publication #:
Pub Dt:
05/17/2012
Title:
MICROELECTRONIC DEVICES AND METHODS FOR MANUFACTURING MICROELECTRONIC DEVICES
65
Patent #:
Issue Dt:
12/31/2013
Application #:
13357322
Filing Dt:
01/24/2012
Publication #:
Pub Dt:
05/17/2012
Title:
SEMICONDUCTOR-ON-INSULATOR APPARATUS, DEVICE AND SYSTEM WITH BURIED DECOUPLING CAPACITORS
66
Patent #:
Issue Dt:
07/21/2015
Application #:
13357347
Filing Dt:
01/24/2012
Publication #:
Pub Dt:
05/17/2012
Title:
DRAM WITH NANOFIN TRANSISTORS
67
Patent #:
Issue Dt:
05/13/2014
Application #:
13357472
Filing Dt:
01/24/2012
Publication #:
Pub Dt:
07/26/2012
Title:
METHOD AND APPARATUS FOR COMPILING REGULAR EXPRESSIONS
68
Patent #:
Issue Dt:
09/23/2014
Application #:
13357496
Filing Dt:
01/24/2012
Publication #:
Pub Dt:
07/26/2012
Title:
UTILIZING SPECIAL PURPOSE ELEMENTS TO IMPLEMENT A FSM
69
Patent #:
Issue Dt:
05/13/2014
Application #:
13357505
Filing Dt:
01/24/2012
Publication #:
Pub Dt:
07/26/2012
Title:
UNROLLING QUANTIFICATIONS TO CONTROL IN-DEGREE AND/OR OUT-DEGREE OF AUTOMATON
70
Patent #:
Issue Dt:
06/17/2014
Application #:
13357506
Filing Dt:
01/24/2012
Publication #:
Pub Dt:
05/17/2012
Title:
INTEGRATORS FOR DELTA-SIGMA MODULATORS
71
Patent #:
Issue Dt:
07/22/2014
Application #:
13357511
Filing Dt:
01/24/2012
Publication #:
Pub Dt:
07/26/2012
Title:
STATE GROUPING FOR ELEMENT UTILIZATION
72
Patent #:
Issue Dt:
04/01/2014
Application #:
13357533
Filing Dt:
01/24/2012
Publication #:
Pub Dt:
05/17/2012
Title:
METHOD FOR OPERATING A NAND FLASH MEMORY DEVICE IN MULTIPLE OPERATIONAL MODES
73
Patent #:
Issue Dt:
01/08/2013
Application #:
13357536
Filing Dt:
01/24/2012
Publication #:
Pub Dt:
05/17/2012
Title:
SYSTEM AND METHOD FOR DATA READ OF A SYNCHRONOUS SERIAL INTERFACE NAND
74
Patent #:
Issue Dt:
09/10/2013
Application #:
13358408
Filing Dt:
01/25/2012
Publication #:
Pub Dt:
05/17/2012
Title:
MULTI-PHASE DUTY-CYCLE CORRECTED CLOCK SIGNAL GENERATOR AND MEMORY HAVING SAME
75
Patent #:
Issue Dt:
07/24/2012
Application #:
13358442
Filing Dt:
01/25/2012
Publication #:
Pub Dt:
05/17/2012
Title:
JTAG CONTROLLED SELF-REPAIR AFTER PACKAGING
76
Patent #:
Issue Dt:
05/20/2014
Application #:
13358882
Filing Dt:
01/26/2012
Publication #:
Pub Dt:
08/01/2013
Title:
MEMORY ARRAYS AND METHODS OF FORMING SAME
77
Patent #:
Issue Dt:
04/19/2016
Application #:
13359012
Filing Dt:
01/26/2012
Publication #:
Pub Dt:
05/24/2012
Title:
MEMORY DEVICE DISTRIBUTED CONTROLLER SYSTEM
78
Patent #:
Issue Dt:
07/15/2014
Application #:
13359769
Filing Dt:
01/27/2012
Publication #:
Pub Dt:
08/01/2013
Title:
APPARATUSES AND METHODS FOR PROVIDING CAPACITANCE IN A MULTI-CHIP MODULE
79
Patent #:
Issue Dt:
08/12/2014
Application #:
13359947
Filing Dt:
01/27/2012
Publication #:
Pub Dt:
05/24/2012
Title:
MEMORY ARRAYS WITH ROWS OF MEMORY CELLS COUPLED TO OPPOSITE SIDES OF A CONTROL GATE
80
Patent #:
Issue Dt:
10/22/2013
Application #:
13360044
Filing Dt:
01/27/2012
Publication #:
Pub Dt:
05/17/2012
Title:
WAFER LEVEL PACKAGING
81
Patent #:
Issue Dt:
05/21/2013
Application #:
13361073
Filing Dt:
01/30/2012
Publication #:
Pub Dt:
05/24/2012
Title:
STACKED PACKAGED INTEGRATED CIRCUIT DEVICES
82
Patent #:
Issue Dt:
04/26/2016
Application #:
13361183
Filing Dt:
01/30/2012
Publication #:
Pub Dt:
02/14/2013
Title:
SIGNAL DELIVERY IN STACKED DEVICE
83
Patent #:
Issue Dt:
07/28/2015
Application #:
13361296
Filing Dt:
01/30/2012
Publication #:
Pub Dt:
08/01/2013
Title:
INCORPORATION OF OXYGEN INTO MEMORY CELLS
84
Patent #:
Issue Dt:
02/19/2013
Application #:
13361630
Filing Dt:
01/30/2012
Publication #:
Pub Dt:
05/24/2012
Title:
INTEGRATED CIRCUIT MEMORY OPERATION APPARATUS AND METHODS
85
Patent #:
Issue Dt:
08/13/2013
Application #:
13362644
Filing Dt:
01/31/2012
Publication #:
Pub Dt:
05/24/2012
Title:
ELECTRONIC DEVICES
86
Patent #:
Issue Dt:
10/08/2013
Application #:
13364198
Filing Dt:
02/01/2012
Publication #:
Pub Dt:
08/01/2013
Title:
APPARATUSES AND METHODS FOR ALTERING A FORWARD PATH DELAY OF A SIGNAL PATH
87
Patent #:
Issue Dt:
05/06/2014
Application #:
13364382
Filing Dt:
02/02/2012
Publication #:
Pub Dt:
08/08/2013
Title:
COMBINED CONDUCTIVE PLUG/CONDUCTIVE LINE MEMORY ARRAYS AND METHODS OF FORMING THE SAME
88
Patent #:
Issue Dt:
09/03/2013
Application #:
13364800
Filing Dt:
02/02/2012
Publication #:
Pub Dt:
05/31/2012
Title:
SELF-ALIGNED, PLANAR PHASE CHANGE MEMORY ELEMENTS AND DEVICES, SYSTEMS EMPLOYING THE SAME AND METHODS OF FORMING THE SAME
89
Patent #:
Issue Dt:
11/06/2012
Application #:
13365064
Filing Dt:
02/02/2012
Publication #:
Pub Dt:
05/24/2012
Title:
MEMORY APPARATUS AND METHOD USING ERASURE ERROR CORRECTION TO REDUCE POWER CONSUMPTION
90
Patent #:
Issue Dt:
04/09/2013
Application #:
13365472
Filing Dt:
02/03/2012
Publication #:
Pub Dt:
05/31/2012
Title:
MEMORY DEVICES AND METHODS OF FORMING MEMORY DEVICES
91
Patent #:
Issue Dt:
01/12/2016
Application #:
13365856
Filing Dt:
02/03/2012
Publication #:
Pub Dt:
08/08/2013
Title:
ACTIVE ALIGNMENT OF OPTICAL FIBER TO CHIP USING LIQUID CRYSTALS
92
Patent #:
Issue Dt:
02/10/2015
Application #:
13366025
Filing Dt:
02/03/2012
Publication #:
Pub Dt:
08/09/2012
Title:
GRADED DIELECTRIC STRUCTURES
93
Patent #:
Issue Dt:
05/14/2013
Application #:
13366557
Filing Dt:
02/06/2012
Publication #:
Pub Dt:
06/07/2012
Title:
NAND STEP UP VOLTAGE SWITCHING METHOD
94
Patent #:
Issue Dt:
04/30/2013
Application #:
13367012
Filing Dt:
02/06/2012
Publication #:
Pub Dt:
05/31/2012
Title:
METHODS AND APPARATUS READING ERASE BLOCK MANAGEMENT DATA IN SUBSETS OF SECTORS HAVING USER DATA AND CONTROL DATA SECTIONS
95
Patent #:
Issue Dt:
12/15/2015
Application #:
13367026
Filing Dt:
02/06/2012
Publication #:
Pub Dt:
05/31/2012
Title:
RECONFIGURABLE CONNECTIONS FOR STACKED SEMICONDUCTOR DEVICES
96
Patent #:
Issue Dt:
05/01/2018
Application #:
13367158
Filing Dt:
02/06/2012
Publication #:
Pub Dt:
05/31/2012
Title:
METHODS FOR TRANSFERRING HEAT FROM STACKED MICROFEATURE DEVICES
97
Patent #:
Issue Dt:
04/29/2014
Application #:
13367213
Filing Dt:
02/06/2012
Publication #:
Pub Dt:
05/31/2012
Title:
METHODS OF PACKAGING IMAGER DEVICES AND OPTICS MODULES, AND RESULTING ASSEMBLIES
98
Patent #:
Issue Dt:
10/15/2013
Application #:
13368206
Filing Dt:
02/07/2012
Publication #:
Pub Dt:
05/31/2012
Title:
DIELECTRICS CONTAINING AT LEAST ONE OF A REFRACTORY METAL OR A NON-REFRACTORY METAL
99
Patent #:
Issue Dt:
03/12/2013
Application #:
13368606
Filing Dt:
02/08/2012
Publication #:
Pub Dt:
06/14/2012
Title:
TEMPERATURE COMPENSATION VIA POWER SUPPLY MODIFICATION TO PRODUCE A TEMPERATURE-INDEPENDENT DELAY IN AN INTEGRATED CIRCUIT
100
Patent #:
Issue Dt:
01/08/2013
Application #:
13369208
Filing Dt:
02/08/2012
Publication #:
Pub Dt:
06/07/2012
Title:
METHODS OF FORMING PATTERNS
Assignors
1
Exec Dt:
07/03/2018
2
Exec Dt:
07/03/2018
Assignee
1
10 S. DEARBORN
7TH FLOOR
CHICAGO, ILLINOIS 60603
Correspondence name and address
MARCELA ROBLEDO
2475 HANOVER STREET
PALO ALTO, CA 94304

Search Results as of: 06/03/2024 02:28 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT