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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:054633/0001   Pages: 1245
Recorded: 11/02/2020
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 8468
Page 13 of 85
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85
1
Patent #:
6833625
Issue Dt:
12/21/2004
Application #:
10690434
Filing Dt:
10/21/2003
Title:
SELF-ALIGNED BARRIER FORMED WITH AN ALLOY HAVING AT LEAST TWO DOPANT ELEMENTS FOR MINIMIZED RESISTANCE OF INTERCONNECT
2
Patent #:
7081676
Issue Dt:
07/25/2006
Application #:
10691299
Filing Dt:
10/22/2003
Publication #:
US20040087160
Pub Dt:
05/06/2004
Title:
Structure for controlling the interface roughness of cobalt disilicide
3
Patent #:
7010776
Issue Dt:
03/07/2006
Application #:
10694466
Filing Dt:
10/27/2003
Publication #:
US20050091631
Pub Dt:
04/28/2005
Title:
EXTENDING THE RANGE OF LITHOGRAPHIC SIMULATION INTEGRALS
4
Patent #:
7173303
Issue Dt:
02/06/2007
Application #:
10695335
Filing Dt:
10/28/2003
Publication #:
US20040092060
Pub Dt:
05/13/2004
Title:
FIN FIELD EFFECT TRANSISTOR WITH SELF-ALIGNED GATE
5
Patent #:
6977194
Issue Dt:
12/20/2005
Application #:
10695752
Filing Dt:
10/30/2003
Publication #:
US20050093059
Pub Dt:
05/05/2005
Title:
STRUCTURE AND METHOD TO IMPROVE CHANNEL MOBILITY BY GATE ELECTRODE STRESS MODIFICATION
6
Patent #:
6927611
Issue Dt:
08/09/2005
Application #:
10696139
Filing Dt:
10/29/2003
Publication #:
US20050093591
Pub Dt:
05/05/2005
Title:
SEMIDIGITAL DELAY-LOCKED LOOP USING AN ANALOG-BASED FINITE STATE MACHINE
7
Patent #:
7057216
Issue Dt:
06/06/2006
Application #:
10698122
Filing Dt:
10/31/2003
Publication #:
US20050093021
Pub Dt:
05/05/2005
Title:
HIGH MOBILITY HETEROJUNCTION COMPLEMENTARY FIELD EFFECT TRANSISTORS AND METHODS THEREOF
8
Patent #:
6943444
Issue Dt:
09/13/2005
Application #:
10699122
Filing Dt:
10/30/2003
Publication #:
US20050092007
Pub Dt:
05/05/2005
Title:
COOLING OF SURFACE TEMPERATURE OF A DEVICE
9
Patent #:
7184714
Issue Dt:
02/27/2007
Application #:
10699667
Filing Dt:
11/04/2003
Title:
FREQUENCY DOMAIN ESTIMATION OF IQ IMBALANCE IN A WIRELESS OFDM DIRECT CONVERSION RECEIVER USING LOOPBACK CONNECTION
10
Patent #:
7029958
Issue Dt:
04/18/2006
Application #:
10699887
Filing Dt:
11/04/2003
Publication #:
US20050104091
Pub Dt:
05/19/2005
Title:
SELF ALIGNED DAMASCENE GATE
11
Patent #:
7084460
Issue Dt:
08/01/2006
Application #:
10700085
Filing Dt:
11/03/2003
Publication #:
US20050093100
Pub Dt:
05/05/2005
Title:
METHOD FOR FABRICATING SIGE-ON-INSULATOR (SGOI) AND GE-ON-INSULATOR (GOI) SUBSTRATES
12
Patent #:
7449067
Issue Dt:
11/11/2008
Application #:
10700327
Filing Dt:
11/03/2003
Publication #:
US20050106834
Pub Dt:
05/19/2005
Title:
METHOD AND APPARATUS FOR FILLING VIAS
13
Patent #:
7376852
Issue Dt:
05/20/2008
Application #:
10700989
Filing Dt:
11/04/2003
Publication #:
US20050097379
Pub Dt:
05/05/2005
Title:
METHOD FOR CONTROLLING POWER CHANGE FOR A SEMICONDUCTOR MODULE
14
Patent #:
6829040
Issue Dt:
12/07/2004
Application #:
10703643
Filing Dt:
11/07/2003
Title:
LITHOGRAPHY CONTRAST ENHANCEMENT TECHNIQUE BY VARYING FOCUS WITH WAVELENGTH MODULATION
15
Patent #:
6831369
Issue Dt:
12/14/2004
Application #:
10705115
Filing Dt:
11/10/2003
Publication #:
US20040104438
Pub Dt:
06/03/2004
Title:
SEMICONDUCTOR STRUCTURE HAVING IN-SITU FORMED UNIT RESISTORS AND METHOD FOR FABRICATION
16
Patent #:
7029964
Issue Dt:
04/18/2006
Application #:
10706061
Filing Dt:
11/13/2003
Publication #:
US20050106790
Pub Dt:
05/19/2005
Title:
A METHOD OF MANUFACTURING A STRAINED SILICON ON A SIGE ON SOI SUBSTRATE
17
Patent #:
7074657
Issue Dt:
07/11/2006
Application #:
10706948
Filing Dt:
11/14/2003
Publication #:
US20050104140
Pub Dt:
05/19/2005
Title:
LOW-POWER MULTIPLE-CHANNEL FULLY DEPLETED QUANTUM WELL CMOSFETS
18
Patent #:
7129561
Issue Dt:
10/31/2006
Application #:
10707065
Filing Dt:
11/19/2003
Publication #:
US20050104157
Pub Dt:
05/19/2005
Title:
TRI-METAL AND DUAL-METAL STACKED INDUCTORS
19
Patent #:
6989322
Issue Dt:
01/24/2006
Application #:
10707175
Filing Dt:
11/25/2003
Publication #:
US20050112857
Pub Dt:
05/26/2005
Title:
METHOD OF FORMING ULTRA-THIN SILICIDATION-STOP EXTENSIONS IN MOSFET DEVICES
20
Patent #:
7106164
Issue Dt:
09/12/2006
Application #:
10707283
Filing Dt:
12/03/2003
Publication #:
US20050122204
Pub Dt:
06/09/2005
Title:
APPARATUS AND METHOD FOR ELECTRONIC FUSE WITH IMPROVED ESD TOLERANCE
21
Patent #:
7240261
Issue Dt:
07/03/2007
Application #:
10707373
Filing Dt:
12/09/2003
Publication #:
US20050138508
Pub Dt:
06/23/2005
Title:
SCAN CHAIN DIAGNOSTICS USING LOGIC PATHS
22
Patent #:
7247912
Issue Dt:
07/24/2007
Application #:
10707690
Filing Dt:
01/05/2004
Publication #:
US20050145954
Pub Dt:
07/07/2005
Title:
STRUCTURES AND METHODS FOR MAKING STRAINED MOSFETS
23
Patent #:
7056794
Issue Dt:
06/06/2006
Application #:
10707757
Filing Dt:
01/09/2004
Publication #:
US20050153530
Pub Dt:
07/14/2005
Title:
FET GATE STRUCTURE WITH METAL GATE ELECTRODE AND SILICIDE CONTACT
24
Patent #:
6987316
Issue Dt:
01/17/2006
Application #:
10707810
Filing Dt:
01/14/2004
Publication #:
US20050151241
Pub Dt:
07/14/2005
Title:
MULTILAYER CERAMIC SUBSTRATE WITH SINGLE VIA ANCHORED PAD AND METHOD OF FORMING
25
Patent #:
7118999
Issue Dt:
10/10/2006
Application #:
10707842
Filing Dt:
01/16/2004
Publication #:
US20050158955
Pub Dt:
07/21/2005
Title:
METHOD AND APPARATUS TO INCREASE STRAIN EFFECT IN A TRANSISTOR CHANNEL
26
Patent #:
7207096
Issue Dt:
04/24/2007
Application #:
10707896
Filing Dt:
01/22/2004
Publication #:
US20050160575
Pub Dt:
07/28/2005
Title:
Method of manufacturing high performance copper inductors with bond pads
27
Patent #:
7138691
Issue Dt:
11/21/2006
Application #:
10707897
Filing Dt:
01/22/2004
Publication #:
US20050164444
Pub Dt:
07/28/2005
Title:
SELECTIVE NITRIDATION OF GATE OXIDES
28
Patent #:
7224029
Issue Dt:
05/29/2007
Application #:
10707964
Filing Dt:
01/28/2004
Publication #:
US20050161739
Pub Dt:
07/28/2005
Title:
METHOD AND STRUCTURE TO CREATE MULTIPLE DEVICE WIDTHS IN FINFET TECHNOLOGY IN BOTH BULK AND SOI
29
Patent #:
7405147
Issue Dt:
07/29/2008
Application #:
10707996
Filing Dt:
01/30/2004
Publication #:
US20050167838
Pub Dt:
08/04/2005
Title:
DEVICE AND METHODOLOGY FOR REDUCING EFFECTIVE DIELECTRIC CONSTANT IN SEMICONDUCTOR DEVICES
30
Patent #:
7166904
Issue Dt:
01/23/2007
Application #:
10708023
Filing Dt:
02/03/2004
Publication #:
US20050167786
Pub Dt:
08/04/2005
Title:
STRUCTURE AND METHOD FOR LOCAL RESISTOR ELEMENT IN INTEGRATED CIRCUIT TECHNOLOGY
31
Patent #:
7404164
Issue Dt:
07/22/2008
Application #:
10708039
Filing Dt:
02/04/2004
Publication #:
US20050172247
Pub Dt:
08/04/2005
Title:
IC DESIGN MODELING ALLOWING DIMENSION-DEPENDENT RULE CHECKING
32
Patent #:
7472320
Issue Dt:
12/30/2008
Application #:
10708316
Filing Dt:
02/24/2004
Publication #:
US20050188289
Pub Dt:
08/25/2005
Title:
Autonomous Self-Monitoring and Corrective Operation of an Integrated Circuit
33
Patent #:
7425754
Issue Dt:
09/16/2008
Application #:
10708340
Filing Dt:
02/25/2004
Publication #:
US20050184359
Pub Dt:
08/25/2005
Title:
STRUCTURE AND METHOD OF SELF-ALIGNED BIPOLAR TRANSISTOR HAVING TAPERED COLLECTOR
34
Patent #:
7923782
Issue Dt:
04/12/2011
Application #:
10708378
Filing Dt:
02/27/2004
Publication #:
US20050189589
Pub Dt:
09/01/2005
Title:
HYBRID SOI/BULK SEMICONDUCTOR TRANSISTORS
35
Patent #:
7543203
Issue Dt:
06/02/2009
Application #:
10708382
Filing Dt:
02/27/2004
Publication #:
US20050204244
Pub Dt:
09/15/2005
Title:
LSSD-COMPATIBLE EDGE-TRIGGERED SHIFT REGISTER LATCH
36
Patent #:
7105391
Issue Dt:
09/12/2006
Application #:
10708451
Filing Dt:
03/04/2004
Publication #:
US20050196912
Pub Dt:
09/08/2005
Title:
PLANAR PEDESTAL MULTI GATE DEVICE
37
Patent #:
6936910
Issue Dt:
08/30/2005
Application #:
10708743
Filing Dt:
03/23/2004
Publication #:
US20040222486
Pub Dt:
11/11/2004
Title:
BICMOS TECHNOLOGY ON SOI SUBSTRATES
38
Patent #:
6998684
Issue Dt:
02/14/2006
Application #:
10708907
Filing Dt:
03/31/2004
Publication #:
US20050224875
Pub Dt:
10/13/2005
Title:
HIGH MOBILITY PLANE CMOS SOI
39
Patent #:
7115920
Issue Dt:
10/03/2006
Application #:
10709076
Filing Dt:
04/12/2004
Publication #:
US20050224890
Pub Dt:
10/13/2005
Title:
FINFET TRANSISTOR AND CIRCUIT
40
Patent #:
7087940
Issue Dt:
08/08/2006
Application #:
10709220
Filing Dt:
04/22/2004
Publication #:
US20050236645
Pub Dt:
10/27/2005
Title:
STRUCTURE AND METHOD OF FORMING BIPOLAR TRANSISTOR HAVING A SELF-ALIGNED RAISED EXTRINSIC BASE USING SELF-ALIGNED ETCH STOP LAYER
41
Patent #:
7504693
Issue Dt:
03/17/2009
Application #:
10709239
Filing Dt:
04/23/2004
Publication #:
US20050236668
Pub Dt:
10/27/2005
Title:
DISLOCATION FREE STRESSED CHANNELS IN BULK SILICON AND SOI CMOS DEVICES BY GATE STRESS ENGINEERING
42
Patent #:
7009237
Issue Dt:
03/07/2006
Application #:
10709450
Filing Dt:
05/06/2004
Publication #:
US20050247966
Pub Dt:
11/10/2005
Title:
OUT OF THE BOX VERTICAL TRANSISTOR FOR EDRAM ON SOI
43
Patent #:
6943409
Issue Dt:
09/13/2005
Application #:
10709699
Filing Dt:
05/24/2004
Title:
TRENCH OPTICAL DEVICE
44
Patent #:
7078814
Issue Dt:
07/18/2006
Application #:
10709722
Filing Dt:
05/25/2004
Publication #:
US20050275104
Pub Dt:
12/15/2005
Title:
METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING AIR GAPS AND THE STRUCTURE SO FORMED
45
Patent #:
7726016
Issue Dt:
06/01/2010
Application #:
10709752
Filing Dt:
05/26/2004
Publication #:
US20040222015
Pub Dt:
11/11/2004
Title:
MANUFACTURING METHOD OF PRINTED CIRCUIT BOARD
46
Patent #:
7282404
Issue Dt:
10/16/2007
Application #:
10709829
Filing Dt:
06/01/2004
Publication #:
US20050274987
Pub Dt:
12/15/2005
Title:
INEXPENSIVE METHOD OF FABRICATING A HIGHER PERFORMANCE CAPACITANCE DENSITY MIMCAP INTEGRABLE INTO A COPPER INTERCONNECT SCHEME
47
Patent #:
7211507
Issue Dt:
05/01/2007
Application #:
10709865
Filing Dt:
06/02/2004
Publication #:
US20050269703
Pub Dt:
12/08/2005
Title:
PE-ALD OF TAN DIFFUSION BARRIER REGION ON LOW-K MATERIALS
48
Patent #:
7084461
Issue Dt:
08/01/2006
Application #:
10709998
Filing Dt:
06/11/2004
Publication #:
US20050275040
Pub Dt:
12/15/2005
Title:
BACK GATE FINFET SRAM
49
Patent #:
7009265
Issue Dt:
03/07/2006
Application #:
10710007
Filing Dt:
06/11/2004
Publication #:
US20050275045
Pub Dt:
12/15/2005
Title:
LOW CAPACITANCE FET FOR OPERATION AT SUBTHRESHOLD VOLTAGES
50
Patent #:
7023064
Issue Dt:
04/04/2006
Application #:
10710063
Filing Dt:
06/16/2004
Publication #:
US20050280099
Pub Dt:
12/22/2005
Title:
TEMPERATURE STABLE METAL NITRIDE GATE ELECTRODE
51
Patent #:
7102204
Issue Dt:
09/05/2006
Application #:
10710256
Filing Dt:
06/29/2004
Publication #:
US20050287718
Pub Dt:
12/29/2005
Title:
INTEGRATED SOI FINGERED DECOUPLING CAPACITOR
52
Patent #:
8669145
Issue Dt:
03/11/2014
Application #:
10710272
Filing Dt:
06/30/2004
Publication #:
US20060014338
Pub Dt:
01/19/2006
Title:
METHOD AND STRUCTURE FOR STRAINED FINFET DEVICES
53
Patent #:
7601646
Issue Dt:
10/13/2009
Application #:
10710566
Filing Dt:
07/21/2004
Publication #:
US20060019443
Pub Dt:
01/26/2006
Title:
TOP-OXIDE-EARLY PROCESS AND ARRAY TOP OXIDE PLANARIZATION
54
Patent #:
7259420
Issue Dt:
08/21/2007
Application #:
10710680
Filing Dt:
07/28/2004
Publication #:
US20060022253
Pub Dt:
02/02/2006
Title:
MULTIPLE-GATE DEVICE WITH FLOATING BACK GATE
55
Patent #:
7002214
Issue Dt:
02/21/2006
Application #:
10710736
Filing Dt:
07/30/2004
Publication #:
US20060022270
Pub Dt:
02/02/2006
Title:
ULTRA-THIN BODY SUPER-STEEP RETROGRADE WELL (SSRW) FET DEVICES
56
Patent #:
7247546
Issue Dt:
07/24/2007
Application #:
10710826
Filing Dt:
08/05/2004
Publication #:
US20060027808
Pub Dt:
02/09/2006
Title:
METHOD OF FORMING STRAINED SILICON MATERIALS WITH IMPROVED THERMAL CONDUCTIVITY
57
Patent #:
7397087
Issue Dt:
07/08/2008
Application #:
10710847
Filing Dt:
08/06/2004
Publication #:
US20060027878
Pub Dt:
02/09/2006
Title:
FEOL/MEOL METAL RESISTOR FOR HIGH END CMOS
58
Patent #:
7406397
Issue Dt:
07/29/2008
Application #:
10711224
Filing Dt:
09/02/2004
Publication #:
US20060047474
Pub Dt:
03/02/2006
Title:
SELF HEATING MONITOR FOR SIGE AND SOI CMOS DEVICES
59
Patent #:
8288828
Issue Dt:
10/16/2012
Application #:
10711298
Filing Dt:
09/09/2004
Publication #:
US20060051959
Pub Dt:
03/09/2006
Title:
VIA CONTACT STRUCTURE HAVING DUAL SILICIDE LAYERS
60
Patent #:
7285474
Issue Dt:
10/23/2007
Application #:
10711394
Filing Dt:
09/16/2004
Publication #:
US20060057835
Pub Dt:
03/16/2006
Title:
AIR-GAP INSULATED INTERCONNECTIONS
61
Patent #:
7233071
Issue Dt:
06/19/2007
Application #:
10711764
Filing Dt:
10/04/2004
Publication #:
US20060073682
Pub Dt:
04/06/2006
Title:
LOW-K DIELECTRIC LAYER BASED UPON CARBON NANOSTRUCTURES
62
Patent #:
7456426
Issue Dt:
11/25/2008
Application #:
10711845
Filing Dt:
10/08/2004
Publication #:
US20060076643
Pub Dt:
04/13/2006
Title:
FIN-TYPE ANTIFUSE
63
Patent #:
7402870
Issue Dt:
07/22/2008
Application #:
10711899
Filing Dt:
10/12/2004
Publication #:
US20060076627
Pub Dt:
04/13/2006
Title:
ULTRA SHALLOW JUNCTION FORMATION BY EPITAXIAL INTERFACE LIMITED DIFFUSION
64
Patent #:
6949768
Issue Dt:
09/27/2005
Application #:
10711974
Filing Dt:
10/18/2004
Title:
PLANAR SUBSTRATE DEVICES INTEGRATED WITH FINFETS AND METHOD OF MANUFACTURE
65
Patent #:
7064027
Issue Dt:
06/20/2006
Application #:
10713227
Filing Dt:
11/13/2003
Publication #:
US20050104095
Pub Dt:
05/19/2005
Title:
METHOD AND STRUCTURE TO USE AN ETCH RESISTANT LINER ON TRANSISTOR GATE STRUCTURE TO ACHIEVE HIGH DEVICE PERFORMANCE
66
Patent #:
7132323
Issue Dt:
11/07/2006
Application #:
10713447
Filing Dt:
11/14/2003
Publication #:
US20050106800
Pub Dt:
05/19/2005
Title:
CMOS WELL STRUCTURE AND METHOD OF FORMING THE SAME
67
Patent #:
7137827
Issue Dt:
11/21/2006
Application #:
10715288
Filing Dt:
11/17/2003
Publication #:
US20050106902
Pub Dt:
05/19/2005
Title:
INTERPOSER WITH ELECTRICAL CONTACT BUTTON AND METHOD
68
Patent #:
7602000
Issue Dt:
10/13/2009
Application #:
10715376
Filing Dt:
11/19/2003
Publication #:
US20050104101
Pub Dt:
05/19/2005
Title:
SPIN-CURRENT SWITCHED MAGNETIC MEMORY ELEMENT SUITABLE FOR CIRCUIT INTEGRATION AND METHOD OF FABRICATING THE MEMORY ELEMENT
69
Patent #:
6793961
Issue Dt:
09/21/2004
Application #:
10717385
Filing Dt:
11/19/2003
Publication #:
US20040100729
Pub Dt:
05/27/2004
Title:
ENHANCEMENT OF MAGNETIZATION SWITCHING SPEED IN SOFT FERROMAGNETIC FILMS THROUGH CONTROL OF EDGE STRESS ANISOTROPY
70
Patent #:
7091566
Issue Dt:
08/15/2006
Application #:
10717737
Filing Dt:
11/20/2003
Publication #:
US20050110085
Pub Dt:
05/26/2005
Title:
DUAL GATE FINFET
71
Patent #:
7302603
Issue Dt:
11/27/2007
Application #:
10719180
Filing Dt:
11/20/2003
Publication #:
US20050114729
Pub Dt:
05/26/2005
Title:
HOST-INITIATED DATA RECONSTRUCTION FOR IMPROVED RAID READ OPERATIONS
72
Patent #:
7256455
Issue Dt:
08/14/2007
Application #:
10720166
Filing Dt:
11/25/2003
Publication #:
US20040110097
Pub Dt:
06/10/2004
Title:
DOUBLE GATE SEMICONDUCTOR DEVICE HAVING A METAL GATE
73
Patent #:
7111266
Issue Dt:
09/19/2006
Application #:
10720464
Filing Dt:
11/24/2003
Publication #:
US20050114814
Pub Dt:
05/26/2005
Title:
MULTIPLE VOLTAGE INTEGRATED CIRCUIT AND DESIGN METHOD THEREFOR
74
Patent #:
7119578
Issue Dt:
10/10/2006
Application #:
10720466
Filing Dt:
11/24/2003
Publication #:
US20050110519
Pub Dt:
05/26/2005
Title:
SINGLE SUPPLY LEVEL CONVERTER
75
Patent #:
7015580
Issue Dt:
03/21/2006
Application #:
10722704
Filing Dt:
11/25/2003
Publication #:
US20050112861
Pub Dt:
05/26/2005
Title:
ROUGHENED BONDING PAD AND BONDING WIRE SURFACES FOR LOW PRESSURE WIRE BONDING
76
Patent #:
7075150
Issue Dt:
07/11/2006
Application #:
10725849
Filing Dt:
12/02/2003
Publication #:
US20050116289
Pub Dt:
06/02/2005
Title:
ULTRA-THIN SI CHANNEL MOSFET USING A SELF-ALIGNED OXYGEN IMPLANT AND DAMASCENE TECHNIQUE
77
Patent #:
7067902
Issue Dt:
06/27/2006
Application #:
10726140
Filing Dt:
12/02/2003
Publication #:
US20050118803
Pub Dt:
06/02/2005
Title:
BUILDING METAL PILLARS IN A CHIP FOR STRUCTURE SUPPORT
78
Patent #:
6967175
Issue Dt:
11/22/2005
Application #:
10726619
Filing Dt:
12/04/2003
Title:
DAMASCENE GATE SEMICONDUCTOR PROCESSING WITH LOCAL THINNING OF CHANNEL REGION
79
Patent #:
8069336
Issue Dt:
11/29/2011
Application #:
10726902
Filing Dt:
12/03/2003
Publication #:
US20050125632
Pub Dt:
06/09/2005
Title:
TRANSITIONING FROM INSTRUCTION CACHE TO TRACE CACHE ON LABEL BOUNDARIES
80
Patent #:
7045873
Issue Dt:
05/16/2006
Application #:
10728750
Filing Dt:
12/08/2003
Publication #:
US20050121699
Pub Dt:
06/09/2005
Title:
DYNAMIC THRESHOLD VOLTAGE MOSFET ON SOI
81
Patent #:
7144818
Issue Dt:
12/05/2006
Application #:
10729479
Filing Dt:
12/05/2003
Publication #:
US20050124170
Pub Dt:
06/09/2005
Title:
SEMICONDUCTOR SUBSTRATE AND PROCESSES THEREFOR
82
Patent #:
7071122
Issue Dt:
07/04/2006
Application #:
10730892
Filing Dt:
12/10/2003
Publication #:
US20050127417
Pub Dt:
06/16/2005
Title:
FIELD EFFECT TRANSISTOR WITH ETCHED-BACK GATE DIELECTRIC
83
Patent #:
7444734
Issue Dt:
11/04/2008
Application #:
10731520
Filing Dt:
12/09/2003
Publication #:
US20050122265
Pub Dt:
06/09/2005
Title:
APPARATUS AND METHODS FOR CONSTRUCTING ANTENNAS USING VIAS AS RADIATING ELEMENTS FORMED IN A SUBSTRATE
84
Patent #:
7388258
Issue Dt:
06/17/2008
Application #:
10732322
Filing Dt:
12/10/2003
Publication #:
US20050127362
Pub Dt:
06/16/2005
Title:
SECTIONAL FIELD EFFECT DEVICES
85
Patent #:
7943919
Issue Dt:
05/17/2011
Application #:
10732579
Filing Dt:
12/10/2003
Publication #:
US20050127348
Pub Dt:
06/16/2005
Title:
INTEGRATED CIRCUIT WITH UPSTANDING STYLUS
86
Patent #:
7928420
Issue Dt:
04/19/2011
Application #:
10732580
Filing Dt:
12/10/2003
Publication #:
US20050127349
Pub Dt:
06/16/2005
Title:
PHASE CHANGE TIP STORAGE CELL
87
Patent #:
7271444
Issue Dt:
09/18/2007
Application #:
10732958
Filing Dt:
12/11/2003
Publication #:
US20050127466
Pub Dt:
06/16/2005
Title:
WRAP-AROUND GATE FIELD EFFECT TRANSISTOR
88
Patent #:
7198995
Issue Dt:
04/03/2007
Application #:
10733378
Filing Dt:
12/12/2003
Publication #:
US20050130358
Pub Dt:
06/16/2005
Title:
STRAINED FINFETS AND METHOD OF MANUFACTURE
89
Patent #:
7374793
Issue Dt:
05/20/2008
Application #:
10733974
Filing Dt:
12/11/2003
Publication #:
US20050129948
Pub Dt:
06/16/2005
Title:
METHODS AND STRUCTURES FOR PROMOTING STABLE SYNTHESIS OF CARBON NANOTUBES
90
Patent #:
8445946
Issue Dt:
05/21/2013
Application #:
10735061
Filing Dt:
12/11/2003
Publication #:
US20050128803
Pub Dt:
06/16/2005
Title:
GATED DIODE MEMORY CELLS
91
Patent #:
7745775
Issue Dt:
06/29/2010
Application #:
10736424
Filing Dt:
12/15/2003
Publication #:
US20050129414
Pub Dt:
06/16/2005
Title:
TESTING OF TRANSIMPEDANCE AMPLIFIERS
92
Patent #:
6943087
Issue Dt:
09/13/2005
Application #:
10738529
Filing Dt:
12/17/2003
Title:
SEMICONDUCTOR ON INSULATOR MOSFET HAVING STRAINED SILICON CHANNEL
93
Patent #:
7127696
Issue Dt:
10/24/2006
Application #:
10738711
Filing Dt:
12/17/2003
Publication #:
US20050138578
Pub Dt:
06/23/2005
Title:
METHOD AND APPARATUS FOR GENERATING STEINER TREES USING SIMULTANEOUS BLOCKAGE AVOIDANCE, DELAY OPTIMIZATION AND DESIGN DENSITY MANAGEMENT
94
Patent #:
7071065
Issue Dt:
07/04/2006
Application #:
10738716
Filing Dt:
12/17/2003
Title:
STRAINED SILICON PMOS HAVING SILICON GERMANIUM SOURCE/DRAIN EXTENSIONS AND METHOD FOR ITS FABRICATION
95
Patent #:
7395482
Issue Dt:
07/01/2008
Application #:
10739966
Filing Dt:
12/18/2003
Publication #:
US20050138518
Pub Dt:
06/23/2005
Title:
DATA STORAGE SYSTEMS
96
Patent #:
8261239
Issue Dt:
09/04/2012
Application #:
10745822
Filing Dt:
12/23/2003
Publication #:
US20040194054
Pub Dt:
09/30/2004
Title:
LOCATING A TESTABLE OBJECT IN A FUNCTIONAL TESTING TOOL
97
Patent #:
7022596
Issue Dt:
04/04/2006
Application #:
10747680
Filing Dt:
12/30/2003
Publication #:
US20050146059
Pub Dt:
07/07/2005
Title:
METHOD FOR FORMING RECTANGULAR-SHAPED SPACERS FOR SEMICONDUCTOR DEVICES
98
Patent #:
7150675
Issue Dt:
12/19/2006
Application #:
10747723
Filing Dt:
12/29/2003
Publication #:
US20040242122
Pub Dt:
12/02/2004
Title:
METHOD AND SYSTEM FOR CONTROLLING THE CHEMICAL MECHANICAL POLISHING BY USING A SENSOR SIGNAL OF A PAD CONDITIONER
99
Patent #:
6972440
Issue Dt:
12/06/2005
Application #:
10750697
Filing Dt:
01/02/2004
Publication #:
US20040140506
Pub Dt:
07/22/2004
Title:
ENHANCED T-GATE STRUCTURE FOR MODULATION DOPED FIELD EFFECT TRANSISTORS
100
Patent #:
8324667
Issue Dt:
12/04/2012
Application #:
10751714
Filing Dt:
01/05/2004
Publication #:
US20050145895
Pub Dt:
07/07/2005
Title:
AMPLIFIERS USING GATED DIODES
Assignor
1
GLOBALFOUNDRIES INC.
Exec Dt:
10/22/2020
Assignee
1
GLOBALFOUNDRIES U.S. INC.
2600 GREAT AMERICA WAY
SANTA CLARA, CALIFORNIA 95054
Correspondence name and address
GLOBALFOUNDRIES SINGAPORE PTE. LTD.
60 WOODLANDS INDUSTRIAL PARK D STREET 2,
SINGAPORE, 738406 SINGAPORE

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