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Reel/Frame:	054633/0001			Pages:	1245
		Recorded:	11/02/2020
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 8468
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Patent #:	7705345	Issue Dt:	04/27/2010	Application #:	10751916	Filing Dt:	01/07/2004
Publication #:	US20050145941	Pub Dt:	07/07/2005
Title:	HIGH PERFORMANCE STRAINED SILICON FINFETS DEVICE AND METHOD FOR FORMING SAME

Patent #:	6958516	Issue Dt:	10/25/2005	Application #:	10754320	Filing Dt:	01/08/2004
Publication #:	US20050151193	Pub Dt:	07/14/2005
Title:	DISCRIMINATIVE SOI WITH OXIDE HOLES UNDERNEATH DC SOURCE/DRAIN

Patent #:	7679134	Issue Dt:	03/16/2010	Application #:	10754515	Filing Dt:	01/12/2004
Title:	FINFET DEVICE WITH MULTIPLE FIN STRUCTURES

Patent #:	7432557	Issue Dt:	10/07/2008	Application #:	10755344	Filing Dt:	01/13/2004
Title:	FINFET DEVICE WITH MULTIPLE CHANNELS

Patent #:	7462549	Issue Dt:	12/09/2008	Application #:	10755602	Filing Dt:	01/12/2004
Publication #:	US20050151222	Pub Dt:	07/14/2005
Title:	SHALLOW TRENCH ISOLATION PROCESS AND STRUCTURE WITH MINIMIZED STRAINED SILICON CONSUMPTION

Patent #:	7373484	Issue Dt:	05/13/2008	Application #:	10755692	Filing Dt:	01/12/2004
Title:	CONTROLLING WRITES TO NON-RENAMED REGISTER SPACE IN AN OUT-OF-ORDER EXECUTION MICROPROCESSOR

Patent #:	7138302	Issue Dt:	11/21/2006	Application #:	10755763	Filing Dt:	01/12/2004
Publication #:	US20050153486	Pub Dt:	07/14/2005
Title:	Method of fabricating an integrated circuit channel region

Patent #:	7068865	Issue Dt:	06/27/2006	Application #:	10755816	Filing Dt:	01/12/2004
Publication #:	US20050084213	Pub Dt:	04/21/2005
Title:	METHOD AND APPARATUS FOR THERMO-OPTIC MODULATION OF OPTICAL SIGNALS

Patent #:	7030468	Issue Dt:	04/18/2006	Application #:	10758724	Filing Dt:	01/16/2004
Publication #:	US20050156285	Pub Dt:	07/21/2005
Title:	LOW K AND ULTRA LOW K SICOH DIELECTRIC FILMS AND METHODS TO FORM THE SAME

Patent #:	6836017	Issue Dt:	12/28/2004	Application #:	10759170	Filing Dt:	01/20/2004
Publication #:	US20040147117	Pub Dt:	07/29/2004
Title:	PROTECTION OF LOW-K ILD DURING DAMASCENE PROCESSING WITH THIN LINER

Patent #:	7071051	Issue Dt:	07/04/2006	Application #:	10761009	Filing Dt:	01/20/2004
Title:	METHOD FOR FORMING A THIN, HIGH QUALITY BUFFER LAYER IN A FIELD EFFECT TRANSISTOR AND RELATED STRUCTURE

Patent #:	7250645	Issue Dt:	07/31/2007	Application #:	10761374	Filing Dt:	01/22/2004
Title:	REVERSED T-SHAPED FINFET

Patent #:	6994570	Issue Dt:	02/07/2006	Application #:	10765042	Filing Dt:	01/28/2004
Publication #:	US20050164526	Pub Dt:	07/28/2005
Title:	HIGH PERFORMANCE INTERPOSER FOR A CHIP PACKAGE USING DEFORMABLE BUTTON CONTACTS

Patent #:	6958526	Issue Dt:	10/25/2005	Application #:	10766249	Filing Dt:	01/27/2004
Publication #:	US20040188674	Pub Dt:	09/30/2004
Title:	ELECTRONIC STRUCTURES WITH REDUCED CAPACITANCE

Patent #:	7068138	Issue Dt:	06/27/2006	Application #:	10768773	Filing Dt:	01/29/2004
Publication #:	US20050167780	Pub Dt:	08/04/2005
Title:	HIGH Q FACTOR INTEGRATED CIRCUIT INDUCTOR

Patent #:	6855982	Issue Dt:	02/15/2005	Application #:	10770163	Filing Dt:	02/02/2004
Title:	SELF ALIGNED DOUBLE GATE TRANSISTOR HAVING A STRAINED CHANNEL REGION AND PROCESS THEREFOR

Patent #:	7568134	Issue Dt:	07/28/2009	Application #:	10770170	Filing Dt:	02/02/2004
Title:	METHOD OF EXHAUSTIVELY TESTING AN EMBEDDED ROM USING GENERATED ATPG TEST PATTERNS

Patent #:	7064067	Issue Dt:	06/20/2006	Application #:	10770905	Filing Dt:	02/02/2004
Title:	REDUCTION OF LATERAL SILICIDE GROWTH IN INTEGRATED CIRCUIT TECHNOLOGY

Patent #:	7512787	Issue Dt:	03/31/2009	Application #:	10771019	Filing Dt:	02/03/2004
Title:	RECEIVE IPSEC IN-LINE PROCESSING OF MUTABLE FIELDS FOR AH ALGORITHM

Patent #:	6856031	Issue Dt:	02/15/2005	Application #:	10771824	Filing Dt:	02/03/2004
Title:	SRAM CELL WITH WELL CONTACTS AND P+ DIFFUSION CROSSING TO GROUND OR N+ DIFFUSION CROSSING TO VDD

Patent #:	7064413	Issue Dt:	06/20/2006	Application #:	10774773	Filing Dt:	02/09/2004
Publication #:	US20040159910	Pub Dt:	08/19/2004
Title:	FIN-TYPE RESISTORS

Patent #:	7227230	Issue Dt:	06/05/2007	Application #:	10775440	Filing Dt:	02/10/2004
Publication #:	US20040171201	Pub Dt:	09/02/2004
Title:	LOW K-GATE SPACERS BY FLUORINE IMPLANTATION

Patent #:	7212698	Issue Dt:	05/01/2007	Application #:	10775854	Filing Dt:	02/10/2004
Publication #:	US20050176161	Pub Dt:	08/11/2005
Title:	CIRCUIT BOARD INTEGRATED OPTICAL COUPLING ELEMENTS

Patent #:	7829883	Issue Dt:	11/09/2010	Application #:	10777576	Filing Dt:	02/12/2004
Publication #:	US20050179029	Pub Dt:	08/18/2005
Title:	VERTICAL CARBON NANOTUBE FIELD EFFECT TRANSISTORS AND ARRAYS

Patent #:	7101741	Issue Dt:	09/05/2006	Application #:	10780393	Filing Dt:	02/17/2004
Publication #:	US20040161898	Pub Dt:	08/19/2004
Title:	DUAL DOUBLE GATE TRANSISTOR AND METHOD FOR FORMING

Patent #:	7088003	Issue Dt:	08/08/2006	Application #:	10780554	Filing Dt:	02/19/2004
Publication #:	US20050184397	Pub Dt:	08/25/2005
Title:	STRUCTURES AND METHODS FOR INTERGRATION OF ULTRALOW-K DIELECTRICS WITH IMPROVED RELIABILITY

Patent #:	7321884	Issue Dt:	01/22/2008	Application #:	10782811	Filing Dt:	02/23/2004
Publication #:	US20050184284	Pub Dt:	08/25/2005
Title:	METHOD AND STRUCTURE TO ISOLATE A QUBIT FROM THE ENVIRONMENT

Patent #:	7138697	Issue Dt:	11/21/2006	Application #:	10785894	Filing Dt:	02/24/2004
Publication #:	US20050184354	Pub Dt:	08/25/2005
Title:	STRUCTURE FOR AND METHOD OF FABRICATING A HIGH-SPEED CMOS-COMPATIBLE GE-ON-INSULATOR PHOTODETECTOR

Patent #:	7375410	Issue Dt:	05/20/2008	Application #:	10787002	Filing Dt:	02/25/2004
Publication #:	US20050184360	Pub Dt:	08/25/2005
Title:	ULTRA-THIN SOI VERTICAL BIPOLAR TRANSISTORS WITH AN INVERSION COLLECTOR ON THIN-BURIED OXIDE (BOX) FOR LOW SUBSTRATE-BIAS OPERATION AND METHODS THEREOF

Patent #:	7084476	Issue Dt:	08/01/2006	Application #:	10787488	Filing Dt:	02/26/2004
Publication #:	US20050189604	Pub Dt:	09/01/2005
Title:	INTEGRATED CIRCUIT LOGIC WITH SELF COMPENSATING BLOCK DELAYS

Patent #:	7135773	Issue Dt:	11/14/2006	Application #:	10787640	Filing Dt:	02/26/2004
Publication #:	US20050189655	Pub Dt:	09/01/2005
Title:	INTEGRATED CIRCUIT CHIP UTILIZING CARBON NANOTUBE COMPOSITE INTERCONNECTION VIAS

Patent #:	7108797	Issue Dt:	09/19/2006	Application #:	10787738	Filing Dt:	02/25/2004
Publication #:	US20040251232	Pub Dt:	12/16/2004
Title:	METHOD OF FABRICATING A SHIFTABLE MAGNETIC SHIFT REGISTER

Patent #:	7023059	Issue Dt:	04/04/2006	Application #:	10791094	Filing Dt:	03/01/2004
Title:	TRENCHES TO REDUCE LATERAL SILICIDE GROWTH IN INTEGRATED CIRCUIT TECHNOLOGY

Patent #:	6977718	Issue Dt:	12/20/2005	Application #:	10791263	Filing Dt:	03/02/2004
Title:	LITHOGRAPHY METHOD AND SYSTEM WITH ADJUSTABLE REFLECTOR

Patent #:	7091106	Issue Dt:	08/15/2006	Application #:	10791759	Filing Dt:	03/04/2004
Publication #:	US20050196928	Pub Dt:	09/08/2005
Title:	METHOD OF REDUCING STI DIVOT FORMATION DURING SEMICONDUCTOR DEVICE FABRICATION

Patent #:	7071564	Issue Dt:	07/04/2006	Application #:	10791904	Filing Dt:	03/04/2004
Title:	COMPOSITE TANTALUM CAPPED INLAID COPPER WITH REDUCED ELECTROMIGRATION AND REDUCED STRESS MIGRATION

Patent #:	7948902	Issue Dt:	05/24/2011	Application #:	10791914	Filing Dt:	03/03/2004
Title:	METHOD OF GENERATING PACKETS WITHOUT REPETITION IN VERIFICATION OF A DEVICE

Patent #:	6876037	Issue Dt:	04/05/2005	Application #:	10796731	Filing Dt:	03/09/2004
Publication #:	US20040169227	Pub Dt:	09/02/2004
Title:	DOPING METHODS FOR FULLY-DEPLETED SOI STRUCTURES, AND DEVICE COMPRISING THE RESULTING DOPED REGIONS

Patent #:	6989308	Issue Dt:	01/24/2006	Application #:	10798907	Filing Dt:	03/11/2004
Publication #:	US20050202607	Pub Dt:	09/15/2005
Title:	METHOD OF FORMING FINFET GATES WITHOUT LONG ETCHES

Patent #:	7023057	Issue Dt:	04/04/2006	Application #:	10799380	Filing Dt:	03/12/2004
Publication #:	US20050093077	Pub Dt:	05/05/2005
Title:	CMOS ON HYBRID SUBSTRATE WITH DIFFERENT CRYSTAL ORIENTATIONS USING SILICON-TO-SILICON DIRECT WAFER BONDING

Patent #:	7094651	Issue Dt:	08/22/2006	Application #:	10801766	Filing Dt:	03/16/2004
Publication #:	US20050009225	Pub Dt:	01/13/2005
Title:	HYDRAZINE-FREE SOLUTION DEPOSITION OF CHALCOGENIDE FILMS

Patent #:	7084758	Issue Dt:	08/01/2006	Application #:	10804308	Filing Dt:	03/19/2004
Title:	LOCATION-BASED REMINDERS

Patent #:	7030495	Issue Dt:	04/18/2006	Application #:	10804553	Filing Dt:	03/19/2004
Publication #:	US20050208752	Pub Dt:	09/22/2005
Title:	METHOD FOR FABRICATING A SELF-ALIGNED NANOCOLUMNAR AIRBRIDGE AND STRUCTURE PRODUCED THEREBY

Patent #:	7033888	Issue Dt:	04/25/2006	Application #:	10806117	Filing Dt:	03/23/2004
Publication #:	US20040175910	Pub Dt:	09/09/2004
Title:	ENGINEERED METAL GATE ELECTRODE

Patent #:	7676814	Issue Dt:	03/09/2010	Application #:	10809229	Filing Dt:	03/25/2004
Publication #:	US20050213603	Pub Dt:	09/29/2005
Title:	FOUR LAYER ARCHITECTURE FOR NETWORK DEVICE DRIVERS

Patent #:	6952052	Issue Dt:	10/04/2005	Application #:	10811860	Filing Dt:	03/30/2004
Publication #:	US20050224979	Pub Dt:	10/13/2005
Title:	CU INTERCONNECTS WITH COMPOSITE BARRIER LAYERS FOR WAFER-TO-WAFER UNIFORMITY

Patent #:	8450806	Issue Dt:	05/28/2013	Application #:	10814482	Filing Dt:	03/31/2004
Publication #:	US20050227498	Pub Dt:	10/13/2005
Title:	METHOD FOR FABRICATING STRAINED SILICON-ON-INSULATOR STRUCTURES AND STRAINED SILICON-ON INSULATOR STRUCTURES FORMED THEREBY

Patent #:	7356108	Issue Dt:	04/08/2008	Application #:	10817811	Filing Dt:	04/06/2004
Title:	OFDM RECEIVER HAVING ADAPTIVE CHANNEL ESTIMATOR FOR CORRECTING CHANNEL FADING BASED ON ACCUMULATED PSEUDO POWER VALUES

Patent #:	7400277	Issue Dt:	07/15/2008	Application #:	10818567	Filing Dt:	04/06/2004
Publication #:	US20050231401	Pub Dt:	10/20/2005
Title:	METHOD AND SYSTEM FOR THE COMPRESSION OF PROBABILITY TABLES

Patent #:	7005302	Issue Dt:	02/28/2006	Application #:	10819441	Filing Dt:	04/07/2004
Publication #:	US20050224879	Pub Dt:	10/13/2005
Title:	SEMICONDUCTOR ON INSULATOR SUBSTRATE AND DEVICES FORMED THEREFROM

Patent #:	7373466	Issue Dt:	05/13/2008	Application #:	10819451	Filing Dt:	04/07/2004
Title:	METHOD AND APPARATUS FOR FILTERING MEMORY WRITE SNOOP ACTIVITY IN A DISTRIBUTED SHARED MEMORY COMPUTER

Patent #:	7074686	Issue Dt:	07/11/2006	Application #:	10824289	Filing Dt:	04/14/2004
Publication #:	US20040192069	Pub Dt:	09/30/2004
Title:	METHOD OF CREATING HIGH-QUALITY RELAXED SIGE-ON-INSULATOR FOR STRAINED SI CMOS APPLICATIONS

Patent #:	7102232	Issue Dt:	09/05/2006	Application #:	10827693	Filing Dt:	04/19/2004
Publication #:	US20050230831	Pub Dt:	10/20/2005
Title:	STRUCTURE TO IMPROVE ADHESION BETWEEN TOP CVD LOW-K DIELECTIRIC AND DIELECTRIC CAPPING LAYER

Patent #:	6921963	Issue Dt:	07/26/2005	Application #:	10830006	Filing Dt:	04/23/2004
Publication #:	US20040197975	Pub Dt:	10/07/2004
Title:	NARROW FIN FINFET

Patent #:	7752355	Issue Dt:	07/06/2010	Application #:	10832658	Filing Dt:	04/27/2004
Publication #:	US20050238038	Pub Dt:	10/27/2005
Title:	ASYNCHRONOUS PACKET BASED DUAL PORT LINK LIST HEADER AND DATA CREDIT MANAGEMENT STRUCTURE

Patent #:	7027130	Issue Dt:	04/11/2006	Application #:	10833651	Filing Dt:	04/28/2004
Publication #:	US20050243299	Pub Dt:	11/03/2005
Title:	DEVICE AND METHOD FOR DETERMINING AN ILLUMINATION INTENSITY PROFILE OF AN ILLUMINATOR FOR A LITHOGRAPHY SYSTEM

Patent #:	7038231	Issue Dt:	05/02/2006	Application #:	10835814	Filing Dt:	04/30/2004
Publication #:	US20050242338	Pub Dt:	11/03/2005
Title:	NON-PLANARIZED, SELF-ALIGNED, NON-VOLATILE PHASE-CHANGE MEMORY ARRAY AND METHOD OF FORMATION

Patent #:	7449782	Issue Dt:	11/11/2008	Application #:	10838378	Filing Dt:	05/04/2004
Publication #:	US20050250301	Pub Dt:	11/10/2005
Title:	SELF-ALIGNED METAL TO FORM CONTACTS TO GE CONTAINING SUBSTRATES AND STRUCTURE FORMED THEREBY

Patent #:	7263600	Issue Dt:	08/28/2007	Application #:	10839474	Filing Dt:	05/05/2004
Publication #:	US20050247774	Pub Dt:	11/10/2005
Title:	SYSTEM AND METHOD FOR VALIDATING A MEMORY FILE THAT LINKS SPECULATIVE RESULTS OF LOAD OPERATIONS TO REGISTER VALUES

Patent #:	7502474	Issue Dt:	03/10/2009	Application #:	10839872	Filing Dt:	05/06/2004
Publication #:	US20050256975	Pub Dt:	11/17/2005
Title:	NETWORK INTERFACE WITH SECURITY ASSOCIATION DATA PREFETCH FOR HIGH SPEED OFFLOADED SECURITY PROCESSING

Patent #:	7725905	Issue Dt:	05/25/2010	Application #:	10843255	Filing Dt:	05/10/2004
Title:	MEDIA ACCELERATOR INTERFACE API

Patent #:	7131104	Issue Dt:	10/31/2006	Application #:	10844794	Filing Dt:	05/13/2004
Publication #:	US20050257187	Pub Dt:	11/17/2005
Title:	FAST AND ACCURATE OPTICAL PROXIMITY CORRECTION ENGINE FOR INCORPORATING LONG RANGE FLARE EFFECTS

Patent #:	7557035	Issue Dt:	07/07/2009	Application #:	10849847	Filing Dt:	05/21/2004
Title:	METHOD OF FORMING SEMICONDUCTOR DEVICES BY MICROWAVE CURING OF LOW-K DIELECTRIC FILMS

Patent #:	7135391	Issue Dt:	11/14/2006	Application #:	10851821	Filing Dt:	05/21/2004
Publication #:	US20050260832	Pub Dt:	11/24/2005
Title:	POLYCRYSTALLINE SIGE JUNCTIONS FOR ADVANCED DEVICES

Patent #:	6906401	Issue Dt:	06/14/2005	Application #:	10856503	Filing Dt:	05/28/2004
Publication #:	US20040224461	Pub Dt:	11/11/2004
Title:	METHOD TO FABRICATE HIGH-PERFORMANCE NPN TRANSISTORS IN A BICMOS PROCESS

Patent #:	7009694	Issue Dt:	03/07/2006	Application #:	10856547	Filing Dt:	05/28/2004
Publication #:	US20050265072	Pub Dt:	12/01/2005
Title:	INDIRECT SWITCHING AND SENSING OF PHASE CHANGE MEMORY CELLS

Patent #:	7366885	Issue Dt:	04/29/2008	Application #:	10858791	Filing Dt:	06/02/2004
Title:	METHOD FOR OPTIMIZING LOOP CONTROL OF MICROCODED INSTRUCTIONS

Patent #:	7176110	Issue Dt:	02/13/2007	Application #:	10862518	Filing Dt:	06/07/2004
Publication #:	US20050095820	Pub Dt:	05/05/2005
Title:	TECHNIQUE FOR FORMING TRANSISTORS HAVING RAISED DRAIN AND SOURCE REGIONS WITH DIFFERENT HEIGHTS

Patent #:	6900519	Issue Dt:	05/31/2005	Application #:	10865138	Filing Dt:	06/10/2004
Publication #:	US20040222495	Pub Dt:	11/11/2004
Title:	DIFFUSED EXTRINSIC BASE AND METHOD FOR FABRICATION

Patent #:	7408269	Issue Dt:	08/05/2008	Application #:	10867094	Filing Dt:	06/14/2004
Publication #:	US20050275977	Pub Dt:	12/15/2005
Title:	MULTI-LEVEL POWER SUPPLY SYSTEM FOR A COMPLEMENTARY METAL OXIDE SEMICONDUCTOR CIRCUIT

Patent #:	7064019	Issue Dt:	06/20/2006	Application #:	10869624	Filing Dt:	06/16/2004
Publication #:	US20040222466	Pub Dt:	11/11/2004
Title:	IMPLANTED ASYMMETRIC DOPED POLYSILICON GATE FINFET

Patent #:	8351445	Issue Dt:	01/08/2013	Application #:	10870318	Filing Dt:	06/17/2004
Title:	NETWORK INTERFACE SYSTEMS AND METHODS FOR OFFLOADING SEGMENTATION AND/OR CHECKSUMMING WITH SECURITY PROCESSING

Patent #:	7064410	Issue Dt:	06/20/2006	Application #:	10872173	Filing Dt:	06/18/2004
Publication #:	US20040227209	Pub Dt:	11/18/2004
Title:	MOS ANTIFUSE WITH LOW POST-PROGRAM RESISTANCE

Patent #:	7115959	Issue Dt:	10/03/2006	Application #:	10873733	Filing Dt:	06/22/2004
Publication #:	US20050280105	Pub Dt:	12/22/2005
Title:	METHOD OF FORMING METAL/HIGH-K GATE STACKS WITH HIGH MOBILITY

Patent #:	7187059	Issue Dt:	03/06/2007	Application #:	10875727	Filing Dt:	06/24/2004
Publication #:	US20050285159	Pub Dt:	12/29/2005
Title:	COMPRESSIVE SIGE <110> GROWTH AND STRUCTURE OF MOSFET DEVICES

Patent #:	6970372	Issue Dt:	11/29/2005	Application #:	10879833	Filing Dt:	06/29/2004
Title:	DUAL GATED FINFET GAIN CELL

Patent #:	6858903	Issue Dt:	02/22/2005	Application #:	10881449	Filing Dt:	06/30/2004
Publication #:	US20040248368	Pub Dt:	12/09/2004
Title:	MOSFET DEVICE WITH IN-SITU DOPED, RAISED SOURCE AND DRAIN STRUCTURES

Patent #:	7139172	Issue Dt:	11/21/2006	Application #:	10883392	Filing Dt:	07/01/2004
Publication #:	US20060002088	Pub Dt:	01/05/2006
Title:	APPARATUS AND METHODS FOR MICROCHANNEL COOLING OF SEMICONDUCTOR INTEGRATED CIRCUIT PACKAGES

Patent #:	7705405	Issue Dt:	04/27/2010	Application #:	10885462	Filing Dt:	07/06/2004
Publication #:	US20060006476	Pub Dt:	01/12/2006
Title:	METHODS FOR THE FORMATION OF FULLY SILICIDED METAL GATES

Patent #:	7827355	Issue Dt:	11/02/2010	Application #:	10887069	Filing Dt:	07/08/2004
Title:	DATA PROCESSOR HAVING A CACHE WITH EFFICIENT STORAGE OF PREDECODE INFORMATION, CACHE, AND METHOD

Patent #:	7119018	Issue Dt:	10/10/2006	Application #:	10887087	Filing Dt:	07/09/2004
Publication #:	US20060006070	Pub Dt:	01/12/2006
Title:	COPPER CONDUCTOR

Patent #:	6975532	Issue Dt:	12/13/2005	Application #:	10887983	Filing Dt:	07/08/2004
Title:	QUASI-STATIC RANDOM ACCESS MEMORY

Patent #:	8504728	Issue Dt:	08/06/2013	Application #:	10890649	Filing Dt:	07/14/2004
Title:	Network interface with secondary data and packet information storage and memory control systems to accommodate out-of-order data processing and split transactions on a host system bus

Patent #:	7347621	Issue Dt:	03/25/2008	Application #:	10892211	Filing Dt:	07/16/2004
Publication #:	US20060013281	Pub Dt:	01/19/2006
Title:	METHOD AND SYSTEM FOR REAL-TIME ESTIMATION AND PREDICTION OF THE THERMAL STATE OF A MICROPROCESSOR UNIT

Patent #:	7505598	Issue Dt:	03/17/2009	Application #:	10899199	Filing Dt:	07/26/2004
Publication #:	US20050190919	Pub Dt:	09/01/2005
Title:	ON-THE-FLY ENCRYPTION/DECRYPTION FOR WLAN COMMUNICATIONS

Patent #:	8811618	Issue Dt:	08/19/2014	Application #:	10899200	Filing Dt:	07/26/2004
Publication #:	US20050169480	Pub Dt:	08/04/2005
Title:	FAST CIPHERING KEY SEARCH FOR WLAN RECEIVERS

Patent #:	7176508	Issue Dt:	02/13/2007	Application #:	10899768	Filing Dt:	07/27/2004
Publication #:	US20060024852	Pub Dt:	02/02/2006
Title:	TEMPERATURE SENSOR FOR HIGH POWER VERY LARGE SCALE INTEGRATION CIRCUITS

Patent #:	7277982	Issue Dt:	10/02/2007	Application #:	10899937	Filing Dt:	07/27/2004
Publication #:	US20060026342	Pub Dt:	02/02/2006
Title:	DRAM ACCESS COMMAND QUEUING STRUCTURE

Patent #:	7239489	Issue Dt:	07/03/2007	Application #:	10900487	Filing Dt:	07/28/2004
Publication #:	US20050009211	Pub Dt:	01/13/2005
Title:	TUNNELING MAGNETORESISTIVE (TMR) SENSOR HAVING A MAGNESIUM OXIDE BARRIER LAYER FORMED BY A MULTI-LAYER PROCESS

Patent #:	7135398	Issue Dt:	11/14/2006	Application #:	10901868	Filing Dt:	07/29/2004
Publication #:	US20050023693	Pub Dt:	02/03/2005
Title:	RELIABLE LOW-K INTERCONNECT STRUCTURE WITH HYBRID DIELECTRIC

Patent #:	7707007	Issue Dt:	04/27/2010	Application #:	10902601	Filing Dt:	07/30/2004
Publication #:	US20060026012	Pub Dt:	02/02/2006
Title:	AUTONOMIC CLIENT MIGRATION SYSTEM FOR SERVICE ENGAGEMENTS

Patent #:	7098536	Issue Dt:	08/29/2006	Application #:	10904059	Filing Dt:	10/21/2004
Publication #:	US20060099793	Pub Dt:	05/11/2006
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Patent #:	7350183	Issue Dt:	03/25/2008	Application #:	10904355	Filing Dt:	11/05/2004
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Title:	METHOD FOR IMPROVING OPTICAL PROXIMITY CORRECTION

Patent #:	7119333	Issue Dt:	10/10/2006	Application #:	10904438	Filing Dt:	11/10/2004
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100

Patent #:	7138717	Issue Dt:	11/21/2006	Application #:	10904827	Filing Dt:	12/01/2004
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Title:	IMPROVED HDP-BASED ILD CAPPING LAYER

Assignor

GLOBALFOUNDRIES INC.

Exec Dt:

10/22/2020

Assignee

GLOBALFOUNDRIES U.S. INC.

2600 GREAT AMERICA WAY

SANTA CLARA, CALIFORNIA 95054

Correspondence name and address
	GLOBALFOUNDRIES SINGAPORE PTE. LTD.
	60 WOODLANDS INDUSTRIAL PARK D STREET 2,
	SINGAPORE, 738406 SINGAPORE

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