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Reel/Frame:051028/0001   Pages: 834
Recorded: 11/12/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 16529
Page 155 of 166
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166
1
Patent #:
9973181
Issue Dt:
05/15/2018
Application #:
15677970
Filing Dt:
08/15/2017
Publication #:
US20170346471
Pub Dt:
11/30/2017
Title:
SYNCHRONIZED SEMICONDUCTOR DEVICE WITH PHASE ADJUSTMENT CIRCUIT
2
Patent #:
10121670
Issue Dt:
11/06/2018
Application #:
15678747
Filing Dt:
08/16/2017
Publication #:
US20170365481
Pub Dt:
12/21/2017
Title:
METHODS OF FABRICATING SEMICONDUCTOR STRUCTURES
3
Patent #:
10153018
Issue Dt:
12/11/2018
Application #:
15678978
Filing Dt:
08/16/2017
Publication #:
US20180061468
Pub Dt:
03/01/2018
Title:
FERROELECTRIC MEMORY CELLS
4
Patent #:
10074414
Issue Dt:
09/11/2018
Application #:
15679016
Filing Dt:
08/16/2017
Publication #:
US20180061469
Pub Dt:
03/01/2018
Title:
APPARATUSES AND METHODS INCLUDING FERROELECTRIC MEMORY AND FOR OPERATING FERROELECTRIC MEMORY
5
Patent #:
10312388
Issue Dt:
06/04/2019
Application #:
15679028
Filing Dt:
08/16/2017
Publication #:
US20170365726
Pub Dt:
12/21/2017
Title:
METHOD AND OPTOELECTRONIC STRUCTURE PROVIDING POLYSILICON PHOTONIC DEVICES WITH DIFFERENT OPTICAL PROPERTIES IN DIFFERENT REGIONS
6
Patent #:
10127965
Issue Dt:
11/13/2018
Application #:
15679032
Filing Dt:
08/16/2017
Publication #:
US20180061471
Pub Dt:
03/01/2018
Title:
APPARATUSES AND METHODS INCLUDING FERROELECTRIC MEMORY AND FOR ACCESSING FERROELECTRIC MEMORY
7
Patent #:
10127972
Issue Dt:
11/13/2018
Application #:
15679042
Filing Dt:
08/16/2017
Publication #:
US20180061477
Pub Dt:
03/01/2018
Title:
APPARATUSES AND METHODS INCLUDING TWO TRANSISTOR-ONE CAPACITOR MEMORY AND FOR ACCESSING SAME
8
Patent #:
10014319
Issue Dt:
07/03/2018
Application #:
15679499
Filing Dt:
08/17/2017
Title:
Conductive Components and Memory Assemblies
9
Patent #:
10083984
Issue Dt:
09/25/2018
Application #:
15679727
Filing Dt:
08/17/2017
Publication #:
US20170365617
Pub Dt:
12/21/2017
Title:
Integrated Structures and Methods of Forming Integrated Structures
10
Patent #:
10923627
Issue Dt:
02/16/2021
Application #:
15679958
Filing Dt:
08/17/2017
Publication #:
US20170345972
Pub Dt:
11/30/2017
Title:
LIGHT EMITTING DIODES AND ASSOCIATED METHODS OF MANUFACTURING
11
Patent #:
10153014
Issue Dt:
12/11/2018
Application #:
15680006
Filing Dt:
08/17/2017
Title:
DQS-OFFSET AND READ-RTT-DISABLE EDGE CONTROL
12
Patent #:
10326044
Issue Dt:
06/18/2019
Application #:
15680461
Filing Dt:
08/18/2017
Publication #:
US20190057901
Pub Dt:
02/21/2019
Title:
METHOD AND APPARATUS FOR PROCESSING SEMICONDUCTOR DEVICE STRUCTURES
13
Patent #:
10090041
Issue Dt:
10/02/2018
Application #:
15680776
Filing Dt:
08/18/2017
Publication #:
US20170345481
Pub Dt:
11/30/2017
Title:
PERFORMING LOGICAL OPERATIONS USING SENSING CIRCUITRY
14
Patent #:
10096483
Issue Dt:
10/09/2018
Application #:
15681066
Filing Dt:
08/18/2017
Publication #:
US20170372913
Pub Dt:
12/28/2017
Title:
Pitch Reduction Technology Using Alternating Spacer Depositions During the Formation of a Semiconductor Device and Systems Including Same
15
Patent #:
10443531
Issue Dt:
10/15/2019
Application #:
15681143
Filing Dt:
08/18/2017
Publication #:
US20190055895
Pub Dt:
02/21/2019
Title:
APPARATUSES AND METHODS FOR STORING REDUNDANCY REPAIR INFORMATION FOR MEMORIES
16
Patent #:
10381103
Issue Dt:
08/13/2019
Application #:
15681183
Filing Dt:
08/18/2017
Publication #:
US20190057758
Pub Dt:
02/21/2019
Title:
APPARATUSES AND METHODS FOR LATCHING REDUNDANCY REPAIR ADDRESSES TO AVOID ADDRESS BITS OVERWRITTEN AT A REPAIR BLOCK
17
Patent #:
9875960
Issue Dt:
01/23/2018
Application #:
15681561
Filing Dt:
08/21/2017
Title:
Memory Arrays
18
Patent #:
10628326
Issue Dt:
04/21/2020
Application #:
15681619
Filing Dt:
08/21/2017
Publication #:
US20190057038
Pub Dt:
02/21/2019
Title:
LOGICAL TO PHYSICAL MAPPING
19
Patent #:
9881923
Issue Dt:
01/30/2018
Application #:
15681734
Filing Dt:
08/21/2017
Title:
Floating Body Transistors and Memory Arrays Comprising Floating Body Transistors
20
Patent #:
10090457
Issue Dt:
10/02/2018
Application #:
15681763
Filing Dt:
08/21/2017
Publication #:
US20170345996
Pub Dt:
11/30/2017
Title:
SEMICONDUCTOR DEVICES WITH MAGNETIC REGIONS AND STRESSOR STRUCTURES, AND METHODS OF OPERATION
21
Patent #:
10388330
Issue Dt:
08/20/2019
Application #:
15682221
Filing Dt:
08/21/2017
Title:
USING OUT-OF-BAND SIGNALING TO COMMUNICATE WITH DAISY CHAINED NONVOLATILE MEMORIES
22
Patent #:
10056137
Issue Dt:
08/21/2018
Application #:
15682228
Filing Dt:
08/21/2017
Publication #:
US20170345493
Pub Dt:
11/30/2017
Title:
APPARATUSES AND METHODS FOR ACCESSING MEMORY CELLS
23
Patent #:
10229730
Issue Dt:
03/12/2019
Application #:
15682775
Filing Dt:
08/22/2017
Publication #:
US20170352402
Pub Dt:
12/07/2017
Title:
TIMING CONTROL CIRCUIT SHARED BY A PLURALITY OF BANKS
24
Patent #:
NONE
Issue Dt:
Application #:
15683059
Filing Dt:
08/22/2017
Publication #:
US20190067145
Pub Dt:
02/28/2019
Title:
SEMICONDUCTOR DEVICE
25
Patent #:
10096579
Issue Dt:
10/09/2018
Application #:
15683336
Filing Dt:
08/22/2017
Publication #:
US20170352645
Pub Dt:
12/07/2017
Title:
THERMAL PADS BETWEEN STACKED SEMICONDUCTOR DIES AND ASSOCIATED SYSTEMS AND METHODS
26
Patent #:
10365325
Issue Dt:
07/30/2019
Application #:
15683430
Filing Dt:
08/22/2017
Publication #:
US20190066816
Pub Dt:
02/28/2019
Title:
SEMICONDUCTOR MEMORY DEVICE
27
Patent #:
10090064
Issue Dt:
10/02/2018
Application #:
15683439
Filing Dt:
08/22/2017
Publication #:
US20180190368
Pub Dt:
07/05/2018
Title:
TIMING BASED ARBITER SYSTEMS AND CIRCUITS FOR ZQ CALIBRATION
28
Patent #:
10394473
Issue Dt:
08/27/2019
Application #:
15683540
Filing Dt:
08/22/2017
Publication #:
US20170351451
Pub Dt:
12/07/2017
Title:
APPARATUSES AND METHODS FOR ARBITRATING A SHARED TERMINAL FOR CALIBRATION OF AN IMPEDANCE TERMINATION
29
Patent #:
10748872
Issue Dt:
08/18/2020
Application #:
15683609
Filing Dt:
08/22/2017
Publication #:
US20190067245
Pub Dt:
02/28/2019
Title:
INTEGRATED SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING THE SAME
30
Patent #:
10067901
Issue Dt:
09/04/2018
Application #:
15683649
Filing Dt:
08/22/2017
Publication #:
US20170351631
Pub Dt:
12/07/2017
Title:
METHODS AND APPARATUSES FOR PROVIDING DATA RECEIVED BY A STATE MACHINE ENGINE
31
Patent #:
10976936
Issue Dt:
04/13/2021
Application #:
15683821
Filing Dt:
08/23/2017
Publication #:
US20190065077
Pub Dt:
02/28/2019
Title:
SENSING OPERATIONS IN MEMORY
32
Patent #:
10886244
Issue Dt:
01/05/2021
Application #:
15684054
Filing Dt:
08/23/2017
Publication #:
US20170352633
Pub Dt:
12/07/2017
Title:
COLLARS FOR UNDER-BUMP METAL STRUCTURES AND ASSOCIATED SYSTEMS AND METHODS
33
Patent #:
10163685
Issue Dt:
12/25/2018
Application #:
15684080
Filing Dt:
08/23/2017
Publication #:
US20170372940
Pub Dt:
12/28/2017
Title:
Methods Of Forming One Or More Covered Voids In A Semiconductor Substrate
34
Patent #:
10388864
Issue Dt:
08/20/2019
Application #:
15684081
Filing Dt:
08/23/2017
Publication #:
US20170373247
Pub Dt:
12/28/2017
Title:
Transistors and Methods of Forming Transistors
35
Patent #:
10553259
Issue Dt:
02/04/2020
Application #:
15684577
Filing Dt:
08/23/2017
Publication #:
US20190066738
Pub Dt:
02/28/2019
Title:
SEMICONDUCTOR DIES SUPPORTING MULTIPLE PACKAGING CONFIGURATIONS AND ASSOCIATED METHODS
36
Patent #:
10304724
Issue Dt:
05/28/2019
Application #:
15684612
Filing Dt:
08/23/2017
Publication #:
US20180019157
Pub Dt:
01/18/2018
Title:
Methods Of Forming One Or More Covered Voids In A Semiconductor Substrate
37
Patent #:
10134712
Issue Dt:
11/20/2018
Application #:
15684703
Filing Dt:
08/23/2017
Title:
METHODS AND SYSTEMS FOR IMPROVING POWER DELIVERY AND SIGNALING IN STACKED SEMICONDUCTOR DEVICES
38
Patent #:
10014211
Issue Dt:
07/03/2018
Application #:
15684722
Filing Dt:
08/23/2017
Publication #:
US20170352577
Pub Dt:
12/07/2017
Title:
Methods Of Forming One Or More Covered Voids In A Semiconductor Substrate
39
Patent #:
10153197
Issue Dt:
12/11/2018
Application #:
15684728
Filing Dt:
08/23/2017
Publication #:
US20170352578
Pub Dt:
12/07/2017
Title:
Methods Of Forming One Or More Covered Voids In A Semiconductor Substrate
40
Patent #:
10063240
Issue Dt:
08/28/2018
Application #:
15684734
Filing Dt:
08/23/2017
Publication #:
US20170366188
Pub Dt:
12/21/2017
Title:
APPARATUSES WITH AN EMBEDDED COMBINATION LOGIC CIRCUIT FOR HIGH SPEED OPERATIONS
41
Patent #:
9997398
Issue Dt:
06/12/2018
Application #:
15684741
Filing Dt:
08/23/2017
Publication #:
US20170372941
Pub Dt:
12/28/2017
Title:
METHODS OF FORMING ONE OR MORE COVERED VOIDS IN A SEMICONDUCTOR SUBSTRATE
42
Patent #:
10366772
Issue Dt:
07/30/2019
Application #:
15684756
Filing Dt:
08/23/2017
Publication #:
US20170372795
Pub Dt:
12/28/2017
Title:
SYSTEMS AND METHODS FOR TESTING A SEMICONDUCTOR MEMORY DEVICE HAVING A REFERENCE MEMORY ARRAY
43
Patent #:
10290359
Issue Dt:
05/14/2019
Application #:
15684763
Filing Dt:
08/23/2017
Publication #:
US20170352429
Pub Dt:
12/07/2017
Title:
MEMORY REFRESH METHODS AND APPARATUSES
44
Patent #:
11210019
Issue Dt:
12/28/2021
Application #:
15684773
Filing Dt:
08/23/2017
Publication #:
US20190065105
Pub Dt:
02/28/2019
Title:
MEMORY WITH VIRTUAL PAGE SIZE
45
Patent #:
10163501
Issue Dt:
12/25/2018
Application #:
15684784
Filing Dt:
08/23/2017
Publication #:
US20170352416
Pub Dt:
12/07/2017
Title:
APPARATUSES, MEMORIES, AND METHODS FOR ADDRESS DECODING AND SELECTING AN ACCESS LINE
46
Patent #:
10394456
Issue Dt:
08/27/2019
Application #:
15684792
Filing Dt:
08/23/2017
Publication #:
US20190065051
Pub Dt:
02/28/2019
Title:
ON DEMAND MEMORY PAGE SIZE
47
Patent #:
10419574
Issue Dt:
09/17/2019
Application #:
15684831
Filing Dt:
08/23/2017
Publication #:
US20190068743
Pub Dt:
02/28/2019
Title:
MEMORY DEVICE WITH A MULTI-MODE COMMUNICATION MECHANISM
48
Patent #:
10366855
Issue Dt:
07/30/2019
Application #:
15685387
Filing Dt:
08/24/2017
Publication #:
US20170372861
Pub Dt:
12/28/2017
Title:
Fuse Element Assemblies
49
Patent #:
10074406
Issue Dt:
09/11/2018
Application #:
15685643
Filing Dt:
08/24/2017
Publication #:
US20180005669
Pub Dt:
01/04/2018
Title:
APPARATUSES AND METHODS FOR PERFORMING LOGICAL OPERATIONS USING SENSING CIRCUITRY
50
Patent #:
11282845
Issue Dt:
03/22/2022
Application #:
15685690
Filing Dt:
08/24/2017
Publication #:
US20190067306
Pub Dt:
02/28/2019
Title:
SEMICONDUCTOR DEVICES COMPRISING CARBON-DOPED SILICON NITRIDE AND RELATED METHODS
51
Patent #:
9996496
Issue Dt:
06/12/2018
Application #:
15685855
Filing Dt:
08/24/2017
Publication #:
US20170351637
Pub Dt:
12/07/2017
Title:
DEVICES, SYSTEMS, AND METHODS OF REDUCING CHIP SELECT
52
Patent #:
10147607
Issue Dt:
12/04/2018
Application #:
15685871
Filing Dt:
08/24/2017
Title:
SEMICONDUCTOR PITCH PATTERNING
53
Patent #:
10515972
Issue Dt:
12/24/2019
Application #:
15685878
Filing Dt:
08/24/2017
Publication #:
US20170373075
Pub Dt:
12/28/2017
Title:
MEMORY CELL PILLAR INCLUDING SOURCE JUNCTION PLUG
54
Patent #:
10217706
Issue Dt:
02/26/2019
Application #:
15685907
Filing Dt:
08/24/2017
Publication #:
US20170352616
Pub Dt:
12/07/2017
Title:
SEMICONDUCTOR CONSTRUCTIONS
55
Patent #:
10210940
Issue Dt:
02/19/2019
Application #:
15685909
Filing Dt:
08/24/2017
Publication #:
US20170352426
Pub Dt:
12/07/2017
Title:
MEMORY READ APPARATUS AND METHODS
56
Patent #:
10103038
Issue Dt:
10/16/2018
Application #:
15685921
Filing Dt:
08/24/2017
Title:
THRUMOLD POST PACKAGE WITH REVERSE BUILD UP HYBRID ADDITIVE STRUCTURE
57
Patent #:
10162556
Issue Dt:
12/25/2018
Application #:
15685926
Filing Dt:
08/24/2017
Publication #:
US20170351458
Pub Dt:
12/07/2017
Title:
MULTI-PARTITIONING OF MEMORIES
58
Patent #:
NONE
Issue Dt:
Application #:
15685940
Filing Dt:
08/24/2017
Publication #:
US20190067034
Pub Dt:
02/28/2019
Title:
HYBRID ADDITIVE STRUCTURE STACKABLE MEMORY DIE USING WIRE BOND
59
Patent #:
NONE
Issue Dt:
Application #:
15685950
Filing Dt:
08/24/2017
Publication #:
US20170351737
Pub Dt:
12/07/2017
Title:
METHODS AND SYSTEMS FOR AUTONOMOUS MEMORY SEARCHING
60
Patent #:
10261123
Issue Dt:
04/16/2019
Application #:
15685997
Filing Dt:
08/24/2017
Publication #:
US20190064257
Pub Dt:
02/28/2019
Title:
SEMICONDUCTOR DEVICE STRUCTURES FOR BURN-IN TESTING AND METHODS THEREOF
61
Patent #:
10307850
Issue Dt:
06/04/2019
Application #:
15686008
Filing Dt:
08/24/2017
Publication #:
US20190061034
Pub Dt:
02/28/2019
Title:
SOLDER REMOVAL FROM SEMICONDUCTOR DEVICES
62
Patent #:
10304805
Issue Dt:
05/28/2019
Application #:
15686024
Filing Dt:
08/24/2017
Publication #:
US20190067247
Pub Dt:
02/28/2019
Title:
DUAL SIDED FAN-OUT PACKAGE HAVING LOW WARPAGE ACROSS ALL TEMPERATURES
63
Patent #:
NONE
Issue Dt:
Application #:
15686029
Filing Dt:
08/24/2017
Publication #:
US20190067248
Pub Dt:
02/28/2019
Title:
SEMICONDUCTOR DEVICE HAVING LATERALLY OFFSET STACKED SEMICONDUCTOR DIES
64
Patent #:
10153196
Issue Dt:
12/11/2018
Application #:
15686082
Filing Dt:
08/24/2017
Title:
Arrays of Cross-Point Memory Structures
65
Patent #:
9966451
Issue Dt:
05/08/2018
Application #:
15686101
Filing Dt:
08/24/2017
Title:
Integrated Structures
66
Patent #:
10325917
Issue Dt:
06/18/2019
Application #:
15686107
Filing Dt:
08/24/2017
Publication #:
US20170373076
Pub Dt:
12/28/2017
Title:
Integrated Structures and Methods of Forming Integrated Structures
67
Patent #:
10482954
Issue Dt:
11/19/2019
Application #:
15686308
Filing Dt:
08/25/2017
Publication #:
US20170352414
Pub Dt:
12/07/2017
Title:
PHASE CHANGE MEMORY DEVICE
68
Patent #:
10217799
Issue Dt:
02/26/2019
Application #:
15686389
Filing Dt:
08/25/2017
Publication #:
US20170352704
Pub Dt:
12/07/2017
Title:
CELL PILLAR STRUCTURES AND INTEGRATED FLOWS
69
Patent #:
10090051
Issue Dt:
10/02/2018
Application #:
15686416
Filing Dt:
08/25/2017
Publication #:
US20170352421
Pub Dt:
12/07/2017
Title:
MEMORY ARRAY WITH POWER-EFFICIENT READ ARCHITECTURE
70
Patent #:
10325661
Issue Dt:
06/18/2019
Application #:
15686510
Filing Dt:
08/25/2017
Publication #:
US20170358359
Pub Dt:
12/14/2017
Title:
METHODS OF PROGRAMMING MEMORY
71
Patent #:
10607851
Issue Dt:
03/31/2020
Application #:
15686526
Filing Dt:
08/25/2017
Publication #:
US20190067028
Pub Dt:
02/28/2019
Title:
VAPOR-ETCH CYCLIC PROCESS
72
Patent #:
10366767
Issue Dt:
07/30/2019
Application #:
15686754
Filing Dt:
08/25/2017
Publication #:
US20170352431
Pub Dt:
12/07/2017
Title:
MEMORY DEVICES CONFIGURED TO PERFORM LEAK CHECKS
73
Patent #:
10700038
Issue Dt:
06/30/2020
Application #:
15686963
Filing Dt:
08/25/2017
Publication #:
US20190067238
Pub Dt:
02/28/2019
Title:
METHODS AND SYSTEMS FOR INHIBITING BONDING MATERIALS FROM CONTAMINATING A SEMICONDUCTOR PROCESSING TOOL
74
Patent #:
10157661
Issue Dt:
12/18/2018
Application #:
15686996
Filing Dt:
08/25/2017
Title:
MITIGATING LINE-TO-LINE CAPACITIVE COUPLING IN A MEMORY DIE
75
Patent #:
10090177
Issue Dt:
10/02/2018
Application #:
15687015
Filing Dt:
08/25/2017
Title:
COLD FLUID SEMICONDUCTOR DEVICE RELEASE DURING PICK AND PLACE OPERATIONS, AND ASSOCIATED SYSTEMS AND METHODS
76
Patent #:
10395715
Issue Dt:
08/27/2019
Application #:
15687019
Filing Dt:
08/25/2017
Publication #:
US20190066753
Pub Dt:
02/28/2019
Title:
SELF-REFERENCING MEMORY DEVICE
77
Patent #:
10424728
Issue Dt:
09/24/2019
Application #:
15687038
Filing Dt:
08/25/2017
Publication #:
US20190067571
Pub Dt:
02/28/2019
Title:
SELF-SELECTING MEMORY CELL WITH DIELECTRIC BARRIER
78
Patent #:
11086790
Issue Dt:
08/10/2021
Application #:
15687069
Filing Dt:
08/25/2017
Publication #:
US20190065396
Pub Dt:
02/28/2019
Title:
METHODS OF MEMORY ADDRESS VERIFICATION AND MEMORY DEVICES EMPLOYING THE SAME
79
Patent #:
10261914
Issue Dt:
04/16/2019
Application #:
15687169
Filing Dt:
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Pub Dt:
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Title:
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10/08/2019
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Filing Dt:
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Pub Dt:
12/28/2017
Title:
METHODS OF FORMING ELECTROMAGNETIC RADIATION CONDUITS
81
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Issue Dt:
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Filing Dt:
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Pub Dt:
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Title:
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82
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Pub Dt:
02/28/2019
Title:
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85
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Pub Dt:
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Title:
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Pub Dt:
12/14/2017
Title:
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87
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07/31/2018
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Filing Dt:
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Pub Dt:
12/07/2017
Title:
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88
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Filing Dt:
08/28/2017
Title:
APPARATUS CONTAINING CIRCUIT-PROTECTION DEVICES
89
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Title:
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90
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02/28/2019
Title:
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12/14/2017
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92
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Pub Dt:
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Title:
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08/28/2017
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Title:
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94
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Pub Dt:
12/14/2017
Title:
DIVISION OPERATIONS IN MEMORY
95
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12/14/2017
Title:
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06/16/2020
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Title:
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97
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98
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Title:
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100
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08/29/2017
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Pub Dt:
02/28/2019
Title:
DECODE CIRCUITRY COUPLED TO A MEMORY ARRAY
Assignor
1
JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Exec Dt:
07/31/2019
Assignees
1
MICRON TECHNOLOGY, INC.
8000 S FEDERAL WAY
BOISE, IDAHO 83707
2
MICRON SEMICONDUCTOR PRODUCTS, INC.
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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