|
|
Patent #:
|
|
Issue Dt:
|
05/19/2009
|
Application #:
|
10075218
|
Filing Dt:
|
02/14/2002
|
Publication #:
|
|
Pub Dt:
|
11/22/2007
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING A FUSE AND METHOD OF FORMING THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2005
|
Application #:
|
10077538
|
Filing Dt:
|
02/15/2002
|
Publication #:
|
|
Pub Dt:
|
08/21/2003
| | | | |
Title:
|
PROCESS AND APPARATUS FOR DISENGAGING SEMICONDUCTOR DIE FROM AN ADHESIVE FILM
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2006
|
Application #:
|
10079352
|
Filing Dt:
|
02/20/2002
|
Publication #:
|
|
Pub Dt:
|
08/21/2003
| | | | |
Title:
|
RADIO RECEIVER HAVING AN ADAPTIVE EQUALIZER AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2004
|
Application #:
|
10081199
|
Filing Dt:
|
02/22/2002
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
Title:
|
METHOD OF FABRICATING A TIERED STRUCTURE USING A MULTI-LAYERED RESIST STACK AND USE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2005
|
Application #:
|
10081431
|
Filing Dt:
|
02/22/2002
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
Title:
|
METHOD AND APPARATUS FOR IMPLEMENTING SIGNED MULTIPLICATION OF OPERANDS HAVING DIFFERING BIT WIDTHS WITHOUT SIGN EXTENSION OF THE MULTIPLICAND
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/2005
|
Application #:
|
10085694
|
Filing Dt:
|
02/28/2002
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
Title:
|
METHOD FOR PROCESSING MULTIPLE SEMICONDUCTOR DEVICES FOR TEST
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2005
|
Application #:
|
10085869
|
Filing Dt:
|
02/28/2002
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
Title:
|
STACKED DIE SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2003
|
Application #:
|
10085960
|
Filing Dt:
|
02/28/2002
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
Title:
|
METHOD FOR MANUFACTURING A LITHOGRAPHIC RETICLE FOR TRANSFERRING AN INTEGRATED CIRCUIT DESIGN TO A SEMICONDUCTOR WAFER
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/2004
|
Application #:
|
10086061
|
Filing Dt:
|
02/28/2002
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
Title:
|
HIGH FREQUENCY SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/2004
|
Application #:
|
10090094
|
Filing Dt:
|
03/04/2002
|
Publication #:
|
|
Pub Dt:
|
09/04/2003
| | | | |
Title:
|
METHOD OF ATTACHING A DIE TO A SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2004
|
Application #:
|
10091998
|
Filing Dt:
|
03/07/2002
|
Title:
|
INTEGRATED CIRCUIT STRUCTURE WITH DIELECTRIC ISLANDS IN METALLIZED REGIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2005
|
Application #:
|
10092683
|
Filing Dt:
|
03/06/2002
|
Publication #:
|
|
Pub Dt:
|
09/11/2003
| | | | |
Title:
|
MULTI-ROW LEADFRAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2005
|
Application #:
|
10097036
|
Filing Dt:
|
03/13/2002
|
Publication #:
|
|
Pub Dt:
|
09/18/2003
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING A BOND PAD AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2003
|
Application #:
|
10097059
|
Filing Dt:
|
03/13/2002
|
Publication #:
|
|
Pub Dt:
|
09/18/2003
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING A WIRE BOND PAD AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2004
|
Application #:
|
10098706
|
Filing Dt:
|
03/15/2002
|
Publication #:
|
|
Pub Dt:
|
09/18/2003
| | | | |
Title:
|
TRANSISTOR WITH LAYERED HIGH-K GATE DIELECTRIC AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2004
|
Application #:
|
10099794
|
Filing Dt:
|
03/15/2002
|
Publication #:
|
|
Pub Dt:
|
09/26/2002
| | | | |
Title:
|
HIGH K DIELECTRIC FILM
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2007
|
Application #:
|
10100462
|
Filing Dt:
|
03/18/2002
|
Publication #:
|
|
Pub Dt:
|
09/18/2003
| | | | |
Title:
|
INTEGRATED CIRCUIT SECURITY AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/2004
|
Application #:
|
10101298
|
Filing Dt:
|
03/19/2002
|
Publication #:
|
|
Pub Dt:
|
09/25/2003
| | | | |
Title:
|
INTEGRATED CIRCUIT DEVICE AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2003
|
Application #:
|
10103608
|
Filing Dt:
|
03/21/2002
|
Publication #:
|
|
Pub Dt:
|
09/05/2002
| | | | |
Title:
|
LITHOGRAPHIC TEMPLATE AND METHOD OF FORMATION AND USE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2009
|
Application #:
|
10105650
|
Filing Dt:
|
03/25/2002
|
Publication #:
|
|
Pub Dt:
|
09/25/2003
| | | | |
Title:
|
DIGITAL AUDIO SYSTEM AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2003
|
Application #:
|
10112271
|
Filing Dt:
|
03/28/2002
|
Publication #:
|
|
Pub Dt:
|
09/19/2002
| | | | |
Title:
|
METHOD FOR CLAMPING A SEMICONDUCTOR DEVICE IN A MANUFACTURING PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2004
|
Application #:
|
10114784
|
Filing Dt:
|
04/01/2002
|
Publication #:
|
|
Pub Dt:
|
10/02/2003
| | | | |
Title:
|
SEMICONDUCTOR COMPONENT HAVING HIGH VOLTAGE MOSFET AND METHOD OF MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/2006
|
Application #:
|
10115176
|
Filing Dt:
|
04/02/2002
|
Publication #:
|
|
Pub Dt:
|
10/02/2003
| | | | |
Title:
|
DIGITAL COLOR IMAGE PRE-PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2006
|
Application #:
|
10115465
|
Filing Dt:
|
04/02/2002
|
Publication #:
|
|
Pub Dt:
|
10/02/2003
| | | | |
Title:
|
AUTOMATIC WHITE BALANCE FOR DIGITAL IMAGING
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2005
|
Application #:
|
10117610
|
Filing Dt:
|
04/05/2002
|
Publication #:
|
|
Pub Dt:
|
10/09/2003
| | | | |
Title:
|
SYSTEM AND METHOD FOR CACHE EXTERNAL WRITING
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2003
|
Application #:
|
10120170
|
Filing Dt:
|
04/10/2002
|
Publication #:
|
|
Pub Dt:
|
10/16/2003
| | | | |
Title:
|
BROAD BAND IMPEDANCE MATCHING DEVICE WITH REDUCED LINE WIDTH
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2003
|
Application #:
|
10123271
|
Filing Dt:
|
04/16/2002
|
Publication #:
|
|
Pub Dt:
|
10/10/2002
| | | | |
Title:
|
LINEAR ENVELOPE TRACKING RF POWER AMPLIFIER WITH ADAPTIVE ANALOG SIGNAL PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2003
|
Application #:
|
10126562
|
Filing Dt:
|
04/19/2002
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR PROTECTING SUCH DEVICE FROM A REVERSED DRAIN VOLTAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2008
|
Application #:
|
10127087
|
Filing Dt:
|
04/22/2002
|
Publication #:
|
|
Pub Dt:
|
10/23/2003
| | | | |
Title:
|
SYSTEM FOR EXPANDED INSTRUCTION ENCODING AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2003
|
Application #:
|
10128043
|
Filing Dt:
|
04/23/2002
|
Publication #:
|
|
Pub Dt:
|
10/23/2003
| | | | |
Title:
|
MULTILAYER INTERGRATED CIRCUIT STRUCTURE WITH REDUCED MAGNETIC COUPLING
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2006
|
Application #:
|
10131662
|
Filing Dt:
|
04/24/2002
|
Publication #:
|
|
Pub Dt:
|
10/30/2003
| | | | |
Title:
|
METHOD AND APPARATUS FOR DETERMINING AN UPPER DATA RATE FOR A VARIABLE DATA RATE SIGNAL
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/2004
|
Application #:
|
10132918
|
Filing Dt:
|
04/26/2002
|
Publication #:
|
|
Pub Dt:
|
10/30/2003
| | | | |
Title:
|
DATA PREFETCHING APPARATUS IN A DATA PROCESSING SYSTEM AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/2004
|
Application #:
|
10133701
|
Filing Dt:
|
04/25/2002
|
Publication #:
|
|
Pub Dt:
|
10/30/2003
| | | | |
Title:
|
TESTING CIRCUIT AND METHOD FOR MEMS SENSOR PACKAGED WITH AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2004
|
Application #:
|
10134300
|
Filing Dt:
|
04/29/2002
|
Publication #:
|
|
Pub Dt:
|
10/30/2003
| | | | |
Title:
|
SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
03/08/2005
|
Application #:
|
10135644
|
Filing Dt:
|
04/30/2002
|
Publication #:
|
|
Pub Dt:
|
10/30/2003
| | | | |
Title:
|
APPARATUS AND RESONANT CIRCUIT EMPLOYING A VARACTOR DIODE IN PARALLEL WITH A TRANSMISSION LINE AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
09/16/2003
|
Application #:
|
10135782
|
Filing Dt:
|
04/30/2002
|
Title:
|
DIGITAL-TO- ANALOG CONVERSION WITH CURRENT PATH EXCHANGE DURING CLOCK PHASES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
10135877
|
Filing Dt:
|
04/30/2002
|
Publication #:
|
|
Pub Dt:
|
10/30/2003
| | | | |
Title:
|
METHOD AND APPARATUS FOR SECURE SCAN TESTING
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2004
|
Application #:
|
10136926
|
Filing Dt:
|
04/30/2002
|
Publication #:
|
|
Pub Dt:
|
10/30/2003
| | | | |
Title:
|
HBT LINEARIZER AND POWER BOOSTER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2005
|
Application #:
|
10137383
|
Filing Dt:
|
05/03/2002
|
Publication #:
|
|
Pub Dt:
|
11/06/2003
| | | | |
Title:
|
METHOD FOR GROWING A MONOCRYSTALLINE OXIDE LAYER AND FOR FABRICATING A SEMICONDUCTOR DEVICE ON A MONOCRYSTALLINE SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2004
|
Application #:
|
10141714
|
Filing Dt:
|
05/09/2002
|
Publication #:
|
|
Pub Dt:
|
11/13/2003
| | | | |
Title:
|
MULTIPLE THICKNESS SEMICONDUCTOR INTERCONNECT AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2003
|
Application #:
|
10142682
|
Filing Dt:
|
05/10/2002
|
Publication #:
|
|
Pub Dt:
|
09/12/2002
| | | | |
Title:
|
FILTER APPARATUS AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/16/2005
|
Application #:
|
10145500
|
Filing Dt:
|
05/14/2002
|
Publication #:
|
|
Pub Dt:
|
11/20/2003
| | | | |
Title:
|
UNDER BUMP METALLURGY STRUCTURAL DESIGN FOR HIGH RELIABILITY BUMPED PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/2004
|
Application #:
|
10145503
|
Filing Dt:
|
05/14/2002
|
Publication #:
|
|
Pub Dt:
|
11/20/2003
| | | | |
Title:
|
SOLDER COMPOSITIONS FOR ATTACHING A DIE TO A SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2004
|
Application #:
|
10145524
|
Filing Dt:
|
05/14/2002
|
Publication #:
|
|
Pub Dt:
|
11/20/2003
| | | | |
Title:
|
TRENCH MOS RESURF SUPER-JUNCTION DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/2004
|
Application #:
|
10150564
|
Filing Dt:
|
05/17/2002
|
Publication #:
|
|
Pub Dt:
|
11/20/2003
| | | | |
Title:
|
LITHOGRAPHY CORRECTION METHOD AND DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2003
|
Application #:
|
10151371
|
Filing Dt:
|
05/20/2002
|
Publication #:
|
|
Pub Dt:
|
09/26/2002
| | | | |
Title:
|
DUAL METAL GATE TRANSISTORS FOR CMOS PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2003
|
Application #:
|
10155316
|
Filing Dt:
|
05/24/2002
|
Publication #:
|
|
Pub Dt:
|
11/27/2003
| | | | |
Title:
|
SYSTEM AND METHOD FOR REGULATING A POWER SYSTEM WITH FEEDBACK USING CURRENT SENSING
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2004
|
Application #:
|
10155811
|
Filing Dt:
|
05/25/2002
|
Publication #:
|
|
Pub Dt:
|
11/27/2003
| | | | |
Title:
|
METHODS AND DEVICES FOR CONTROLLING STEPPER MOTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
10157094
|
Filing Dt:
|
05/29/2002
|
Publication #:
|
|
Pub Dt:
|
12/04/2003
| | | | |
Title:
|
METHOD AND APPARATUS FOR AFFECTING A PORTION OF AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2006
|
Application #:
|
10158692
|
Filing Dt:
|
05/30/2002
|
Publication #:
|
|
Pub Dt:
|
12/04/2003
| | | | |
Title:
|
METHOD OF FORMING A SEMICONDUCTOR DEVICE IN A SEMICONDUCTOR LAYER AND STRUCTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
09/26/2006
|
Application #:
|
10158991
|
Filing Dt:
|
05/31/2002
|
Publication #:
|
|
Pub Dt:
|
12/04/2003
| | | | |
Title:
|
Device for reducing sub-threshold leakage current within a high voltage driver
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2006
|
Application #:
|
10159386
|
Filing Dt:
|
05/31/2002
|
Publication #:
|
|
Pub Dt:
|
12/04/2003
| | | | |
Title:
|
SYSTEM AND METHOD FOR A DATA PROCESSING SYSTEM HAVING MULTIPLE REGISTER CONTEXTS THAT INCLUDE CONTEXT CONTROL INFORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/2004
|
Application #:
|
10159632
|
Filing Dt:
|
05/30/2002
|
Publication #:
|
|
Pub Dt:
|
12/04/2003
| | | | |
Title:
|
DMA CONTROLLER
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2004
|
Application #:
|
10159633
|
Filing Dt:
|
05/30/2002
|
Publication #:
|
|
Pub Dt:
|
12/04/2003
| | | | |
Title:
|
METHOD OF FORMING A COMPONENT OVERLYING A SEMICONDUCTOR SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/2004
|
Application #:
|
10159909
|
Filing Dt:
|
05/31/2002
|
Publication #:
|
|
Pub Dt:
|
12/04/2003
| | | | |
Title:
|
MICRO-ELECTRO-MECHANICAL DEVICE AND METHOD OF MAKING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/2004
|
Application #:
|
10160348
|
Filing Dt:
|
05/31/2002
|
Publication #:
|
|
Pub Dt:
|
12/04/2003
| | | | |
Title:
|
SYSTEM, APPARATUS AND METHOD FOR VOLTAGE TO CURRENT CONVERSION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/2004
|
Application #:
|
10160940
|
Filing Dt:
|
05/31/2002
|
Publication #:
|
|
Pub Dt:
|
12/04/2003
| | | | |
Title:
|
BIPOLAR JUNCTION TRANSISTOR STRUCTURE WITH IMPROVED CURRENT GAIN CHARACTERISTICS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/11/2005
|
Application #:
|
10170184
|
Filing Dt:
|
06/12/2002
|
Publication #:
|
|
Pub Dt:
|
12/18/2003
| | | | |
Title:
|
WAFER LEVEL MEMS PACKAGING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2004
|
Application #:
|
10171005
|
Filing Dt:
|
06/12/2002
|
Publication #:
|
|
Pub Dt:
|
12/18/2003
| | | | |
Title:
|
REDUCED POWER ANALOG-TO-DIGITAL CONVERTER AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2005
|
Application #:
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10174464
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Filing Dt:
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06/18/2002
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Publication #:
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Pub Dt:
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12/18/2003
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Title:
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MULTI-TIERED LITHOGRAPHIC TEMPLATE AND METHOD OF FORMATION AND USE
|
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Patent #:
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Issue Dt:
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06/03/2003
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Application #:
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10175637
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Filing Dt:
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06/20/2002
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Publication #:
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Pub Dt:
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10/17/2002
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Title:
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METHOD FOR FORMING A COPPER INTERCONNECT USING A MULTI-PLATEN CHEMICAL MECHANICAL POLISHING (CMP) PROCESS
|
|
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Patent #:
|
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Issue Dt:
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05/08/2007
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Application #:
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10178154
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Filing Dt:
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06/24/2002
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Publication #:
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Pub Dt:
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12/25/2003
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Title:
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METHOD AND APPARATUS FOR PURE DELAY ESTIMATION IN A COMMUNICATION SYSTEM
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|
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Patent #:
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Issue Dt:
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11/01/2005
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Application #:
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10178176
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Filing Dt:
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06/24/2002
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Publication #:
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Pub Dt:
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12/25/2003
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Title:
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METHOD AND APPARATUS FOR PERFORMING ADAPTIVE FILTERING
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|
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Patent #:
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Issue Dt:
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07/10/2007
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Application #:
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10178427
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Filing Dt:
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06/24/2002
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Publication #:
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Pub Dt:
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01/01/2004
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Title:
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MONITORING AND CONTROL OF AN ADAPTIVE FILTER IN A COMMUNICATION SYSTEM
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|
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Patent #:
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Issue Dt:
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06/17/2008
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Application #:
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10178560
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Filing Dt:
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06/24/2002
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Publication #:
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Pub Dt:
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12/25/2003
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Title:
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METHOD AND APPARATUS FOR TONE INDICATION
|
|
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Patent #:
|
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Issue Dt:
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03/21/2006
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Application #:
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10178597
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Filing Dt:
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06/24/2002
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Publication #:
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Pub Dt:
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12/25/2003
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Title:
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METHOD AND APPARATUS FOR NON-LINEAR PROCESSING OF AN AUDIO SIGNAL
|
|
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Patent #:
|
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Issue Dt:
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09/14/2004
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Application #:
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10178658
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Filing Dt:
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06/24/2002
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Publication #:
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Pub Dt:
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12/25/2003
| | | | |
Title:
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PROGRAM AND ERASE IN A THIN FILM STORAGE NON-VOLATILE MEMORY
|
|
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Patent #:
|
|
Issue Dt:
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05/17/2005
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Application #:
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10179769
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Filing Dt:
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06/25/2002
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Publication #:
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Pub Dt:
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12/25/2003
| | | | |
Title:
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ADVANCED RF ENHANCEMENT-MODE FETS WITH IMPROVED GATE PROPERTIES
|
|
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Patent #:
|
|
Issue Dt:
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06/15/2004
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Application #:
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10184857
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Filing Dt:
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06/28/2002
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Publication #:
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Pub Dt:
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01/01/2004
| | | | |
Title:
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BIAS CONTROL FOR HBT POWER AMPLIFIERS
|
|
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Patent #:
|
|
Issue Dt:
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09/16/2003
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Application #:
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10185224
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Filing Dt:
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06/28/2002
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Title:
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SENSE AMPLIFIER INCORPORATING A SYMMETRIC MIDPOINT REFERENCE
|
|
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Patent #:
|
|
Issue Dt:
|
06/17/2003
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Application #:
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10186363
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Filing Dt:
|
06/28/2002
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Title:
|
THREE INPUT SENSE AMPLIFIER AND METHOD OF OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2008
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Application #:
|
10192802
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Filing Dt:
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07/11/2002
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Publication #:
|
|
Pub Dt:
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01/15/2004
| | | | |
Title:
|
INTEGRATED VPN/FIREWALL SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2007
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Application #:
|
10194351
|
Filing Dt:
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07/12/2002
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Publication #:
|
|
Pub Dt:
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01/15/2004
| | | | |
Title:
|
REDUCED PEAK EMI BUS USING VARIABLE BIT RATE SPREADING
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
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Application #:
|
10194765
|
Filing Dt:
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07/12/2002
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Publication #:
|
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Pub Dt:
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01/15/2004
| | | | |
Title:
|
METHOD AND APPARATUS FOR SKEWING DATA WITH RESPECT TO COMMAND ON A DDR INTERFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2003
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Application #:
|
10196532
|
Filing Dt:
|
07/16/2002
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Title:
|
VARIABLE LENGTH DECODER
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2003
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Application #:
|
10197145
|
Filing Dt:
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07/16/2002
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Publication #:
|
|
Pub Dt:
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01/30/2003
| | | | |
Title:
|
BIPOLAR DIFFERENTIAL AMPLIFIER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/2005
|
Application #:
|
10197910
|
Filing Dt:
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07/19/2002
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Publication #:
|
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Pub Dt:
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01/22/2004
| | | | |
Title:
|
MEDIA ACCESS CONTROLLER HAVING PSEUDO-STATIC GUARANTEED TIME SLOTS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2004
|
Application #:
|
10202697
|
Filing Dt:
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07/25/2002
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Publication #:
|
|
Pub Dt:
|
01/29/2004
| | | | |
Title:
|
MULTI-BIT NON-VOLATILE MEMORY CELL AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2006
|
Application #:
|
10202747
|
Filing Dt:
|
07/25/2002
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Publication #:
|
|
Pub Dt:
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01/29/2004
| | | | |
Title:
|
METHOD AND APPARATUS FOR DEBUGGING A DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
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Application #:
|
10206164
|
Filing Dt:
|
07/26/2002
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Publication #:
|
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Pub Dt:
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01/29/2004
| | | | |
Title:
|
BROADBAND BALUN AND IMPEDANCE TRANSFORMER FOR PUSH-PULL AMPLIFIERS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2004
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Application #:
|
10206475
|
Filing Dt:
|
07/26/2002
|
Publication #:
|
|
Pub Dt:
|
01/29/2004
| | | | |
Title:
|
METHOD FOR FORMING A SEMICONDUCTOR DEVICE STRUCTURE IN A SEMICONDUCTOE LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
05/16/2006
|
Application #:
|
10207210
|
Filing Dt:
|
07/30/2002
|
Publication #:
|
|
Pub Dt:
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12/12/2002
| | | | |
Title:
|
SEMICONDUCTOR STRUCTURE EXHIBITING REDUCED LEAKAGE CURRENT AND METHOD OF FABRICATING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
10207298
|
Filing Dt:
|
07/29/2002
|
Publication #:
|
|
Pub Dt:
|
01/29/2004
| | | | |
Title:
|
ON CHIP NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2007
|
Application #:
|
10207459
|
Filing Dt:
|
07/29/2002
|
Publication #:
|
|
Pub Dt:
|
01/29/2004
| | | | |
Title:
|
ON CHIP NETWORK THAT MAXIMIZES INTERCONNECT UTILIZATION BETWEEN PROCESSING ELEMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2006
|
Application #:
|
10207469
|
Filing Dt:
|
07/29/2002
|
Publication #:
|
|
Pub Dt:
|
01/29/2004
| | | | |
Title:
|
SYMBOL TIMING TRACKING AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/2006
|
Application #:
|
10207588
|
Filing Dt:
|
07/29/2002
|
Publication #:
|
|
Pub Dt:
|
01/29/2004
| | | | |
Title:
|
ON CHIP NETWORK WITH INDEPENDENT LOGICAL AND PHYSICAL LAYERS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/23/2006
|
Application #:
|
10207600
|
Filing Dt:
|
07/29/2002
|
Publication #:
|
|
Pub Dt:
|
02/05/2004
| | | | |
Title:
|
SCALABLE ON CHIP NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2006
|
Application #:
|
10207609
|
Filing Dt:
|
07/29/2002
|
Publication #:
|
|
Pub Dt:
|
01/29/2004
| | | | |
Title:
|
ON CHIP NETWORK WITH MEMORY DEVICE ADDRESS DECODING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2006
|
Application #:
|
10208330
|
Filing Dt:
|
07/30/2002
|
Publication #:
|
|
Pub Dt:
|
02/05/2004
| | | | |
Title:
|
SIMPLIFICATION OF BALL ATTACH METHOD USING SUPER-SATURATED FINE CRYSTAL FLUX
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2006
|
Application #:
|
10208867
|
Filing Dt:
|
07/31/2002
|
Publication #:
|
|
Pub Dt:
|
02/05/2004
| | | | |
Title:
|
METHOD OF MAKING A MOUNT FOR ELECTRONIC DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/2006
|
Application #:
|
10209167
|
Filing Dt:
|
07/31/2002
|
Publication #:
|
|
Pub Dt:
|
02/05/2004
| | | | |
Title:
|
LITHOGRAPHIC TEMPLATE HAVING A REPAIRED GAP DEFECT METHOD OF REPAIR AND USE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2005
|
Application #:
|
10209523
|
Filing Dt:
|
07/31/2002
|
Publication #:
|
|
Pub Dt:
|
02/05/2004
| | | | |
Title:
|
CAPPED DUAL METAL GATE TRANSISTORS FOR CMOS PROCESS AND METHOD FOR MAKING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/25/2006
|
Application #:
|
10209745
|
Filing Dt:
|
07/31/2002
|
Publication #:
|
|
Pub Dt:
|
02/05/2004
| | | | |
Title:
|
TEST SYSTEM FOR DEVICE AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2007
|
Application #:
|
10209746
|
Filing Dt:
|
07/31/2002
|
Publication #:
|
|
Pub Dt:
|
02/05/2004
| | | | |
Title:
|
FIELD PLATE TRANSISTOR WITH REDUCED FIELD PLATE RESISTANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2005
|
Application #:
|
10209816
|
Filing Dt:
|
07/31/2002
|
Publication #:
|
|
Pub Dt:
|
02/05/2004
| | | | |
Title:
|
FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2004
|
Application #:
|
10210315
|
Filing Dt:
|
08/01/2002
|
Publication #:
|
|
Pub Dt:
|
02/05/2004
| | | | |
Title:
|
LOW TEMPERATURE PLASMA SI OR SIGE FOR MEMS APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2003
|
Application #:
|
10211631
|
Filing Dt:
|
08/02/2002
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
Title:
|
CONDUCTIVE PASTE AND SEMICONDUCTOR COMPONENT HAVING CONDUCTIVE BUMPS MADE FROM THE CONDUCTIVE PASTE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2006
|
Application #:
|
10211795
|
Filing Dt:
|
08/02/2002
|
Publication #:
|
|
Pub Dt:
|
02/20/2003
| | | | |
Title:
|
DRIVER CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2003
|
Application #:
|
10211825
|
Filing Dt:
|
08/02/2002
|
Title:
|
HYBRID STRUCTURE FOR DISTRIBUTED POWER AMPLIFIERS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/2005
|
Application #:
|
10211842
|
Filing Dt:
|
08/02/2002
|
Publication #:
|
|
Pub Dt:
|
12/19/2002
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
|
|