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10/15/2002
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07/09/1999
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04/22/2003
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07/09/1999
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09/17/2002
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07/16/1999
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08/07/2001
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07/16/1999
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01/27/2004
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07/28/1999
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03/20/2001
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07/31/1999
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04/24/2001
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08/09/1999
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09/10/2002
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08/17/1999
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10/29/2002
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08/17/1999
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05/25/2004
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08/17/1999
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08/01/2000
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08/27/1999
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02/25/2003
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09/03/1999
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08/01/2000
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09/03/1999
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10/15/2002
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09/07/1999
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12/12/2000
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09/08/1999
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08/20/2002
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09/20/1999
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12/11/2001
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09/22/1999
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02/25/2003
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09/22/1999
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08/15/2002
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12/26/2000
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09/24/1999
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01/21/2003
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09/24/1999
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06/12/2001
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09/28/1999
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08/13/2002
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10/01/1999
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02/06/2001
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10/05/1999
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09/18/2001
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10/19/1999
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08/07/2001
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10/19/1999
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09/18/2001
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10/26/1999
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06/05/2001
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10/27/1999
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11/05/2002
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11/08/1999
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03/04/2003
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11/15/1999
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07/22/2003
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11/19/1999
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05/20/2003
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12/06/1999
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04/23/2002
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12/09/1999
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06/14/2001
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05/27/2003
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12/17/1999
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12/23/2003
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12/14/1999
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01/13/2004
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12/14/1999
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04/01/2003
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12/16/1999
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10/01/2002
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12/16/1999
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01/21/2003
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12/16/1999
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10/14/2003
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12/23/1999
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06/24/2003
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12/27/1999
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07/29/2003
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12/30/1999
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08/10/2004
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12/13/2001
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04/02/2002
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09/17/2002
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03/13/2001
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01/26/2000
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07/31/2001
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02/18/2000
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09/09/2003
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02/18/2000
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07/31/2001
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02/18/2000
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05/06/2003
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02/18/2000
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04/24/2001
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02/18/2000
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02/05/2002
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03/09/2000
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06/18/2002
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03/10/2000
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09/04/2001
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03/13/2000
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10/23/2001
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03/16/2000
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10/28/2003
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03/16/2000
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07/16/2002
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08/21/2001
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03/20/2000
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09/18/2001
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03/28/2000
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04/17/2001
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03/29/2000
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02/27/2007
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03/19/2002
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09/18/2001
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12/26/2000
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04/13/2000
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05/11/2004
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06/19/2001
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04/08/2003
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06/19/2001
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04/17/2000
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02/10/2004
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03/06/2007
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Issue Dt:
|
06/12/2001
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Application #:
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09562490
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Filing Dt:
|
05/01/2000
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Title:
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Integrated memory circuit having a flash memory array and at least one sram memory array with internal address and data bus for transfer of signals therebetween
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Patent #:
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|
Issue Dt:
|
03/04/2003
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Application #:
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09564105
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Filing Dt:
|
05/03/2000
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|
Title:
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INTELLIGENT EXPANSION ROM SHARING BUS SUBSYSTEM
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|
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Patent #:
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|
Issue Dt:
|
06/04/2002
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Application #:
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09564324
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Filing Dt:
|
05/03/2000
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|
Title:
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Electronically-eraseable programmable read-only memory having reduced-page-size program and erase
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Patent #:
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Issue Dt:
|
05/08/2001
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Application #:
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09574387
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Filing Dt:
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05/19/2000
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|
Title:
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Voltage regulating circuit with a clamp up circuit and a clamp down circuit operating in tandem
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Patent #:
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|
Issue Dt:
|
07/30/2002
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Application #:
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09576394
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Filing Dt:
|
05/22/2000
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Title:
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FLASH MEMORY CELL WITH CONTACTLESS BIT LINE, AND PROCESS OF FABRICATION
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Patent #:
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Issue Dt:
|
09/19/2006
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Application #:
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09580532
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Filing Dt:
|
05/26/2000
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|
Title:
|
METHOD AND APPARATUS FOR MANAGING DATA TRAFFIC BETWEEN A HIGH CAPACITY SOURCE AND MULTIPLE DESTINATIONS
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Patent #:
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Issue Dt:
|
02/17/2004
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Application #:
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09586524
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Filing Dt:
|
06/02/2000
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|
Title:
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REED-SOLOMON ENCODER AND DECODER
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Patent #:
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Issue Dt:
|
09/18/2001
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Application #:
|
09586660
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Filing Dt:
|
06/01/2000
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|
Title:
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Method for depositing a selected thickness of an interlevel dielectric material to achieve optimum global planarity on a
semiconductor wafer
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Patent #:
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|
Issue Dt:
|
08/19/2003
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Application #:
|
09587538
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Filing Dt:
|
06/01/2000
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|
Title:
|
TWO-DIMENSIONAL EXECUTION QUEUE FOR HOST ADAPTERS
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Patent #:
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Issue Dt:
|
10/14/2003
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Application #:
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09593264
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Filing Dt:
|
06/13/2000
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|
Title:
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PULSE CODE SEQUENCE ANALYZER
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Patent #:
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|
Issue Dt:
|
10/16/2001
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Application #:
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09593934
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Filing Dt:
|
06/15/2000
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Title:
|
DC power converter having bipolar output and BI-Directional reactive current transfer
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|
|
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|
Patent #:
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|
Issue Dt:
|
02/03/2004
|
Application #:
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09602291
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Filing Dt:
|
06/23/2000
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|
Title:
|
METHOD, SYSTEM AND APPARATUS FOR CALIBRATING A PULSE POSITION MODULATION (PPM) DECODER TO A PPM SIGNAL
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|
|
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Patent #:
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Issue Dt:
|
07/31/2001
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Application #:
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09603245
|
Filing Dt:
|
06/23/2000
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|
Title:
|
Dual bit error rate estimation in a qam demodulator
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|
|
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Patent #:
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|
Issue Dt:
|
05/11/2004
|
Application #:
|
09603801
|
Filing Dt:
|
06/26/2000
|
|
Title:
|
WIRELESS TRANSCEIVER WITH SUBTRACTIVE FILTER COMPENSATING BOTH TRANSMIT AND RECEIVE ARTIFACTS
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|
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|
Patent #:
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|
Issue Dt:
|
01/29/2002
|
Application #:
|
09604119
|
Filing Dt:
|
06/26/2000
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|
Title:
|
Digital trimming of analog components using non-volatile memory
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|
|
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|
Patent #:
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|
Issue Dt:
|
07/23/2002
|
Application #:
|
09604120
|
Filing Dt:
|
06/26/2000
|
|
Title:
|
DIGITAL TRIMMING OF OP AMP OFFSET VOLTAGE AND QUIESCENT CURRENT USING NON-VOLATILE MEMORY
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|
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|
Patent #:
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|
Issue Dt:
|
01/28/2003
|
Application #:
|
09604203
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Filing Dt:
|
06/27/2000
|
|
Title:
|
SYSTEM AND METHOD FOR DETECTING OF UNCHANGED PARITY DATA
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|
|
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|
Patent #:
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|
Issue Dt:
|
07/23/2002
|
Application #:
|
09604347
|
Filing Dt:
|
06/27/2000
|
|
Title:
|
SYSTEM AND METHOD FOR ZEROING DATA STORAGE BLOCKS IN A RAID STORAGE IMPLEMENTATION
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|
Patent #:
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|
Issue Dt:
|
12/31/2002
|
Application #:
|
09604348
|
Filing Dt:
|
06/27/2000
|
|
Title:
|
SYSTEM AND METHOD FOR DETECTION OF DISK STORAGE BLOCKS CONTAINING UNIQUE VALUES
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|
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|
Patent #:
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|
Issue Dt:
|
12/30/2003
|
Application #:
|
09608294
|
Filing Dt:
|
06/30/2000
|
|
Title:
|
BUS INTERFACE FOR CELL AND/OR PACKET DATA TRANSFER
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|
Patent #:
|
|
Issue Dt:
|
10/29/2002
|
Application #:
|
09608805
|
Filing Dt:
|
06/30/2000
|
|
Title:
|
BINARY COUNTER AND METHOD FOR COUNTING TO EXTEND LIFETIME OF STORAGE CELLS
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|
Patent #:
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|
Issue Dt:
|
07/27/2004
|
Application #:
|
09613174
|
Filing Dt:
|
07/10/2000
|
|
Title:
|
METHODS FOR ASSOCIATING END NODES ON A FABRIC
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|
|
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|
Patent #:
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|
Issue Dt:
|
11/13/2001
|
Application #:
|
09617201
|
Filing Dt:
|
07/14/2000
|
|
Title:
|
Low charge-injection charge pump
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|
|
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|
Patent #:
|
|
Issue Dt:
|
05/22/2001
|
Application #:
|
09617280
|
Filing Dt:
|
07/17/2000
|
|
Title:
|
Improved programming method for a memory cell
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|
|
|
|
Patent #:
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|
Issue Dt:
|
04/24/2001
|
Application #:
|
09617281
|
Filing Dt:
|
07/17/2000
|
|
Title:
|
Method for minimizing program disturb in a memory cell
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|
|
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|
Patent #:
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|
Issue Dt:
|
05/20/2003
|
Application #:
|
09621964
|
Filing Dt:
|
07/21/2000
|
|
Title:
|
SWITCHED CAPACITOR TRANSMITTER PRE-DRIVER
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|
|
|
|
Patent #:
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|
Issue Dt:
|
12/18/2001
|
Application #:
|
09627351
|
Filing Dt:
|
07/28/2000
|
|
Title:
|
Secure programmable logic device
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2002
|
Application #:
|
09627917
|
Filing Dt:
|
07/28/2000
|
|
Title:
|
TESTING OF MULTILEVEL SEMICONDUCTOR MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/2005
|
Application #:
|
09627927
|
Filing Dt:
|
07/28/2000
|
|
Title:
|
CRYPTOGRAPHY PRIVATE KEY STORAGE AND RECOVERY METHOD AND APPARATUS
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|
