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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:054633/0001   Pages: 1245
Recorded: 11/02/2020
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 8468
Page 2 of 85
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85
1
Patent #:
6545370
Issue Dt:
04/08/2003
Application #:
09679375
Filing Dt:
10/05/2000
Title:
COMPOSITE SILICON NITRIDE SIDEWALL SPACERS FOR REDUCED NICKEL SILICIDE BRIDGING
2
Patent #:
6436823
Issue Dt:
08/20/2002
Application #:
09679738
Filing Dt:
10/05/2000
Title:
METHOD FOR FORMING A TIN LAYER ON TOP OF A METAL SILICIDE LAYER IN A SEMICONDUCTOR STRUCTURE AND STRUCTURE FORMED
3
Patent #:
6300203
Issue Dt:
10/09/2001
Application #:
09679872
Filing Dt:
10/05/2000
Title:
Electrolytic deposition of dielectric precursor materials for use in in-laid gate MOS transistors
4
Patent #:
6521529
Issue Dt:
02/18/2003
Application #:
09679880
Filing Dt:
10/05/2000
Title:
HDP TREATMENT FOR REDUCED NICKEL SILICIDE BRIDGING
5
Patent #:
6587530
Issue Dt:
07/01/2003
Application #:
09680819
Filing Dt:
10/05/2000
Title:
METHOD AND APPARATUS FOR SIGNAL INTEGRITY VERIFICATION
6
Patent #:
6545333
Issue Dt:
04/08/2003
Application #:
09681541
Filing Dt:
04/25/2001
Title:
LIGHT CONTROLLED SILICON ON INSULATOR DEVICE
7
Patent #:
6441462
Issue Dt:
08/27/2002
Application #:
09682016
Filing Dt:
07/10/2001
Title:
SELF-ALIGNED SIGE NPN WITH IMPROVED ESD ROBUSTNESS USING WIDE EMITTER POLYSILICON EXTENSION
8
Patent #:
6651229
Issue Dt:
11/18/2003
Application #:
09682707
Filing Dt:
10/09/2001
Publication #:
US20030070150
Pub Dt:
04/10/2003
Title:
GENERATION OF REFINED SWITCHING WINDOWS IN STATIC TIMING ANALYSIS
9
Patent #:
6469350
Issue Dt:
10/22/2002
Application #:
09682868
Filing Dt:
10/26/2001
Title:
ACTIVE WELL SCHEMES FOR SOI TECHNOLOGY
10
Patent #:
6834360
Issue Dt:
12/21/2004
Application #:
09683091
Filing Dt:
11/16/2001
Publication #:
US20030097615
Pub Dt:
05/22/2003
Title:
ON-CHIP LOGIC ANALYZER
11
Patent #:
6433609
Issue Dt:
08/13/2002
Application #:
09683105
Filing Dt:
11/19/2001
Title:
DOUBLE-GATE LOW POWER SOI ACTIVE CLAMP NETWORK FOR SINGLE POWER SUPPLY AND MULTIPLE POWER SUPPLY APPLICATIONS
12
Patent #:
6700163
Issue Dt:
03/02/2004
Application #:
09683278
Filing Dt:
12/07/2001
Publication #:
US20030107091
Pub Dt:
06/12/2003
Title:
SELECTIVE SILICIDE BLOCKING
13
Patent #:
6800905
Issue Dt:
10/05/2004
Application #:
09683328
Filing Dt:
12/14/2001
Publication #:
US20030113970
Pub Dt:
06/19/2003
Title:
IMPLANTED ASYMMETRIC DOPED POLYSILICON GATE FINFET
14
Patent #:
6774437
Issue Dt:
08/10/2004
Application #:
09683486
Filing Dt:
01/07/2002
Publication #:
US20030127690
Pub Dt:
07/10/2003
Title:
FIN-BASED DOUBLE POLY DYNAMIC THRESHOLD CMOS FET WITH SPACER GATE AND METHOD OF FABRICATION
15
Patent #:
6670654
Issue Dt:
12/30/2003
Application #:
09683498
Filing Dt:
01/09/2002
Publication #:
US20030129802
Pub Dt:
07/10/2003
Title:
SILICON GERMANIUM HETEROJUNCTION BIPOLAR TRANSISTOR WITH CARBON INCORPORATION
16
Patent #:
6583469
Issue Dt:
06/24/2003
Application #:
09683626
Filing Dt:
01/28/2002
Title:
SELF-ALIGNED DOG-BONE STRUCTURE FOR FINFET APPLICATIONS AND METHODS TO FABRICATE THE SAME
17
Patent #:
6624478
Issue Dt:
09/23/2003
Application #:
09683656
Filing Dt:
01/30/2002
Publication #:
US20030141548
Pub Dt:
07/31/2003
Title:
HIGH MOBILITY TRANSISTORS IN SOI AND METHOD FOR FORMING
18
Patent #:
7353156
Issue Dt:
04/01/2008
Application #:
09683677
Filing Dt:
02/01/2002
Publication #:
US20030149946
Pub Dt:
08/07/2003
Title:
METHOD OF SWITCHING EXTERNAL MODELS IN AN AUTOMATED SYSTEM-ON-CHIP INTEGRATED CIRCUIT DESIGN VERIFICATION SYSTEM
19
Patent #:
6518614
Issue Dt:
02/11/2003
Application #:
09683809
Filing Dt:
02/19/2002
Title:
EMBEDDED ONE-TIME PROGRAMMABLE NON-VOLATILE MEMORY USING PROMPT SHIFT DEVICE
20
Patent #:
6724029
Issue Dt:
04/20/2004
Application #:
09683831
Filing Dt:
02/21/2002
Publication #:
US20030155599
Pub Dt:
08/21/2003
Title:
TWIN-CELL FLASH MEMORY STRUCTURE AND METHOD
21
Patent #:
6744079
Issue Dt:
06/01/2004
Application #:
09683983
Filing Dt:
03/08/2002
Publication #:
US20030170960
Pub Dt:
09/11/2003
Title:
OPTIMIZED BLOCKING IMPURITY PLACEMENT FOR SIGE HBTS
22
Patent #:
6586818
Issue Dt:
07/01/2003
Application #:
09683986
Filing Dt:
03/08/2002
Title:
SELF-ALIGNED SILICON GERMANIUM HETEROJUNCTION BIPOLAR TRANSISTOR DEVICE WITH ELECTROSTATIC DISCHARGE CREVICE COVER FOR SALICIDE DISPLACEMENT
23
Patent #:
6784516
Issue Dt:
08/31/2004
Application #:
09684463
Filing Dt:
10/06/2000
Title:
INSULATIVE CAP FOR LASER FUSING
24
Patent #:
6624651
Issue Dt:
09/23/2003
Application #:
09684849
Filing Dt:
10/06/2000
Title:
KERF CIRCUIT FOR MODELING OF BEOL CAPACITANCES
25
Patent #:
6570568
Issue Dt:
05/27/2003
Application #:
09686720
Filing Dt:
10/10/2000
Title:
SYSTEM AND METHOD FOR THE COORDINATED SIMPLIFICATION OF SURFACE AND WIRE-FRAME DESCRIPTIONS OF A GEOMETRIC MODEL
26
Patent #:
6700203
Issue Dt:
03/02/2004
Application #:
09686742
Filing Dt:
10/11/2000
Title:
SEMICONDUCTOR STRUCTURE HAVING IN-SITU FORMED UNIT RESISTORS AND METHOD FOR FABRICATION
27
Patent #:
6350653
Issue Dt:
02/26/2002
Application #:
09689096
Filing Dt:
10/12/2000
Title:
Embedded dram on silicon-on-insulator substrate
28
Patent #:
6312998
Issue Dt:
11/06/2001
Application #:
09690073
Filing Dt:
10/16/2000
Title:
Field effect transistor with spacers that are removable with preservation of the gate dielectric
29
Patent #:
6554951
Issue Dt:
04/29/2003
Application #:
09690704
Filing Dt:
10/16/2000
Title:
CHEMICAL-MECHANICAL POLISHING PAD CONDITIONING SYSTEM AND METHOD
30
Patent #:
6528362
Issue Dt:
03/04/2003
Application #:
09691181
Filing Dt:
10/19/2000
Title:
METAL GATE WITH CVD AMORPHOUS SILICON LAYER FOR CMOS DEVICES AND METHOD OF MAKING WITH A REPLACEMENT GATE PROCESS
31
Patent #:
6392280
Issue Dt:
05/21/2002
Application #:
09691224
Filing Dt:
10/19/2000
Title:
METAL GATE WITH PVD AMORPHOUS SILICON LAYER FOR CMOS DEVICES AND METHOD OF MAKING WITH A REPLACEMENT GATE PROCESS
32
Patent #:
6589866
Issue Dt:
07/08/2003
Application #:
09691226
Filing Dt:
10/19/2000
Title:
METAL GATE WITH PVD AMORPHOUS SILICON LAYER HAVING IMPLANTED DOPANTS FOR CMOS DEVICES AND METHOD OF MAKING WITH A REPLACEMENT GATE PROCESS
33
Patent #:
6642590
Issue Dt:
11/04/2003
Application #:
09691227
Filing Dt:
10/19/2000
Title:
METAL GATE WITH PVD AMORPHOUS SILICON LAYER AND BARRIER LAYER FOR CMOS DEVICES AND METHOD OF MAKING WITH A REPLACEMENT GATE PROCESS
34
Patent #:
6297107
Issue Dt:
10/02/2001
Application #:
09691228
Filing Dt:
10/19/2000
Title:
High dielectric constant materials as gate dielectrics
35
Patent #:
7163864
Issue Dt:
01/16/2007
Application #:
09691353
Filing Dt:
10/18/2000
Title:
METHOD OF FABRICATING SEMICONDUCTOR SIDE WALL FIN
36
Patent #:
6735664
Issue Dt:
05/11/2004
Application #:
09691377
Filing Dt:
10/18/2000
Title:
INDIRECT ADDRESSING METHOD AND DEVICE INCORPORATING THE SAME
37
Patent #:
6504204
Issue Dt:
01/07/2003
Application #:
09693047
Filing Dt:
10/21/2000
Title:
COMPACT DUAL-PORT DRAM ARCHITECTURE SYSTEM AND METHOD FOR MAKING SAME
38
Patent #:
6620639
Issue Dt:
09/16/2003
Application #:
09693292
Filing Dt:
10/19/2000
Title:
APPARATUS TO EVALUATE HOT CARRIER INJECTION PERFORMANCE DEGRADATION AND METHOD THEREFOR
39
Patent #:
6304999
Issue Dt:
10/16/2001
Application #:
09694139
Filing Dt:
10/23/2000
Title:
Method and apparatus for embedded process control framework in tool systems
40
Patent #:
6333253
Issue Dt:
12/25/2001
Application #:
09696049
Filing Dt:
10/26/2000
Title:
Pattern-block flux deposition
41
Patent #:
6442093
Issue Dt:
08/27/2002
Application #:
09696054
Filing Dt:
10/25/2000
Title:
CASCODE BARREL READ
42
Patent #:
6452240
Issue Dt:
09/17/2002
Application #:
09699651
Filing Dt:
10/30/2000
Title:
INCREASED DAMPING OF MAGNETIZATION IN MAGNETIC MATERIALS
43
Patent #:
6612028
Issue Dt:
09/02/2003
Application #:
09699977
Filing Dt:
10/30/2000
Title:
A METHOD FOR MANUFACTURING A BUILT-UP CIRCUIT BOARD
44
Patent #:
6498056
Issue Dt:
12/24/2002
Application #:
09702406
Filing Dt:
10/31/2000
Title:
APPARATUS AND METHOD FOR ANTIFUSE WITH ELECTROSTATIC ASSIST
45
Patent #:
6600224
Issue Dt:
07/29/2003
Application #:
09703062
Filing Dt:
10/31/2000
Title:
THIN FILM ATTACHMENT TO LAMINATE USING A DENDRITIC INTERCONNECTION
46
Patent #:
6380038
Issue Dt:
04/30/2002
Application #:
09703512
Filing Dt:
10/30/2000
Title:
TRANSISTOR WITH ELECTRICALLY INDUCED SOURCE/DRAIN EXTENSIONS
47
Patent #:
6417566
Issue Dt:
07/09/2002
Application #:
09705121
Filing Dt:
11/01/2000
Title:
VOID ELIMINATING SEED LAYER AND CONDUCTOR CORE INTEGRATED CIRCUIT INTERCONNECTS
48
Patent #:
6261894
Issue Dt:
07/17/2001
Application #:
09706492
Filing Dt:
11/03/2000
Title:
Method for forming dual workfunction high-performance support mosfets in EDRAM arrays
49
Patent #:
6544885
Issue Dt:
04/08/2003
Application #:
09706498
Filing Dt:
11/03/2000
Title:
POLISHED HARD MASK PROCESS FOR CONDUCTOR LAYER PATTERNING
50
Patent #:
6593210
Issue Dt:
07/15/2003
Application #:
09707214
Filing Dt:
11/06/2000
Title:
SELF-ALIGNED/MASKLESS REVERSE ETCH PROCESS USING AN INORGANIC FILM
51
Patent #:
6274289
Issue Dt:
08/14/2001
Application #:
09708104
Filing Dt:
11/03/2000
Title:
Chemical resist thickness reduction process
52
Patent #:
6549450
Issue Dt:
04/15/2003
Application #:
09708142
Filing Dt:
11/08/2000
Title:
METHOD AND SYSTEM FOR IMPROVING THE PERFORMANCE ON SOI MEMORY ARRAYS IN AN SRAM ARCHITECTURE SYSTEM
53
Patent #:
6985988
Issue Dt:
01/10/2006
Application #:
09708494
Filing Dt:
11/09/2000
Title:
SYSTEM-ON-A-CHIP STRUCTURE HAVING A MULTIPLE CHANNEL BUS BRIDGE
54
Patent #:
6396108
Issue Dt:
05/28/2002
Application #:
09711328
Filing Dt:
11/13/2000
Title:
Self-aligned double gate silicon-on-insulator (SOI) device
55
Patent #:
6429052
Issue Dt:
08/06/2002
Application #:
09711401
Filing Dt:
11/13/2000
Title:
METHOD OF MAKING HIGH PERFORMANCE TRANSISTOR WITH A REDUCED WIDTH GATE ELECTRODE AND DEVICE COMPRISING SAME
56
Patent #:
6479866
Issue Dt:
11/12/2002
Application #:
09712320
Filing Dt:
11/14/2000
Title:
SOI DEVICE WITH SELF-ALIGNED SELECTIVE DAMAGE IMPLANT, AND METHOD
57
Patent #:
6730984
Issue Dt:
05/04/2004
Application #:
09712391
Filing Dt:
11/14/2000
Title:
INCREASING AN ELECTRICAL RESISTANCE OF A RESISTOR BY OXIDATION OR NITRIDIZATION
58
Patent #:
6553390
Issue Dt:
04/22/2003
Application #:
09712646
Filing Dt:
11/14/2000
Title:
METHOD AND APPARATUS FOR SIMULTANEOUS ONLINE ACCESS OF VOLUME-MANAGED DATA STORAGE
59
Patent #:
6376320
Issue Dt:
04/23/2002
Application #:
09712995
Filing Dt:
11/15/2000
Title:
METHOD FOR FORMING FIELD EFFECT TRANSISTOR WITH SILICIDES OF DIFFERENT THICKNESS AND OF DIFFERENT MATERIALS FOR THE SOURCE/DRAIN AND THE GATE
60
Patent #:
6548395
Issue Dt:
04/15/2003
Application #:
09713313
Filing Dt:
11/16/2000
Title:
METHOD OF PROMOTING VOID FREE COPPER INTERCONNECTS
61
Patent #:
6891235
Issue Dt:
05/10/2005
Application #:
09713830
Filing Dt:
11/15/2000
Title:
FET WITH T-SHAPED GATE
62
Patent #:
6988241
Issue Dt:
01/17/2006
Application #:
09714024
Filing Dt:
11/15/2000
Title:
CLIENT SIDE, WEB-BASED SPREADSHEET
63
Patent #:
6816385
Issue Dt:
11/09/2004
Application #:
09714373
Filing Dt:
11/16/2000
Title:
COMPLIANT LAMINATE CONNECTOR
64
Patent #:
6358856
Issue Dt:
03/19/2002
Application #:
09716215
Filing Dt:
11/21/2000
Title:
Bright field image reversal for contact hole patterning
65
Patent #:
6396107
Issue Dt:
05/28/2002
Application #:
09716749
Filing Dt:
11/20/2000
Title:
TRENCH-DEFINED SILICON GERMANIUM ESD DIODE NETWORK
66
Patent #:
6799291
Issue Dt:
09/28/2004
Application #:
09716915
Filing Dt:
11/20/2000
Title:
METHOD AND SYSTEM FOR DETECTING A HARD FAILURE IN A MEMORY ARRAY
67
Patent #:
6785837
Issue Dt:
08/31/2004
Application #:
09716916
Filing Dt:
11/20/2000
Title:
FAULT TOLERANT MEMORY SYSTEM UTILIZING MEMORY ARRAYS WITH HARD ERROR DETECTION
68
Patent #:
6790722
Issue Dt:
09/14/2004
Application #:
09718850
Filing Dt:
11/22/2000
Title:
LOGIC SOI STRUCTURE, PROCESS AND APPLICATION FOR VERTICAL BIPOLAR TRANSISTOR
69
Patent #:
6452234
Issue Dt:
09/17/2002
Application #:
09722222
Filing Dt:
11/27/2000
Title:
HOW TO IMPROVE THE ESD ON SOI DEVICES
70
Patent #:
6539520
Issue Dt:
03/25/2003
Application #:
09724134
Filing Dt:
11/28/2000
Title:
SYSTEMS AND METHODS FOR GENERATING HARDWARE DESCRIPTION CODE
71
Patent #:
6485614
Issue Dt:
11/26/2002
Application #:
09727572
Filing Dt:
11/30/2000
Publication #:
US20020063055
Pub Dt:
05/30/2002
Title:
METHOD TO STABILIZE A CARBON ALIGNMENT LAYER FOR LIQUID CRYSTAL DISPLAYS
72
Patent #:
6291348
Issue Dt:
09/18/2001
Application #:
09728315
Filing Dt:
11/30/2000
Title:
Method of forming Cu-Ca-O thin films on Cu surfaces in a chemical solution and semiconductor device thereby formed
73
Patent #:
6605513
Issue Dt:
08/12/2003
Application #:
09729699
Filing Dt:
12/06/2000
Publication #:
US20020068408
Pub Dt:
06/06/2002
Title:
METHOD OF FORMING NICKEL SILICIDE USING A ONE-STEP RAPID THERMAL ANNEAL PROCESS AND BACKEND PROCESSING
74
Patent #:
6430073
Issue Dt:
08/06/2002
Application #:
09730673
Filing Dt:
12/06/2000
Publication #:
US20020067632
Pub Dt:
06/06/2002
Title:
DRAM CAM CELL WITH HIDDEN REFRESH
75
Patent #:
6500755
Issue Dt:
12/31/2002
Application #:
09731577
Filing Dt:
12/06/2000
Publication #:
US20020068436
Pub Dt:
06/06/2002
Title:
RESIST TRIM PROCESS TO DEFINE SMALL OPENINGS IN DIELECTRIC LAYERS
76
Patent #:
6403876
Issue Dt:
06/11/2002
Application #:
09731616
Filing Dt:
12/07/2000
Title:
ENHANCED INTERFACE THERMOELECTRIC COOLERS WITH ALL-METAL TIPS
77
Patent #:
6602759
Issue Dt:
08/05/2003
Application #:
09731620
Filing Dt:
12/07/2000
Publication #:
US20020072196
Pub Dt:
06/13/2002
Title:
SHALLOW TRENCH ISOLATION FOR THIN SILICON/SILICON-ON-INSULATOR SUBSTRATES BY UTILIZING POLYSILICON
78
Patent #:
6384312
Issue Dt:
05/07/2002
Application #:
09731997
Filing Dt:
12/07/2000
Title:
THERMOELECTRIC COOLERS WITH ENHANCED STRUCTURED INTERFACES
79
Patent #:
6387786
Issue Dt:
05/14/2002
Application #:
09733778
Filing Dt:
12/08/2000
Title:
METHOD OF SALICIDE FORMATION BY SILICIDING A GATE AREA PRIOR TO SLILICIDING A SOURCE AND DRAIN AREA
80
Patent #:
6368950
Issue Dt:
04/09/2002
Application #:
09734186
Filing Dt:
12/12/2000
Title:
SILICIDE GATE TRANSISTORS
81
Patent #:
6602781
Issue Dt:
08/05/2003
Application #:
09734207
Filing Dt:
12/12/2000
Title:
METAL SILICIDE GATE TRANSISTORS
82
Patent #:
6790125
Issue Dt:
09/14/2004
Application #:
09734225
Filing Dt:
12/11/2000
Publication #:
US20020072308
Pub Dt:
06/13/2002
Title:
BACKSIDE INTEGRATED CIRCUIT DIE SURFACE FINISHING TECHNIQUE AND TOOL
83
Patent #:
6627052
Issue Dt:
09/30/2003
Application #:
09734830
Filing Dt:
12/12/2000
Publication #:
US20020108862
Pub Dt:
08/15/2002
Title:
ELECTROPLATING APPARATUS WITH VERTICAL ELECTRICAL CONTACT
84
Patent #:
6417070
Issue Dt:
07/09/2002
Application #:
09735988
Filing Dt:
12/13/2000
Publication #:
US20020106906
Pub Dt:
08/08/2002
Title:
METHOD FOR FORMING A LINER IN A TRENCH
85
Patent #:
6350692
Issue Dt:
02/26/2002
Application #:
09737198
Filing Dt:
12/14/2000
Title:
Increased polish removal rate of dielectric layers using fixed abrasive pads
86
Patent #:
6451712
Issue Dt:
09/17/2002
Application #:
09739935
Filing Dt:
12/18/2000
Publication #:
US20020074659
Pub Dt:
06/20/2002
Title:
METHOD FOR FORMING A POROUS DIELECTRIC MATERIAL LAYER IN A SEMICONDUCTOR DEVICE AND DEVICE FORMED
87
Patent #:
6503641
Issue Dt:
01/07/2003
Application #:
09740089
Filing Dt:
12/18/2000
Publication #:
US20020076574
Pub Dt:
06/20/2002
Title:
INTERCONNECTS WITH TI-CONTAINING LINERS
88
Patent #:
6680514
Issue Dt:
01/20/2004
Application #:
09745047
Filing Dt:
12/20/2000
Title:
CONTACT CAPPING LOCAL INTERCONNECT
89
Patent #:
6647766
Issue Dt:
11/18/2003
Application #:
09745273
Filing Dt:
12/20/2000
Publication #:
US20010038598
Pub Dt:
11/08/2001
Title:
DEVICE FOR CONTACTING AND/OR MODIFYING A SURFACE HAVING A CANTILEVER AND A METHOD FOR PRODUCTION OF SAID CANTILEVER
90
Patent #:
6440811
Issue Dt:
08/27/2002
Application #:
09745361
Filing Dt:
12/21/2000
Title:
METHOD OF FABRICATING A POLY-POLY CAPACITOR WITH A SIGE BICMOS INTEGRATION SCHEME
91
Patent #:
6552569
Issue Dt:
04/22/2003
Application #:
09745951
Filing Dt:
12/22/2000
Publication #:
US20020079922
Pub Dt:
06/27/2002
Title:
DUAL PURPOSE LOW POWER INPUT CIRCUIT FOR A MEMORY DEVICE INTERFACE
92
Patent #:
6825534
Issue Dt:
11/30/2004
Application #:
09748256
Filing Dt:
12/27/2000
Title:
SEMICONDUCTOR DEVICE ON A COMBINATION BULK SILICON AND SILICON-ON-INSULATOR (SOI) SUBSTRATE
93
Patent #:
6561845
Issue Dt:
05/13/2003
Application #:
09749162
Filing Dt:
12/27/2000
Publication #:
US20020081895
Pub Dt:
06/27/2002
Title:
DISTRIBUTED CONNECTOR SYSTEM FOR WEARABLE COMPUTERS
94
Patent #:
6571371
Issue Dt:
05/27/2003
Application #:
09749293
Filing Dt:
12/27/2000
Title:
METHOD AND APPARATUS FOR USING LATENCY TIME AS A RUN-TO RUN CONTROL PARAMETER
95
Patent #:
6687883
Issue Dt:
02/03/2004
Application #:
09750969
Filing Dt:
12/28/2000
Publication #:
US20020116440
Pub Dt:
08/22/2002
Title:
SYSTEM AND METHOD FOR INSERTING LEAKAGE REDUCTION CONTROL IN LOGIC CIRCUITS
96
Patent #:
6957269
Issue Dt:
10/18/2005
Application #:
09752719
Filing Dt:
01/03/2001
Publication #:
US20020087723
Pub Dt:
07/04/2002
Title:
METHOD AND APPARATUS FOR PERFORMING PRIORITY-BASED FLOW CONTROL
97
Patent #:
6489663
Issue Dt:
12/03/2002
Application #:
09753284
Filing Dt:
01/02/2001
Publication #:
US20020084509
Pub Dt:
07/04/2002
Title:
SPIRAL INDUCTOR SEMICONDUCTING DEVICE WITH GROUNDING STRIPS AND CONDUCTING VIAS
98
Patent #:
6588007
Issue Dt:
07/01/2003
Application #:
09753705
Filing Dt:
01/03/2001
Title:
USE OF ENDPOINT SYSTEM TO MATCH INDIVIDUAL PROCESSING STATIONS WITHIN A TOOL
99
Patent #:
6479879
Issue Dt:
11/12/2002
Application #:
09753809
Filing Dt:
01/03/2001
Title:
LOW DEFECT ORGANIC BARC COATING IN A SEMICONDUCTOR STRUCTURE
100
Patent #:
6423583
Issue Dt:
07/23/2002
Application #:
09753845
Filing Dt:
01/03/2001
Title:
METHODOLOGY FOR ELECTRICALLY INDUCED SELECTIVE BREAKDOWN OF NANOTUBES
Assignor
1
GLOBALFOUNDRIES INC.
Exec Dt:
10/22/2020
Assignee
1
GLOBALFOUNDRIES U.S. INC.
2600 GREAT AMERICA WAY
SANTA CLARA, CALIFORNIA 95054
Correspondence name and address
GLOBALFOUNDRIES SINGAPORE PTE. LTD.
60 WOODLANDS INDUSTRIAL PARK D STREET 2,
SINGAPORE, 738406 SINGAPORE

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