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Reel/Frame:	047540/0001			Pages:	843
		Recorded:	07/13/2018
Attorney Dkt #:	509265/2155
Conveyance:	SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 16531
Page 20 of 166
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Patent #:	6638820	Issue Dt:	10/28/2003	Application #:	09779983	Filing Dt:	02/08/2001
Publication #:	US20020106849	Pub Dt:	08/08/2002
Title:	METHOD OF FORMING CHALCOGENIDE COMPRISING DEVICES, METHOD OF PRECLUDING DIFFUSION OF A METAL INTO ADJACENT CHALCOGENIDE MATERIAL, AND CHALCOGENIDE COMPRISING DEVICES

Patent #:	6496034	Issue Dt:	12/17/2002	Application #:	09780087	Filing Dt:	02/09/2001
Publication #:	US20020109526	Pub Dt:	08/15/2002
Title:	PROGRAMMABLE LOGIC ARRAYS WITH ULTRA THIN BODY TRANSISTORS

Patent #:	6531727	Issue Dt:	03/11/2003	Application #:	09780125	Filing Dt:	02/09/2001
Publication #:	US20020109176	Pub Dt:	08/15/2002
Title:	OPEN BIT LINE DRAM WITH ULTRA THIN BODY TRANSISTORS

Patent #:	6566682	Issue Dt:	05/20/2003	Application #:	09780126	Filing Dt:	02/09/2001
Publication #:	US20020109138	Pub Dt:	08/15/2002
Title:	PROGRAMMABLE MEMORY ADDRESS AND DECODE CIRCUITS WITH ULTRA THIN VERTICAL BODY TRANSISTORS

Patent #:	6377070	Issue Dt:	04/23/2002	Application #:	09780129	Filing Dt:	02/09/2001
Title:	IN SERVICE PROGRAMMABLE LOGIC ARRAYS WITH ULTRA THIN VERTICAL BODY TRANSISTORS

Patent #:	6559491	Issue Dt:	05/06/2003	Application #:	09780130	Filing Dt:	02/09/2001
Publication #:	US20020109173	Pub Dt:	08/15/2002
Title:	FOLDED BIT LINE DRAM WITH ULTRA THIN BODY TRANSISTORS

Patent #:	6448601	Issue Dt:	09/10/2002	Application #:	09780144	Filing Dt:	02/09/2001
Publication #:	US20020110039	Pub Dt:	08/15/2002
Title:	MEMORY ADDRESS AND DECODE CIRCUITS WITH ULTRA THIN BODY TRANSISTORS

Patent #:	6424001	Issue Dt:	07/23/2002	Application #:	09780169	Filing Dt:	02/09/2001
Publication #:	US20020109163	Pub Dt:	08/15/2002
Title:	FLASH MEMORY WITH ULTRA THIN VERTICAL BODY TRANSISTORS

Patent #:	6838714	Issue Dt:	01/04/2005	Application #:	09780390	Filing Dt:	02/12/2001
Publication #:	US20010017382	Pub Dt:	08/30/2001
Title:	LOW LEAKAGE DIODES, INCLUDING PHOTODIODES

Patent #:	6480429	Issue Dt:	11/12/2002	Application #:	09781808	Filing Dt:	02/12/2001
Publication #:	US20020145921	Pub Dt:	10/10/2002
Title:	SHARED REDUNDANCY FOR MEMORY HAVING COLUMN ADDRESSING

Patent #:	6774487	Issue Dt:	08/10/2004	Application #:	09782498	Filing Dt:	02/13/2001
Publication #:	US20010005621	Pub Dt:	06/28/2001
Title:	SMALL GRAIN SIZE, CONFORMAL ALUMINUM INTERCONNECTS AND METHOD FOR THEIR FORMATION

Patent #:	6422907	Issue Dt:	07/23/2002	Application #:	09782811	Filing Dt:	02/14/2001
Publication #:	US20010010991	Pub Dt:	08/02/2001
Title:	ELECTRODE STRUCTURES, DISPLAY DEVICES CONTAINING THE SAME, AND METHODS FOR MAKING THE SAME

Patent #:	6755718	Issue Dt:	06/29/2004	Application #:	09782893	Filing Dt:	02/13/2001
Publication #:	US20010006871	Pub Dt:	07/05/2001
Title:	APPARATUS AND METHOD FOR CONDITIONING AND MONITORING MEDIA USED FOR CHEMICAL-MECHANICAL PLANARIZATION

Patent #:	6733363	Issue Dt:	05/11/2004	Application #:	09782913	Filing Dt:	02/13/2001
Publication #:	US20010006873	Pub Dt:	07/05/2001
Title:	APPARATUS AND METHOD FOR CONDITIONING AND MONITORING MEDIA USED FOR CHEMICAL-MECHANICAL PLANARIZATION

Patent #:	6773332	Issue Dt:	08/10/2004	Application #:	09782914	Filing Dt:	02/13/2001
Publication #:	US20010006874	Pub Dt:	07/05/2001
Title:	APPARATUS AND METHOD FOR CONDITIONING AND MONITORING MEDIA USED FOR CHEMICAL-MECHANICAL PLANARIZATION

Patent #:	6461930	Issue Dt:	10/08/2002	Application #:	09784835	Filing Dt:	02/16/2001
Publication #:	US20010009797	Pub Dt:	07/26/2001
Title:	CAPACITOR AND METHOD FOR FORMING THE SAME

Patent #:	6404272	Issue Dt:	06/11/2002	Application #:	09785042	Filing Dt:	02/13/2001
Publication #:	US20010017565	Pub Dt:	08/30/2001
Title:	CHARGE PUMP BOOSTER DEVICE WITH TRANSFER AND RECOVERY OF THE CHARGE

Patent #:	6418051	Issue Dt:	07/09/2002	Application #:	09785079	Filing Dt:	02/14/2001
Publication #:	US20020001237	Pub Dt:	01/03/2002
Title:	NON-VOLATILE MEMORY DEVICE WITH CONFIGURABLE ROW REDUNDANCY

Patent #:	6404273	Issue Dt:	06/11/2002	Application #:	09785083	Filing Dt:	02/13/2001
Publication #:	US20020050852	Pub Dt:	05/02/2002
Title:	VOLTAGE BOOSTER WITH A LOW OUTPUT RESISTANCE

Patent #:	6725321	Issue Dt:	04/20/2004	Application #:	09786418	Filing Dt:	03/01/2001
Title:	MEMORY SYSTEM

Patent #:	6448842	Issue Dt:	09/10/2002	Application #:	09788623	Filing Dt:	02/13/2001
Publication #:	US20010022735	Pub Dt:	09/20/2001
Title:	HIGH-EFFICIENCY BIDIRECTIONAL VOLTAGE BOOSTING DEVICE

Patent #:	6287932	Issue Dt:	09/11/2001	Application #:	09789146	Filing Dt:	02/20/2001
Publication #:	US20010005034	Pub Dt:	06/28/2001
Title:	Inductor with magnetic material layers

Patent #:	6395579	Issue Dt:	05/28/2002	Application #:	09789892	Filing Dt:	02/21/2001
Publication #:	US20010008780	Pub Dt:	07/19/2001
Title:	Controlling packaging encapsulant leakage

Patent #:	6426292	Issue Dt:	07/30/2002	Application #:	09790286	Filing Dt:	02/22/2001
Publication #:	US20010007793	Pub Dt:	07/12/2001
Title:	METHODS FOR FORMING IRIDIUM AND PLATINUM CONTAINING FILMS ON SUBSTRATES

Patent #:	6486713	Issue Dt:	11/26/2002	Application #:	09790525	Filing Dt:	02/23/2001
Publication #:	US20020118592	Pub Dt:	08/29/2002
Title:	DIFFERENTIAL INPUT BUFFER BIAS PULSER

Patent #:	6466485	Issue Dt:	10/15/2002	Application #:	09792536	Filing Dt:	02/23/2001
Publication #:	US20020048188	Pub Dt:	04/25/2002
Title:	VOLTAGE REGULATOR AND DATA PATH FOR A MEMORY DEVICE

Patent #:	6411562	Issue Dt:	06/25/2002	Application #:	09792537	Filing Dt:	02/23/2001
Publication #:	US20020024866	Pub Dt:	02/28/2002
Title:	VOLTAGE REGULATOR AND DATA PATH FOR A MEMORY DEVICE

Patent #:	6456556	Issue Dt:	09/24/2002	Application #:	09792553	Filing Dt:	02/23/2001
Publication #:	US20020024867	Pub Dt:	02/28/2002
Title:	VOLTAGE REGULATOR AND DATA PATH FOR A MEMORY DEVICE

Patent #:	6475831	Issue Dt:	11/05/2002	Application #:	09792771	Filing Dt:	02/23/2001
Publication #:	US20010006829	Pub Dt:	07/05/2001
Title:	LOW PROFILE MULTI-IC CHIP PACKAGE CONNECTOR

Patent #:	6858865	Issue Dt:	02/22/2005	Application #:	09792777	Filing Dt:	02/23/2001
Publication #:	US20020135048	Pub Dt:	09/26/2002
Title:	DOPED ALUMINUM OXIDE DIELECTRICS

Patent #:	7214616	Issue Dt:	05/08/2007	Application #:	09795949	Filing Dt:	02/28/2001
Publication #:	US20010010389	Pub Dt:	08/02/2001
Title:	HOMOJUNCTION SEMICONDUCTOR DEVICES WITH LOW BARRIER TUNNEL OXIDE CONTACTS

Patent #:	6413788	Issue Dt:	07/02/2002	Application #:	09796326	Filing Dt:	02/28/2001
Title:	KEEPERS FOR MRAM ELECTRODES

Patent #:	6887753	Issue Dt:	05/03/2005	Application #:	09797098	Filing Dt:	02/28/2001
Publication #:	US20020119640	Pub Dt:	08/29/2002
Title:	Methods of forming semiconductor circuitry, and semiconductor circuit constructions

Patent #:	6507534	Issue Dt:	01/14/2003	Application #:	09797171	Filing Dt:	02/27/2001
Publication #:	US20010028598	Pub Dt:	10/11/2001
Title:	COLUMN DECODER CIRCUIT FOR PAGE READING OF A SEMICONDUCTOR MEMORY

Patent #:	6548223	Issue Dt:	04/15/2003	Application #:	09797352	Filing Dt:	02/28/2001
Publication #:	US20020119397	Pub Dt:	08/29/2002
Title:	METHODS OF FORMING PATTERNS ACROSS PHOTORESIST AND METHODS OF FORMING RADIATION-PATTERNING TOOLS

Patent #:	6541391	Issue Dt:	04/01/2003	Application #:	09797356	Filing Dt:	02/28/2001
Publication #:	US20020119656	Pub Dt:	08/29/2002
Title:	METHODS OF CLEANING SURFACES OF COPPER-CONTAINING MATERIALS, AND METHODS OF FORMING OPENINGS TO COPPER-CONTAINING SUBSTRATES

Patent #:	6426898	Issue Dt:	07/30/2002	Application #:	09797682	Filing Dt:	03/05/2001
Title:	METHOD OF REDUCING TRAPPED HOLES INDUCED BY ERASE OPERATIONS IN THE TUNNEL OXIDE OF FLASH MEMORY CELLS

Patent #:	6348365	Issue Dt:	02/19/2002	Application #:	09797792	Filing Dt:	03/02/2001
Title:	PCRAM cell manufacturing

Patent #:	6548852	Issue Dt:	04/15/2003	Application #:	09797900	Filing Dt:	03/01/2001
Publication #:	US20010023953	Pub Dt:	09/27/2001
Title:	INTEGRATED CIRCUITRY AND METHODS OF FORMING CIRCUITRY

Patent #:	7282457	Issue Dt:	10/16/2007	Application #:	09798445	Filing Dt:	03/02/2001
Publication #:	US20010008750	Pub Dt:	07/19/2001
Title:	APPARATUS FOR STABILIZING HIGH PRESSURE OXIDATION OF A SEMICONDUCTOR DEVICE

Patent #:	6686241	Issue Dt:	02/03/2004	Application #:	09798778	Filing Dt:	03/02/2001
Publication #:	US20010049176	Pub Dt:	12/06/2001
Title:	METHOD OF FORMING LOW-RESISTIVITY CONNECTIONS IN NON-VOLATILE MEMORIES

Patent #:	6400613	Issue Dt:	06/04/2002	Application #:	09799222	Filing Dt:	03/05/2001
Title:	POSITIVE WRITE MASKING METHOD AND APPARATUS

Patent #:	6611020	Issue Dt:	08/26/2003	Application #:	09799754	Filing Dt:	03/06/2001
Publication #:	US20010020717	Pub Dt:	09/13/2001
Title:	METHOD CELL STRUCTURE

Patent #:	6552431	Issue Dt:	04/22/2003	Application #:	09800189	Filing Dt:	03/06/2001
Publication #:	US20010040293	Pub Dt:	11/15/2001
Title:	SEMICONDUCTOR STRUCTURE WITH A TITANIUM ALUMINUM NITRIDE LAYER AND METHOD FOR FABRICATING SAME

Patent #:	6662279	Issue Dt:	12/09/2003	Application #:	09801216	Filing Dt:	03/07/2001
Publication #:	US20020129190	Pub Dt:	09/12/2002
Title:	DQMASK TO FORCE INTERNAL DATA TO MASK EXTERNAL DATA IN A FLASH MEMORY

Patent #:	6627549	Issue Dt:	09/30/2003	Application #:	09801265	Filing Dt:	03/07/2001
Publication #:	US20010053612	Pub Dt:	12/20/2001
Title:	METHODS FOR MAKING NEARLY PLANAR DIELECTRIC FILMS IN INTEGRATED CIRCUITS

Patent #:	6424576	Issue Dt:	07/23/2002	Application #:	09801960	Filing Dt:	03/08/2001
Title:	APPARATUS AND METHODS FOR SELECTIVELY DISABLING OUTPUTS IN INTEGRATED CIRCUIT DEVICES

Patent #:	6759707	Issue Dt:	07/06/2004	Application #:	09802234	Filing Dt:	03/08/2001
Publication #:	US20020127798	Pub Dt:	09/12/2002
Title:	A 2F2 MEMORY DEVICE SYSTEM

Patent #:	6549975	Issue Dt:	04/15/2003	Application #:	09802269	Filing Dt:	03/08/2001
Publication #:	US20020129193	Pub Dt:	09/12/2002
Title:	TRI-STATING OUTPUT BUFFER DURING INITIALIZATION OF SYNCHRONOUS MEMORY

Patent #:	6535038	Issue Dt:	03/18/2003	Application #:	09802363	Filing Dt:	03/09/2001
Publication #:	US20020125927	Pub Dt:	09/12/2002
Title:	REDUCED JITTER CLOCK GENERATOR CIRCUIT AND METHOD FOR APPLYING PROPERLY PHASED CLOCK SIGNALS TO CLOCKED DEVICES

Patent #:	6557090	Issue Dt:	04/29/2003	Application #:	09802384	Filing Dt:	03/09/2001
Publication #:	US20020169919	Pub Dt:	11/14/2002
Title:	COLUMN ADDRESS PATH CIRCUIT AND METHOD FOR MEMORY DEVICES HAVING A BURST ACCESS MODE

Patent #:	6772366	Issue Dt:	08/03/2004	Application #:	09802451	Filing Dt:	03/09/2001
Publication #:	US20020152417	Pub Dt:	10/17/2002
Title:	METHOD AND APPARATUS FOR DETECTING AC REMOVAL

Patent #:	6469376	Issue Dt:	10/22/2002	Application #:	09803045	Filing Dt:	03/12/2001
Publication #:	US20020127770	Pub Dt:	09/12/2002
Title:	DIE SUPPORT STRUCTURE

Patent #:	6618291	Issue Dt:	09/09/2003	Application #:	09803047	Filing Dt:	03/12/2001
Publication #:	US20020114182	Pub Dt:	08/22/2002
Title:	WRITE STATE MACHINE ARCHITECTURE FOR FLASH MEMORY INTERNAL INSTRUCTIONS

Patent #:	6678133	Issue Dt:	01/13/2004	Application #:	09803156	Filing Dt:	03/09/2001
Publication #:	US20020126430	Pub Dt:	09/12/2002
Title:	ELECTROSTATIC DISCHARGE PROTECTION WITH INPUT IMPEDANCE

Patent #:	6554672	Issue Dt:	04/29/2003	Application #:	09804026	Filing Dt:	03/12/2001
Publication #:	US20020125816	Pub Dt:	09/12/2002
Title:	FLAT PANEL DISPLAY, METHOD OF HIGH VACUUM SEALING

Patent #:	6469932	Issue Dt:	10/22/2002	Application #:	09804125	Filing Dt:	03/12/2001
Publication #:	US20020126529	Pub Dt:	09/12/2002
Title:	MEMORY WITH ROW REDUNDANCY

Patent #:	6882082	Issue Dt:	04/19/2005	Application #:	09804224	Filing Dt:	03/13/2001
Publication #:	US20040225777	Pub Dt:	11/11/2004
Title:	MEMORY REPEATER

Patent #:	6441483	Issue Dt:	08/27/2002	Application #:	09804421	Filing Dt:	03/30/2001
Title:	DIE STACKING SCHEME

Patent #:	6381174	Issue Dt:	04/30/2002	Application #:	09804561	Filing Dt:	03/12/2001
Title:	NON-VOLATILE MEMORY DEVICE WITH REDUNDANT COLUMNS

Patent #:	6403493	Issue Dt:	06/11/2002	Application #:	09804616	Filing Dt:	03/12/2001
Publication #:	US20010021583	Pub Dt:	09/13/2001
Title:	MICROELECTRONIC DEVICE FABRICATING METHODS

Patent #:	6356495	Issue Dt:	03/12/2002	Application #:	09804617	Filing Dt:	03/12/2001
Publication #:	US20010010641	Pub Dt:	08/02/2001
Title:	Memory array architecture, method of operating a dynamic random access memory, and method of manufacturing a dynamic random access memory

Patent #:	6638833	Issue Dt:	10/28/2003	Application #:	09804693	Filing Dt:	03/09/2001
Title:	PROCESS FOR THE FABRICATION OF INTEGRATED DEVICES WITH REDUCTION OF DAMAGE FROM PLASMA

Patent #:	6901541	Issue Dt:	05/31/2005	Application #:	09804837	Filing Dt:	03/13/2001
Publication #:	US20020133765	Pub Dt:	09/19/2002
Title:	MEMORY TESTING METHOD AND APPARATUS

Patent #:	6498510	Issue Dt:	12/24/2002	Application #:	09805100	Filing Dt:	03/14/2001
Publication #:	US20020130682	Pub Dt:	09/19/2002
Title:	ADAPTIVE THRESHOLD LOGIC CIRCUIT

Patent #:	6538494	Issue Dt:	03/25/2003	Application #:	09805207	Filing Dt:	03/14/2001
Publication #:	US20020130699	Pub Dt:	09/19/2002
Title:	PUMP CIRCUITS USING FLYBACK EFFECT FROM INTEGRATED INDUCTANCE

Patent #:	6636946	Issue Dt:	10/21/2003	Application #:	09805663	Filing Dt:	03/13/2001
Publication #:	US20020133673	Pub Dt:	09/19/2002
Title:	SYSTEM AND METHOD FOR CACHING DATA BASED ON IDENTITY OF REQUESTOR

Patent #:	6563345	Issue Dt:	05/13/2003	Application #:	09805909	Filing Dt:	03/15/2001
Publication #:	US20020130685	Pub Dt:	09/19/2002
Title:	MONOTONIC DYNAMIC STATIC PSEUDO-NMOS LOGIC CIRCUITS

Patent #:	6780652	Issue Dt:	08/24/2004	Application #:	09805914	Filing Dt:	03/15/2001
Publication #:	US20020132464	Pub Dt:	09/19/2002
Title:	SELF-ALIGNED MRAM CONTACT AND METHOD OF FABRICATION

Patent #:	6514797	Issue Dt:	02/04/2003	Application #:	09805915	Filing Dt:	03/15/2001
Publication #:	US20020130401	Pub Dt:	09/19/2002
Title:	UNDERFILL APPLICATIONS USING FILM TECHNOLOGY

Patent #:	6653154	Issue Dt:	11/25/2003	Application #:	09805916	Filing Dt:	03/15/2001
Publication #:	US20020132375	Pub Dt:	09/19/2002
Title:	Method of forming self-aligned, trenchless magnetoresistive random-access memory (MRAM) structure with sidewall containment of MRAM structure

Patent #:	6515925	Issue Dt:	02/04/2003	Application #:	09805933	Filing Dt:	03/15/2001
Publication #:	US20020131311	Pub Dt:	09/19/2002
Title:	BALANCED SENSE AMPLIFIER CONTROL FOR OPEN DIGIT LINE ARCHITECTURE MEMORY DEVICES

Patent #:	6734510	Issue Dt:	05/11/2004	Application #:	09808114	Filing Dt:	03/15/2001
Publication #:	US20020130378	Pub Dt:	09/19/2002
Title:	TECHNIQUE TO MITIGATE SHORT CHANNEL EFFECTS WITH VERTICAL GATE TRANSISTOR WITH DIFFERENT GATE MATERIALS

Patent #:	6437604	Issue Dt:	08/20/2002	Application #:	09808139	Filing Dt:	03/15/2001
Title:	CLOCKED DIFFERENTIAL CASCODE VOLTAGE SWITCH WITH PASS GATE LOGIC

Patent #:	6421282	Issue Dt:	07/16/2002	Application #:	09808249	Filing Dt:	03/14/2001
Title:	CASCADE-BOOTED PROGRAMMING VOLTAGE CIRCUIT

Patent #:	6809014	Issue Dt:	10/26/2004	Application #:	09808261	Filing Dt:	03/14/2001
Publication #:	US20020132412	Pub Dt:	09/19/2002
Title:	METHOD TO FABRICATE SURFACE P-CHANNEL CMOS

Patent #:	6597203	Issue Dt:	07/22/2003	Application #:	09808369	Filing Dt:	03/14/2001
Publication #:	US20020130686	Pub Dt:	09/19/2002
Title:	CMOS GATE ARRAY WITH VERTICAL TRANSISTORS

Patent #:	7006580	Issue Dt:	02/28/2006	Application #:	09808613	Filing Dt:	03/14/2001
Publication #:	US20010024477	Pub Dt:	09/27/2001
Title:	METHOD FOR CONTROLLING A DATA TRANSMISSION PRE-EMPHASIS UNIT AND A DATA TRANSMISSION SYSTEM EMPLOYING THE METHOD

Patent #:	7570504	Issue Dt:	08/04/2009	Application #:	09808750	Filing Dt:	03/15/2001
Publication #:	US20020131290	Pub Dt:	09/19/2002
Title:	DEVICE AND METHOD TO REDUCE WORDLINE RC TIME CONSTANT IN SEMICONDUCTOR MEMORY DEVICES

Patent #:	6812529	Issue Dt:	11/02/2004	Application #:	09808864	Filing Dt:	03/15/2001
Publication #:	US20020132441	Pub Dt:	09/19/2002
Title:	SUPPRESSION OF CROSS DIFFUSION AND GATE DEPLETION

Patent #:	6468883	Issue Dt:	10/22/2002	Application #:	09808886	Filing Dt:	03/14/2001
Publication #:	US20010010969	Pub Dt:	08/02/2001
Title:	SEMICONDUCTOR PROCESSING METHODS OF FORMING CONTACT OPENINGS, METHODS OF FORMING ELECTRICAL CONNECTIONS AND INTERCONNECTIONS

Patent #:	6567332	Issue Dt:	05/20/2003	Application #:	09808900	Filing Dt:	03/15/2001
Publication #:	US20020133663	Pub Dt:	09/19/2002
Title:	MEMORY DEVICES WITH REDUCED POWER CONSUMPTION REFRESH CYCLES

Patent #:	6734455	Issue Dt:	05/11/2004	Application #:	09809331	Filing Dt:	03/15/2001
Publication #:	US20020132417	Pub Dt:	09/19/2002
Title:	AGGLOMERATION ELIMINATION FOR METAL SPUTTER DEPOSITION OF CHALCOGENIDES

Patent #:	6785180	Issue Dt:	08/31/2004	Application #:	09809441	Filing Dt:	03/15/2001
Publication #:	US20020140463	Pub Dt:	10/03/2002
Title:	PROGRAMMABLE SOFT-START CONTROL FOR CHARGE PUMP

Patent #:	6417695	Issue Dt:	07/09/2002	Application #:	09809537	Filing Dt:	03/15/2001
Title:	ANTIFUSE REROUTE OF DIES

Patent #:	7088604	Issue Dt:	08/08/2006	Application #:	09809586	Filing Dt:	03/15/2001
Publication #:	US20020131315	Pub Dt:	09/19/2002
Title:	MULTI-BANK MEMORY

Patent #:	6895522	Issue Dt:	05/17/2005	Application #:	09809608	Filing Dt:	03/15/2001
Publication #:	US20020133731	Pub Dt:	09/19/2002
Title:	Method and apparatus for compensating duty cycle distortion in a data output signal from a memory device by delaying and distorting a reference clock

Patent #:	6552600	Issue Dt:	04/22/2003	Application #:	09809623	Filing Dt:	03/15/2001
Publication #:	US20020130700	Pub Dt:	09/19/2002
Title:	INITIALIZATION OF NEGATIVE CHARGE PUMP

Patent #:	6376358	Issue Dt:	04/23/2002	Application #:	09809666	Filing Dt:	03/15/2001
Title:	METHOD OF FORMING PLUGS AND LOCAL INTERCONNECT FOR EMBEDDED MEMORY/SYSTEM-ON-CHIP (SOC) APPLICATIONS

Patent #:	6599666	Issue Dt:	07/29/2003	Application #:	09809720	Filing Dt:	03/15/2001
Publication #:	US20020132173	Pub Dt:	09/19/2002
Title:	MULTI-LAYER, ATTENUATED PHASE-SHIFTING MASK

Patent #:	6545497	Issue Dt:	04/08/2003	Application #:	09809727	Filing Dt:	03/15/2001
Publication #:	US20020132382	Pub Dt:	09/19/2002
Title:	METHOD AND APPARATUS OF TESTING MEMORY DEVICE POWER AND GROUND PINS IN AN ARRAY ASSEMBLY PLATFORM

Patent #:	6487141	Issue Dt:	11/26/2002	Application #:	09809730	Filing Dt:	03/15/2001
Publication #:	US20020131319	Pub Dt:	09/19/2002
Title:	DIGITAL DELAY, DIGITAL PHASE SHIFTER

Patent #:	6399492	Issue Dt:	06/04/2002	Application #:	09810008	Filing Dt:	03/15/2001
Title:	RUTHENIUM SILICIDE PROCESSING METHODS

Patent #:	6617624	Issue Dt:	09/09/2003	Application #:	09810209	Filing Dt:	03/15/2001
Publication #:	US20010025971	Pub Dt:	10/04/2001
Title:	METAL GATE ELECTRODE STACK WITH A PASSIVATING METAL NITRIDE LAYER

Patent #:	6904552	Issue Dt:	06/07/2005	Application #:	09810366	Filing Dt:	03/15/2001
Publication #:	US20020133767	Pub Dt:	09/19/2002
Title:	CIRCUIT AND METHOD FOR TEST AND REPAIR

Patent #:	6426243	Issue Dt:	07/30/2002	Application #:	09810586	Filing Dt:	03/15/2001
Publication #:	US20020025609	Pub Dt:	02/28/2002
Title:	METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMORY CIRCUITRY

Patent #:	6486030	Issue Dt:	11/26/2002	Application #:	09810752	Filing Dt:	03/15/2001
Publication #:	US20010019868	Pub Dt:	09/06/2001
Title:	METHODS OF FORMNG FIELD EFFECT TRANSISTORS AND INTEGRATED CIRCUITRY INCLUDING TIN GATE ELEMENT

Patent #:	6392291	Issue Dt:	05/21/2002	Application #:	09811179	Filing Dt:	03/16/2001
Title:	SEMICONDUCTOR COMPONENT HAVING SELECTED TERMINAL CONTACTS WITH MULTIPLE ELECTRICAL PATHS

Patent #:	6441428	Issue Dt:	08/27/2002	Application #:	09811744	Filing Dt:	03/19/2001
Publication #:	US20020130351	Pub Dt:	09/19/2002
Title:	ONE-SIDED FLOATING-GATE MEMORY CELL

100

Patent #:	6475920	Issue Dt:	11/05/2002	Application #:	09812543	Filing Dt:	03/20/2001
Publication #:	US20010012694	Pub Dt:	08/09/2001
Title:	PLASMA ETCHING METHOD USING LOW IONIZATION POTENTIAL GAS

Assignors

MICRON TECHNOLOGY, INC.

Exec Dt:

07/03/2018

MICRON SEMICONDUCTOR PRODUCTS, INC.

Exec Dt:

07/03/2018

Assignee

JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT

10 S. DEARBORN

7TH FLOOR

CHICAGO, ILLINOIS 60603

Correspondence name and address
	MARCELA ROBLEDO
	2475 HANOVER STREET
	PALO ALTO, CA 94304

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