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Reel/Frame:	048734/0001			Pages:	527
		Recorded:	02/20/2019
Conveyance:	CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS..

Total properties: 6031
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Patent #:	6987063	Issue Dt:	01/17/2006	Application #:	10865452	Filing Dt:	06/10/2004
Publication #:	US20050277296	Pub Dt:	12/15/2005
Title:	METHOD TO REDUCE IMPURITY ELEMENTS DURING SEMICONDUCTOR FILM DEPOSITION

Patent #:	7885174	Issue Dt:	02/08/2011	Application #:	10868903	Filing Dt:	06/17/2004
Publication #:	US20050185669	Pub Dt:	08/25/2005
Title:	COMMON SIGNALLING MODE FOR USE WITH MULTIPLE WIRELESS FORMATS

Patent #:	7002940	Issue Dt:	02/21/2006	Application #:	10868948	Filing Dt:	06/17/2004
Publication #:	US20050201287	Pub Dt:	09/15/2005
Title:	MULTIPLE-STAGE FILTERING DEVICE AND METHOD

Patent #:	7141476	Issue Dt:	11/28/2006	Application #:	10871402	Filing Dt:	06/18/2004
Publication #:	US20050282318	Pub Dt:	12/22/2005
Title:	METHOD OF FORMING A TRANSISTOR WITH A BOTTOM GATE

Patent #:	7018876	Issue Dt:	03/28/2006	Application #:	10871772	Filing Dt:	06/18/2004
Publication #:	US20050282345	Pub Dt:	12/22/2005
Title:	TRANSISTOR WITH VERTICAL DIELECTRIC STRUCTURE

Patent #:	7282307	Issue Dt:	10/16/2007	Application #:	10872057	Filing Dt:	06/18/2004
Publication #:	US20050282072	Pub Dt:	12/22/2005
Title:	REFLECTIVE MASK USEFUL FOR TRANSFERRING A PATTERN USING EXTREME ULTRA VIOLET (EUV) RADIATION AND METHOD OF MAKING THE SAME

Patent #:	7259634	Issue Dt:	08/21/2007	Application #:	10872066	Filing Dt:	06/18/2004
Publication #:	US20040263266	Pub Dt:	12/30/2004
Title:	ARRANGEMENT AND METHOD FOR DIGITAL DELAY LINE

Patent #:	7370332	Issue Dt:	05/06/2008	Application #:	10872077	Filing Dt:	06/18/2004
Publication #:	US20050071726	Pub Dt:	03/31/2005
Title:	ARRANGEMENT AND METHOD FOR ITERATIVE DECODING

Patent #:	7359459	Issue Dt:	04/15/2008	Application #:	10873422	Filing Dt:	06/23/2004
Publication #:	US20050036571	Pub Dt:	02/17/2005
Title:	SYSTEM AND METHOD FOR LOW POWER CLEAR CHANNEL ASSESSMENT

Patent #:	7141860	Issue Dt:	11/28/2006	Application #:	10875105	Filing Dt:	06/23/2004
Publication #:	US20050285188	Pub Dt:	12/29/2005
Title:	LDMOS TRANSISTOR

Patent #:	7091089	Issue Dt:	08/15/2006	Application #:	10876805	Filing Dt:	06/25/2004
Publication #:	US20050287729	Pub Dt:	12/29/2005
Title:	METHOD OF FORMING A NANOCLUSTER CHARGE STORAGE DEVICE

Patent #:	7091130	Issue Dt:	08/15/2006	Application #:	10876820	Filing Dt:	06/25/2004
Publication #:	US20060194438	Pub Dt:	08/31/2006
Title:	METHOD OF FORMING A NANOCLUSTER CHARGE STORAGE DEVICE

Patent #:	7557042	Issue Dt:	07/07/2009	Application #:	10878839	Filing Dt:	06/28/2004
Publication #:	US20050287810	Pub Dt:	12/29/2005
Title:	METHOD FOR MAKING A SEMICONDUCTOR DEVICE WITH REDUCED SPACING

Patent #:	6862240	Issue Dt:	03/01/2005	Application #:	10878956	Filing Dt:	06/28/2004
Publication #:	US20040233706	Pub Dt:	11/25/2004
Title:	VARIABLE REFRESH CONTROL FOR A MEMORY

Patent #:	7074627	Issue Dt:	07/11/2006	Application #:	10879242	Filing Dt:	06/29/2004
Publication #:	US20050285274	Pub Dt:	12/29/2005
Title:	LEAD SOLDER INDICATOR AND METHOD

Patent #:	6914012	Issue Dt:	07/05/2005	Application #:	10879440	Filing Dt:	06/29/2004
Publication #:	US20040248427	Pub Dt:	12/09/2004
Title:	ARTICLE COMPRISING AN OXIDE LAYER ON A GAAS-BASED SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING SAME

Patent #:	7739674	Issue Dt:	06/15/2010	Application #:	10879991	Filing Dt:	06/29/2004
Publication #:	US20040243989	Pub Dt:	12/02/2004
Title:	METHOD AND APPARATUS FOR SELECTIVELY OPTIMIZING INTERPRETED LANGUAGE CODE

Patent #:	7129566	Issue Dt:	10/31/2006	Application #:	10880681	Filing Dt:	06/30/2004
Publication #:	US20060001144	Pub Dt:	01/05/2006
Title:	SCRIBE STREET STRUCTURE FOR BACKEND INTERCONNECT SEMICONDUCTOR WAFER INTEGRATION

Patent #:	7157355	Issue Dt:	01/02/2007	Application #:	10880685	Filing Dt:	06/30/2004
Publication #:	US20060003561	Pub Dt:	01/05/2006
Title:	METHOD OF MAKING A SEMICONDUCTOR DEVICE HAVING A STRAINED SEMICONDUCTOR LAYER

Patent #:	7507638	Issue Dt:	03/24/2009	Application #:	10881144	Filing Dt:	06/30/2004
Publication #:	US20060003551	Pub Dt:	01/05/2006
Title:	ULTRA-THIN DIE AND METHOD OF FABRICATING SAME

Patent #:	7355260	Issue Dt:	04/08/2008	Application #:	10881678	Filing Dt:	06/30/2004
Publication #:	US20060001057	Pub Dt:	01/05/2006
Title:	SCHOTTKY DEVICE AND METHOD OF FORMING

Patent #:	7202182	Issue Dt:	04/10/2007	Application #:	10882482	Filing Dt:	06/30/2004
Publication #:	US20060003595	Pub Dt:	01/05/2006
Title:	METHOD OF PASSIVATING OXIDE/COMPOUND SEMICONDUCTOR INTERFACE

Patent #:	7141857	Issue Dt:	11/28/2006	Application #:	10883180	Filing Dt:	06/30/2004
Publication #:	US20060003602	Pub Dt:	01/05/2006
Title:	SEMICONDUCTOR STRUCTURES AND METHODS OF FABRICATING SEMICONDUCTOR STRUCTURES COMPRISING HAFNIUM OXIDE MODIFIED WITH LANTHANUM, A LANTHANIDE-SERIES METAL, OR A COMBINATION THEREOF

Patent #:	6852588	Issue Dt:	02/08/2005	Application #:	10883181	Filing Dt:	06/30/2004
Title:	METHODS OF FABRICATING SEMICONDUCTOR STRUCTURES COMPRISING EPITAXIAL HF3SI2 LAYERS

Patent #:	6960509	Issue Dt:	11/01/2005	Application #:	10883182	Filing Dt:	06/30/2004
Title:	METHOD OF FABRICATING THREE DIMENSIONAL GATE STRUCTURE USING OXYGEN DIFFUSION

Patent #:	7135370	Issue Dt:	11/14/2006	Application #:	10883237	Filing Dt:	07/01/2004
Publication #:	US20060003529	Pub Dt:	01/05/2006
Title:	DIELECTRIC STORAGE MEMORY CELL HAVING HIGH PERMITTIVITY TOP DIELECTRIC AND METHOD THEREFOR

Patent #:	7484140	Issue Dt:	01/27/2009	Application #:	10886340	Filing Dt:	07/07/2004
Publication #:	US20060010350	Pub Dt:	01/12/2006
Title:	MEMORY HAVING VARIABLE REFRESH CONTROL AND METHOD THEREFOR

Patent #:	7738563	Issue Dt:	06/15/2010	Application #:	10887132	Filing Dt:	07/08/2004
Publication #:	US20060008013	Pub Dt:	01/12/2006
Title:	METHOD AND SYSTEM FOR PERFORMING DEBLOCKING FILTERING

Patent #:	7200056	Issue Dt:	04/03/2007	Application #:	10889159	Filing Dt:	07/12/2004
Publication #:	US20060007763	Pub Dt:	01/12/2006
Title:	MEMORY ROW/COLUMN REPLACEMENT IN AN INTEGRATED CIRCUIT

Patent #:	7101736	Issue Dt:	09/05/2006	Application #:	10891648	Filing Dt:	07/15/2004
Publication #:	US20060014325	Pub Dt:	01/19/2006
Title:	METHOD OF ASSEMBLING A SEMICONDUCTOR COMPONENT AND APPARATUS THEREFOR

Patent #:	7444557	Issue Dt:	10/28/2008	Application #:	10891649	Filing Dt:	07/15/2004
Publication #:	US20060039215	Pub Dt:	02/23/2006
Title:	MEMORY WITH FAULT TOLERANT REFERENCE CIRCUITRY

Patent #:	7268524	Issue Dt:	09/11/2007	Application #:	10891811	Filing Dt:	07/15/2004
Publication #:	US20060012356	Pub Dt:	01/19/2006
Title:	VOLTAGE REGULATOR WITH ADAPTIVE FREQUENCY COMPENSATION

Patent #:	7057427	Issue Dt:	06/06/2006	Application #:	10892420	Filing Dt:	07/15/2004
Publication #:	US20060012409	Pub Dt:	01/19/2006
Title:	POWER ON RESET CIRCUIT

Patent #:	6992371	Issue Dt:	01/31/2006	Application #:	10892693	Filing Dt:	07/16/2004
Publication #:	US20050079650	Pub Dt:	04/14/2005
Title:	DEVICE INCLUDING AN AMORPHOUS CARBON LAYER FOR IMPROVED ADHESION OF ORGANIC LAYERS AND METHOD OF FABRICATION

Patent #:	7142665	Issue Dt:	11/28/2006	Application #:	10893034	Filing Dt:	07/16/2004
Publication #:	US20060013383	Pub Dt:	01/19/2006
Title:	AUTOMATIC GAIN CONTROL FOR AN ADAPTIVE FINITE IMPULSE RESPONSE AND METHOD THEREFORE

Patent #:	7105886	Issue Dt:	09/12/2006	Application #:	10895552	Filing Dt:	07/21/2004
Publication #:	US20050101159	Pub Dt:	05/12/2005
Title:	HIGH K DIELECTRIC FILM

Patent #:	7179700	Issue Dt:	02/20/2007	Application #:	10895553	Filing Dt:	07/21/2004
Publication #:	US20060017110	Pub Dt:	01/26/2006
Title:	SEMICONDUCTOR DEVICE WITH LOW RESISTANCE CONTACTS

Patent #:	7132372	Issue Dt:	11/07/2006	Application #:	10901589	Filing Dt:	07/29/2004
Publication #:	US20060024970	Pub Dt:	02/02/2006
Title:	METHOD FOR PREPARING A SEMICONDUCTOR SUBSTRATE SURFACE FOR SEMICONDUCTOR DEVICE FABRICATION

Patent #:	7596716	Issue Dt:	09/29/2009	Application #:	10901608	Filing Dt:	07/29/2004
Publication #:	US20060026453	Pub Dt:	02/02/2006
Title:	Method and system for managing networks

Patent #:	7215014	Issue Dt:	05/08/2007	Application #:	10901844	Filing Dt:	07/29/2004
Publication #:	US20060022313	Pub Dt:	02/02/2006
Title:	SOLDERABLE METAL FINISH FOR INTEGRATED CIRCUIT PACKAGE LEADS AND METHOD FOR FORMING

Patent #:	7224711	Issue Dt:	05/29/2007	Application #:	10902021	Filing Dt:	07/30/2004
Publication #:	US20060023771	Pub Dt:	02/02/2006
Title:	SYSTEM AND METHOD FOR THE MITIGATION OF SPECTRAL LINES IN AN ULTRAWIDE BANDWIDTH TRANSCEIVER

Patent #:	7164293	Issue Dt:	01/16/2007	Application #:	10902204	Filing Dt:	07/29/2004
Publication #:	US20060022714	Pub Dt:	02/02/2006
Title:	DYNAMIC LATCH HAVING INTEGRAL LOGIC FUNCTION AND METHOD THEREFOR

Patent #:	7144784	Issue Dt:	12/05/2006	Application #:	10902218	Filing Dt:	07/29/2004
Publication #:	US20060024893	Pub Dt:	02/02/2006
Title:	METHOD OF FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREOF

Patent #:	7119381	Issue Dt:	10/10/2006	Application #:	10903784	Filing Dt:	07/30/2004
Publication #:	US20060022217	Pub Dt:	02/02/2006
Title:	COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR STRUCTURE HAVING ION IMPLANT IN ONLY ONE OF THE COMPLEMENTARY DEVICES

Patent #:	7320931	Issue Dt:	01/22/2008	Application #:	10903841	Filing Dt:	07/30/2004
Publication #:	US20060022283	Pub Dt:	02/02/2006
Title:	INTERFACIAL LAYER FOR USE WITH HIGH K DIELECTRIC MATERIALS

Patent #:	7208841	Issue Dt:	04/24/2007	Application #:	10909124	Filing Dt:	07/30/2004
Publication #:	US20050023680	Pub Dt:	02/03/2005
Title:	SEMICONDUCTOR DEVICE WITH STRAIN RELIEVING BUMP DESIGN

Patent #:	7169694	Issue Dt:	01/30/2007	Application #:	10910036	Filing Dt:	08/03/2004
Publication #:	US20050014356	Pub Dt:	01/20/2005
Title:	METHOD FOR FORMING A BOND PAD INTERFACE

Patent #:	7105866	Issue Dt:	09/12/2006	Application #:	10911624	Filing Dt:	08/05/2004
Publication #:	US20050056210	Pub Dt:	03/17/2005
Title:	HETEROJUNCTION TUNNELING DIODES AND PROCESS FOR FABRICATING SAME

Patent #:	7042765	Issue Dt:	05/09/2006	Application #:	10912824	Filing Dt:	08/06/2004
Publication #:	US20060028898	Pub Dt:	02/09/2006
Title:	MEMORY BIT LINE SEGMENT ISOLATION

Patent #:	7160775	Issue Dt:	01/09/2007	Application #:	10912825	Filing Dt:	08/06/2004
Publication #:	US20060030105	Pub Dt:	02/09/2006
Title:	METHOD OF DISCHARGING A SEMICONDUCTOR DEVICE

Patent #:	7226802	Issue Dt:	06/05/2007	Application #:	10914006	Filing Dt:	08/06/2004
Publication #:	US20060027020	Pub Dt:	02/09/2006
Title:	TUNGSTEN COATED SILICON FINGERS

Patent #:	7249223	Issue Dt:	07/24/2007	Application #:	10916298	Filing Dt:	08/11/2004
Publication #:	US20060036812	Pub Dt:	02/16/2006
Title:	PREFETCHING IN A DATA PROCESSING SYSTEM

Patent #:	7304975	Issue Dt:	12/04/2007	Application #:	10918457	Filing Dt:	08/16/2004
Publication #:	US20060035589	Pub Dt:	02/16/2006
Title:	METHOD FOR PROVIDING RAPID DELAYED FRAME ACKNOWLEDGEMENT IN A WIRELESS TRANSCEIVER

Patent #:	7056778	Issue Dt:	06/06/2006	Application #:	10919784	Filing Dt:	08/17/2004
Publication #:	US20050070057	Pub Dt:	03/31/2005
Title:	SEMICONDUCTOR LAYER FORMATION

Patent #:	7208357	Issue Dt:	04/24/2007	Application #:	10919922	Filing Dt:	08/17/2004
Publication #:	US20050070053	Pub Dt:	03/31/2005
Title:	TEMPLATE LAYER FORMATION

Patent #:	7241647	Issue Dt:	07/10/2007	Application #:	10919952	Filing Dt:	08/17/2004
Publication #:	US20060040433	Pub Dt:	02/23/2006
Title:	GRADED SEMICONDUCTOR LAYER

Patent #:	6979622	Issue Dt:	12/27/2005	Application #:	10924632	Filing Dt:	08/24/2004
Title:	SEMICONDUCTOR TRANSISTOR HAVING STRUCTURAL ELEMENTS OF DIFFERING MATERIALS AND METHOD OF FORMATION

Patent #:	7166897	Issue Dt:	01/23/2007	Application #:	10924650	Filing Dt:	08/24/2004
Publication #:	US20060043498	Pub Dt:	03/02/2006
Title:	METHOD AND APPARATUS FOR PERFORMANCE ENHANCEMENT IN AN ASYMMETRICAL SEMICONDUCTOR DEVICE

Patent #:	7161199	Issue Dt:	01/09/2007	Application #:	10925084	Filing Dt:	08/24/2004
Publication #:	US20060043422	Pub Dt:	03/02/2006
Title:	TRANSISTOR STRUCTURE WITH STRESS MODIFICATION AND CAPACITIVE REDUCTION FEATURE IN A WIDTH DIRECTION AND METHOD THEREOF

Patent #:	7288448	Issue Dt:	10/30/2007	Application #:	10925108	Filing Dt:	08/24/2004
Publication #:	US20060046366	Pub Dt:	03/02/2006
Title:	METHOD AND APPARATUS FOR MOBILITY ENHANCEMENT IN A SEMICONDUCTOR DEVICE

Patent #:	7229903	Issue Dt:	06/12/2007	Application #:	10925855	Filing Dt:	08/25/2004
Publication #:	US20060043416	Pub Dt:	03/02/2006
Title:	RECESSED SEMICONDUCTOR DEVICE

Patent #:	7095246	Issue Dt:	08/22/2006	Application #:	10926121	Filing Dt:	08/25/2004
Publication #:	US20060044006	Pub Dt:	03/02/2006
Title:	VARIABLE IMPEDANCE OUTPUT BUFFER

Patent #:	7136028	Issue Dt:	11/14/2006	Application #:	10927921	Filing Dt:	08/27/2004
Publication #:	US20060044210	Pub Dt:	03/02/2006
Title:	APPLICATIONS OF A HIGH IMPEDANCE SURFACE

Patent #:	7136029	Issue Dt:	11/14/2006	Application #:	10927944	Filing Dt:	08/27/2004
Publication #:	US20060044211	Pub Dt:	03/02/2006
Title:	FREQUENCY SELECTIVE HIGH IMPEDANCE SURFACE

Patent #:	7185170	Issue Dt:	02/27/2007	Application #:	10928399	Filing Dt:	08/27/2004
Publication #:	US20060047935	Pub Dt:	03/02/2006
Title:	DATA PROCESSING SYSTEM HAVING TRANSLATION LOOKASIDE BUFFER VALID BITS WITH LOCK AND METHOD THEREFOR

Patent #:	7057564	Issue Dt:	06/06/2006	Application #:	10930660	Filing Dt:	08/31/2004
Publication #:	US20060044188	Pub Dt:	03/02/2006
Title:	MULTILAYER CAVITY SLOT ANTENNA

Patent #:	7105395	Issue Dt:	09/12/2006	Application #:	10930891	Filing Dt:	08/31/2004
Publication #:	US20060043482	Pub Dt:	03/02/2006
Title:	PROGRAMMING AND ERASING STRUCTURE FOR AN NVM CELL

Patent #:	8281080	Issue Dt:	10/02/2012	Application #:	10933191	Filing Dt:	09/02/2004
Publication #:	US20060047917	Pub Dt:	03/02/2006
Title:	METHOD AND APPARATUS FOR MODIFYING AN INFORMATION UNIT USING AN ATOMIC OPERATION

Patent #:	7238601	Issue Dt:	07/03/2007	Application #:	10939148	Filing Dt:	09/10/2004
Publication #:	US20060057792	Pub Dt:	03/16/2006
Title:	SEMICONDUCTOR DEVICE HAVING CONDUCTIVE SPACERS IN SIDEWALL REGIONS AND METHOD FOR FORMING

Patent #:	7145309	Issue Dt:	12/05/2006	Application #:	10940058	Filing Dt:	09/14/2004
Publication #:	US20060055360	Pub Dt:	03/16/2006
Title:	OPEN LOOP MOTOR PARKING METHOD AND SYSTEM

Patent #:	8886895	Issue Dt:	11/11/2014	Application #:	10940121	Filing Dt:	09/14/2004
Publication #:	US20060059312	Pub Dt:	03/16/2006
Title:	System and method for fetching information in response to hazard indication information

Patent #:	7249288	Issue Dt:	07/24/2007	Application #:	10940252	Filing Dt:	09/14/2004
Publication #:	US20060069952	Pub Dt:	03/30/2006
Title:	METHOD AND APPARATUS FOR NON-INTRUSIVE TRACING

Patent #:	7208424	Issue Dt:	04/24/2007	Application #:	10943383	Filing Dt:	09/17/2004
Publication #:	US20060063364	Pub Dt:	03/23/2006
Title:	METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING A METAL LAYER

Patent #:	7038959	Issue Dt:	05/02/2006	Application #:	10943579	Filing Dt:	09/17/2004
Publication #:	US20060062066	Pub Dt:	03/23/2006
Title:	MRAM SENSE AMPLIFIER HAVING A PRECHARGE CIRCUIT AND METHOD FOR SENSING

Patent #:	7094645	Issue Dt:	08/22/2006	Application #:	10944239	Filing Dt:	09/17/2004
Publication #:	US20060063327	Pub Dt:	03/23/2006
Title:	PROGRAMMING AND ERASING STRUCTURE FOR A FLOATING GATE MEMORY CELL AND METHOD OF MAKING

Patent #:	7183161	Issue Dt:	02/27/2007	Application #:	10944244	Filing Dt:	09/17/2004
Publication #:	US20060063328	Pub Dt:	03/23/2006
Title:	PROGRAMMING AND ERASING STRUCTURE FOR A FLOATING GATE MEMORY CELL AND METHOD OF MAKING

Patent #:	7235847	Issue Dt:	06/26/2007	Application #:	10944306	Filing Dt:	09/17/2004
Publication #:	US20060060928	Pub Dt:	03/23/2006
Title:	SEMICONDUCTOR DEVICE HAVING A GATE WITH A THIN CONDUCTIVE LAYER

Patent #:	7279433	Issue Dt:	10/09/2007	Application #:	10945319	Filing Dt:	09/20/2004
Publication #:	US20060063392	Pub Dt:	03/23/2006
Title:	DEPOSITION AND PATTERNING OF BORON NITRIDE NANOTUBE ILD

Patent #:	7176574	Issue Dt:	02/13/2007	Application #:	10946675	Filing Dt:	09/22/2004
Publication #:	US20050035459	Pub Dt:	02/17/2005
Title:	SEMICONDUCTOR DEVICE HAVING A MULTIPLE THICKNESS INTERCONNECT

Patent #:	6921961	Issue Dt:	07/26/2005	Application #:	10946758	Filing Dt:	09/22/2004
Publication #:	US20050042867	Pub Dt:	02/24/2005
Title:	SEMICONDUCTOR DEVICE HAVING ELECTRICAL CONTACT FROM OPPOSITE SIDES INCLUDING A VIA WITH AN END FORMED AT A BOTTOM SURFACE OF THE DIFFUSION REGION

Patent #:	7071038	Issue Dt:	07/04/2006	Application #:	10946938	Filing Dt:	09/22/2004
Publication #:	US20060063336	Pub Dt:	03/23/2006
Title:	METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING A DIELECTRIC LAYER WITH HIGH DIELECTRIC CONSTANT

Patent #:	7187600	Issue Dt:	03/06/2007	Application #:	10946951	Filing Dt:	09/22/2004
Publication #:	US20060062070	Pub Dt:	03/23/2006
Title:	METHOD AND APPARATUS FOR PROTECTING AN INTEGRATED CIRCUIT FROM ERRONEOUS OPERATION

Patent #:	7354814	Issue Dt:	04/08/2008	Application #:	10949057	Filing Dt:	09/23/2004
Publication #:	US20060063320	Pub Dt:	03/23/2006
Title:	SEMICONDUCTOR PROCESS WITH FIRST TRANSISTOR TYPES ORIENTED IN A FIRST PLANE AND SECOND TRANSISTOR TYPES ORIENTED IN A SECOND PLANE

Patent #:	6969883	Issue Dt:	11/29/2005	Application #:	10950855	Filing Dt:	09/27/2004
Publication #:	US20050041503	Pub Dt:	02/24/2005
Title:	NON-VOLATILE MEMORY HAVING A REFERENCE TRANSISTOR

Patent #:	7067868	Issue Dt:	06/27/2006	Application #:	10952676	Filing Dt:	09/29/2004
Publication #:	US20060065927	Pub Dt:	03/30/2006
Title:	DOUBLE GATE DEVICE HAVING A HETEROJUNCTION SOURCE/DRAIN AND STRAINED CHANNEL

Patent #:	7352793	Issue Dt:	04/01/2008	Application #:	10952813	Filing Dt:	09/30/2004
Publication #:	US20060067450	Pub Dt:	03/30/2006
Title:	SYSTEM AND METHOD FOR ULTRA WIDEBAND COMMUNICATIONS USING MULTIPLE CODE WORDS

Patent #:	7018901	Issue Dt:	03/28/2006	Application #:	10954121	Filing Dt:	09/29/2004
Publication #:	US20060068553	Pub Dt:	03/30/2006
Title:	METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A STRAINED CHANNEL AND A HETEROJUNCTION SOURCE/DRAIN

Patent #:	7074713	Issue Dt:	07/11/2006	Application #:	10954400	Filing Dt:	09/30/2004
Publication #:	US20060073698	Pub Dt:	04/06/2006
Title:	PLASMA ENHANCED NITRIDE LAYER

Patent #:	7439718	Issue Dt:	10/21/2008	Application #:	10954793	Filing Dt:	09/30/2004
Publication #:	US20060072253	Pub Dt:	04/06/2006
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Patent #:	7130943	Issue Dt:	10/31/2006	Application #:	10954809	Filing Dt:	09/30/2004
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Title:	APPARATUS AND METHOD FOR PROVIDING INFORMATION TO A CACHE MODULE USING FETCH BURSTS

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Title:	INTEGRATED CIRCUIT FUSES HAVING CORRESPONDING STORAGE CIRCUITRY

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Title:	DATA PROCESSING SYSTEM WITH BUS ACCESS RETRACTION

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Title:	ISOLATION TRENCH PERIMETER IMPLANT FOR THRESHOLD VOLTAGE CONTROL

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Title:	METHOD FOR FORMING A MULTI-BIT NON-VOLATILE MEMORY DEVICE

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100

Patent #:	7084698	Issue Dt:	08/01/2006	Application #:	10964793	Filing Dt:	10/14/2004
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Title:	BAND-GAP REFERENCE CIRCUIT

Assignor

MORGAN STANLEY SENIOR FUNDING, INC.

Exec Dt:

02/17/2019

Assignee

SHENZHEN XINGUODU TECHNOLOGY CO., LTD.

17TH FLOOR, JINSONG MANSION,TERRA INDUSTRIAL & TRADE PARK, FUTIAN

SHENZHEN, CHINA

Correspondence name and address
	LENA LAM
	JINSONG MANSION,TERRA INDUSTRIAL & TRADE PARK
	SHENZHEN, 518000 CHINA

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