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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:041706/0001   Pages: 1061
Recorded: 02/01/2017
Attorney Dkt #:500733US
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
NONE
Issue Dt:
Application #:
10695125
Filing Dt:
10/28/2003
Publication #:
Pub Dt:
04/28/2005
Title:
Classification of speech and music using zero crossing
2
Patent #:
Issue Dt:
04/19/2005
Application #:
10695180
Filing Dt:
10/28/2003
Publication #:
Pub Dt:
05/06/2004
Title:
HIGHLY STABLE INTEGRATED TIME REFERENCE
3
Patent #:
Issue Dt:
05/02/2006
Application #:
10695313
Filing Dt:
10/28/2003
Publication #:
Pub Dt:
06/10/2004
Title:
GIGABIT ETHERNET TRANSCEIVER WITH ANALOG FRONT END
4
Patent #:
Issue Dt:
11/11/2008
Application #:
10695458
Filing Dt:
10/29/2003
Publication #:
Pub Dt:
07/22/2004
Title:
CROSS LINK MULTIPLEXER BUS
5
Patent #:
Issue Dt:
11/11/2008
Application #:
10695498
Filing Dt:
10/29/2003
Publication #:
Pub Dt:
07/22/2004
Title:
CROSS LINK MULTIPLEXER BUS CONFIGURED TO REDUCE CROSS-TALK
6
Patent #:
Issue Dt:
12/21/2004
Application #:
10695746
Filing Dt:
10/30/2003
Publication #:
Pub Dt:
05/13/2004
Title:
LINE-DRIVER WITH POWER DOWN LOOPBACK PROTECTION
7
Patent #:
Issue Dt:
03/07/2006
Application #:
10696356
Filing Dt:
10/30/2003
Publication #:
Pub Dt:
09/02/2004
Title:
AUTOMATIC PROGRAMMING TIME SELECTION FOR ONE TIME PROGRAMMABLE MEMORY
8
Patent #:
NONE
Issue Dt:
Application #:
10697079
Filing Dt:
10/31/2003
Publication #:
Pub Dt:
12/16/2004
Title:
Memory cell for modification of revision identifier in an integrated circuit chip
9
Patent #:
Issue Dt:
08/23/2005
Application #:
10697286
Filing Dt:
10/31/2003
Publication #:
Pub Dt:
12/16/2004
Title:
MEMORY CELL FOR MODIFICATION OF DEFAULT REGISTER VALUES IN AN INTEGRATED CIRCUIT CHIP
10
Patent #:
Issue Dt:
07/18/2006
Application #:
10697289
Filing Dt:
10/31/2003
Publication #:
Pub Dt:
12/16/2004
Title:
COUPLING OF SIGNALS BETWEEN ADJACENT FUNCTIONAL BLOCKS IN AN INTEGRATED CIRCUIT CHIP
11
Patent #:
NONE
Issue Dt:
Application #:
10697620
Filing Dt:
10/29/2003
Publication #:
Pub Dt:
05/05/2005
Title:
Classification of speech and music using sub-band energy
12
Patent #:
Issue Dt:
03/13/2007
Application #:
10697670
Filing Dt:
10/29/2003
Publication #:
Pub Dt:
05/05/2005
Title:
HIGH QUALITY AUDIO CONFERENCING WITH ADAPTIVE BEAMFORMING
13
Patent #:
Issue Dt:
03/11/2008
Application #:
10697889
Filing Dt:
10/31/2003
Publication #:
Pub Dt:
12/16/2004
Title:
METHOD FOR MANUFACTURING A MEMORY CELL FOR MODIFICATION OF REVISION IDENTIFIER IN AN INTEGRATED CIRCUIT CHIP
14
Patent #:
NONE
Issue Dt:
Application #:
10698055
Filing Dt:
10/30/2003
Publication #:
Pub Dt:
05/05/2005
Title:
DOCSIS MAC layer-based ARQ for fixed wireless
15
Patent #:
Issue Dt:
07/25/2006
Application #:
10698246
Filing Dt:
10/31/2003
Title:
CAM-BASED SEARCH ENGINES AND PACKET COPROCESSORS HAVING RESULTS STATUS SIGNALING FOR COMPLETED CONTEXTS
16
Patent #:
Issue Dt:
04/22/2008
Application #:
10698861
Filing Dt:
11/03/2003
Publication #:
Pub Dt:
11/18/2004
Title:
METHOD OF AND SYSTEM FOR OPTIMIZING THE CAPACITY OF A DIGITAL COMMUNICATION SYSTEM IN PRESENCE OF BOTH INTERNAL AND EXTERNAL NOISE
17
Patent #:
Issue Dt:
08/15/2006
Application #:
10700275
Filing Dt:
11/03/2003
Publication #:
Pub Dt:
05/27/2004
Title:
TIMING RECOVERY SYSTEM FOR A MULTI-PAIR GIGABIT TRANSCEIVER
18
Patent #:
Issue Dt:
01/18/2005
Application #:
10700443
Filing Dt:
11/05/2003
Publication #:
Pub Dt:
05/13/2004
Title:
METHODS AND SYSTEMS FOR SENSING AND COMPENSATING FOR PROCESS, VOLTAGE, TEMPERATURE, AND LOAD VARIATIONS
19
Patent #:
Issue Dt:
12/15/2009
Application #:
10700722
Filing Dt:
11/03/2003
Title:
MULTIPLE STRING SEARCHING USING CONTENT ADDRESSABLE MEMORY
20
Patent #:
Issue Dt:
11/22/2005
Application #:
10701048
Filing Dt:
11/04/2003
Title:
CONTENT ADDRESSABLE MEMORY (CAM) DEVICES THAT UTILIZE SEGMENTED MATCH LINES AND WORD LINES TO SUPPORT PIPELINED SEARCH AND WRITE OPERATIONS AND METHODS OF OPERATING SAME
21
Patent #:
Issue Dt:
08/19/2008
Application #:
10701575
Filing Dt:
11/05/2003
Publication #:
Pub Dt:
05/05/2005
Title:
ATTENUATION OF HIGH-POWER INBOUND RF SIGNALS BASED ON ATTENUATION OF A T/R SWITCH
22
Patent #:
NONE
Issue Dt:
Application #:
10701865
Filing Dt:
11/05/2003
Publication #:
Pub Dt:
06/17/2004
Title:
Hierarchical data collection network supporting packetized voice communications among wireless terminals and telephones
23
Patent #:
Issue Dt:
10/07/2008
Application #:
10702326
Filing Dt:
11/06/2003
Publication #:
Pub Dt:
03/31/2005
Title:
SECURE VERIFICATION USING A SET-TOP-BOX CHIP
24
Patent #:
Issue Dt:
02/14/2006
Application #:
10702402
Filing Dt:
11/05/2003
Publication #:
Pub Dt:
05/05/2005
Title:
RFIC DIE-PACKAGE CONFIGURATION
25
Patent #:
NONE
Issue Dt:
Application #:
10703138
Filing Dt:
11/05/2003
Publication #:
Pub Dt:
07/29/2004
Title:
Method and apparatus for rake combining based upon signal to interference noise ratio
26
Patent #:
Issue Dt:
05/10/2005
Application #:
10703286
Filing Dt:
11/07/2003
Publication #:
Pub Dt:
05/13/2004
Title:
INTERSPERSED TRAINING FOR TURBO CODED MODULATION
27
Patent #:
Issue Dt:
01/04/2011
Application #:
10703332
Filing Dt:
11/07/2003
Publication #:
Pub Dt:
02/17/2005
Title:
LINE ADDRESS COMPUTER FOR CALCULATING THE LINE ADDRESSES OF DECODED VIDEO DATA
28
Patent #:
Issue Dt:
10/30/2007
Application #:
10703359
Filing Dt:
11/06/2003
Publication #:
Pub Dt:
05/12/2005
Title:
METHOD AND APPARATUS FOR BANDWIDTH-EFFICIENT MULTICAST IN ETHERNET PASSIVE OPTICAL NETWORKS
29
Patent #:
Issue Dt:
01/01/2008
Application #:
10703523
Filing Dt:
11/10/2003
Publication #:
Pub Dt:
05/13/2004
Title:
METHOD AND APPARATUS FOR SHARED BUFFER PACKET SWITCHING
30
Patent #:
Issue Dt:
12/20/2005
Application #:
10703729
Filing Dt:
11/07/2003
Publication #:
Pub Dt:
10/14/2004
Title:
TESTING OF INTEGRATED CIRCUITS FROM DESIGN DOCUMENTATION
31
Patent #:
Issue Dt:
11/10/2009
Application #:
10703842
Filing Dt:
11/07/2003
Publication #:
Pub Dt:
05/12/2005
Title:
METHOD AND APPARATUS FOR ENHANCED HASHING
32
Patent #:
Issue Dt:
04/17/2007
Application #:
10704834
Filing Dt:
11/10/2003
Publication #:
Pub Dt:
09/16/2004
Title:
DECODING A RECEIVED BCH ENCODED SIGNAL
33
Patent #:
Issue Dt:
05/03/2011
Application #:
10704891
Filing Dt:
11/10/2003
Publication #:
Pub Dt:
05/20/2004
Title:
SYSTEM AND METHOD FOR MANAGING MEMORY
34
Patent #:
Issue Dt:
02/22/2005
Application #:
10704901
Filing Dt:
11/12/2003
Publication #:
Pub Dt:
08/12/2004
Title:
METHODS AND SYSTEMS FOR PROVIDING LOAD-ADAPTIVE OUTPUT CURRENT DRIVE
35
Patent #:
Issue Dt:
05/31/2005
Application #:
10704915
Filing Dt:
11/12/2003
Publication #:
Pub Dt:
06/24/2004
Title:
COMPACT BALUN WITH REJECTION FILTER FOR 802.11A AND 802.11B SIMULTANEOUS OPERATION
36
Patent #:
Issue Dt:
06/26/2007
Application #:
10704954
Filing Dt:
11/10/2003
Publication #:
Pub Dt:
09/09/2004
Title:
PARALLEL DECODING OF A BCH ENCODED SIGNAL
37
Patent #:
Issue Dt:
01/04/2005
Application #:
10706169
Filing Dt:
11/12/2003
Title:
LOW MEMORY AND MIPS EFFICIENT TECHNIQUE FOR DECODING HUFFMAN CODES USING MULTI-STAGE, MULTI-BITS LOOKUP AT DIFFERENT LEVELS
38
Patent #:
Issue Dt:
01/18/2005
Application #:
10706218
Filing Dt:
11/12/2003
Publication #:
Pub Dt:
06/03/2004
Title:
SYSTEM AND METHOD TO REDUCE NOISE IN A SUBSTRATE
39
Patent #:
Issue Dt:
07/20/2010
Application #:
10706285
Filing Dt:
11/13/2003
Publication #:
Pub Dt:
07/22/2004
Title:
APPARATUS AND METHOD FOR LATENCY CONTROL IN A COMMUNICATIONS SYSTEM
40
Patent #:
NONE
Issue Dt:
Application #:
10706425
Filing Dt:
11/12/2003
Publication #:
Pub Dt:
07/29/2004
Title:
Hierarchical data collection network supporting packetized voice communications among wireless terminals and telephones
41
Patent #:
Issue Dt:
09/20/2005
Application #:
10712383
Filing Dt:
11/12/2003
Publication #:
Pub Dt:
06/03/2004
Title:
SYNCHRONOUS CONTROLLED, SELF-TIMED LOCAL SRAM BLOCK
42
Patent #:
Issue Dt:
06/03/2008
Application #:
10712482
Filing Dt:
11/13/2003
Publication #:
Pub Dt:
02/17/2005
Title:
PIXEL REORDERING AND SELECTION LOGIC
43
Patent #:
Issue Dt:
03/20/2007
Application #:
10712638
Filing Dt:
11/13/2003
Publication #:
Pub Dt:
02/17/2005
Title:
LINE ADDRESS COMPUTER FOR PROVIDING COEFFICIENTS TO A CHROMA FILTER
44
Patent #:
Issue Dt:
01/31/2006
Application #:
10712807
Filing Dt:
11/13/2003
Publication #:
Pub Dt:
05/19/2005
Title:
METHOD AND APPARATUS FOR MONITORING THE INTEGRITY OF SATELLITE TRACKING DATA USED BY A REMOTE RECEIVER
45
Patent #:
Issue Dt:
02/21/2006
Application #:
10712809
Filing Dt:
11/13/2003
Publication #:
Pub Dt:
07/08/2004
Title:
APPARATUS AND METHOD FOR BLENDING GRAPHICS AND VIDEO SURFACES
46
Patent #:
Issue Dt:
11/07/2006
Application #:
10713185
Filing Dt:
11/15/2003
Title:
LOW POWER CONTENT ADDRESSABLE MEMORY
47
Patent #:
Issue Dt:
01/02/2007
Application #:
10713400
Filing Dt:
11/14/2003
Publication #:
Pub Dt:
09/02/2004
Title:
METHOD, APPARATUS AND SYSTEM FOR HIGH-SPEED TRANSMISSION ON FIBER OPTIC CHANNEL
48
Patent #:
Issue Dt:
03/10/2009
Application #:
10713415
Filing Dt:
11/14/2003
Publication #:
Pub Dt:
05/19/2005
Title:
METHOD AND SYSTEM FOR SECURE KEY GENERATION
49
Patent #:
Issue Dt:
08/11/2009
Application #:
10713449
Filing Dt:
11/14/2003
Publication #:
Pub Dt:
08/05/2004
Title:
METHOD, APPARATUS AND SYSTEM FOR HIGH-SPEED TRANSMISSION ON FIBER OPTIC CHANNEL
50
Patent #:
Issue Dt:
10/24/2006
Application #:
10713450
Filing Dt:
11/14/2003
Publication #:
Pub Dt:
07/22/2004
Title:
METHOD, APPARATUS AND SYSTEM FOR HIGH-SPEED TRANSMISSION ON FIBER OPTIC CHANNEL
51
Patent #:
NONE
Issue Dt:
Application #:
10714216
Filing Dt:
11/14/2003
Publication #:
Pub Dt:
05/19/2005
Title:
Last frame repeat
52
Patent #:
NONE
Issue Dt:
Application #:
10714375
Filing Dt:
11/14/2003
Publication #:
Pub Dt:
10/04/2012
Title:
Method, apparatus and system for high-speed transmission on fiber optic channel
53
Patent #:
Issue Dt:
10/10/2006
Application #:
10714680
Filing Dt:
11/14/2003
Title:
CAM-BASED SEARCH ENGINES HAVING PER ENTRY AGE REPORTING CAPABILITY
54
Patent #:
Issue Dt:
11/23/2004
Application #:
10714745
Filing Dt:
11/17/2003
Publication #:
Pub Dt:
05/20/2004
Title:
DYNAMIC SCAN CIRCUITRY FOR B-PHASE
55
Patent #:
Issue Dt:
11/27/2007
Application #:
10714833
Filing Dt:
11/14/2003
Publication #:
Pub Dt:
02/24/2005
Title:
LINE ADDRESS COMPUTER FOR PROVIDING LINE ADDRESSES IN MULTIPLE CONTEXTS FOR INTERLACED TO PROGRESSIVE CONVERSION
56
Patent #:
Issue Dt:
08/15/2006
Application #:
10715054
Filing Dt:
11/17/2003
Publication #:
Pub Dt:
05/20/2004
Title:
BUS SAMPLING ON ONE EDGE OF A CLOCK SIGNAL AND DRIVING ON ANOTHER EDGE
57
Patent #:
NONE
Issue Dt:
Application #:
10715064
Filing Dt:
11/17/2003
Publication #:
Pub Dt:
04/28/2005
Title:
Calculation of gray codes using exhaustive combinations
58
Patent #:
Issue Dt:
02/22/2005
Application #:
10715311
Filing Dt:
11/17/2003
Publication #:
Pub Dt:
05/27/2004
Title:
CIRCUIT FOR LINES WITH MULTIPLE DRIVERS
59
Patent #:
Issue Dt:
12/07/2010
Application #:
10716008
Filing Dt:
11/18/2003
Publication #:
Pub Dt:
01/06/2005
Title:
SYSTEM AND METHOD FOR EFFICIENTLY STORING MACROBLOCKS IN SD-RAM
60
Patent #:
Issue Dt:
09/19/2006
Application #:
10716066
Filing Dt:
11/18/2003
Publication #:
Pub Dt:
01/13/2005
Title:
SCHEME FOR OPTIMAL SETTINGS FOR DDR INTERFACE
61
Patent #:
Issue Dt:
12/14/2004
Application #:
10716140
Filing Dt:
11/18/2003
Publication #:
Pub Dt:
05/27/2004
Title:
CONTENT ADDRESSABLE MEMORY WITH CONFIGURABLE CLASS-BASED STORAGE PARTITION
62
Patent #:
Issue Dt:
04/28/2009
Application #:
10716288
Filing Dt:
11/18/2003
Publication #:
Pub Dt:
02/17/2005
Title:
STORING MACROBLOCKS FOR CONCATENATED FRAMES
63
Patent #:
Issue Dt:
05/22/2012
Application #:
10716529
Filing Dt:
11/20/2003
Publication #:
Pub Dt:
02/10/2005
Title:
SYSTEM AND METHOD FOR LINKING LIST TRANSMIT QUEUE MANAGEMENT
64
Patent #:
Issue Dt:
11/08/2005
Application #:
10717127
Filing Dt:
11/19/2003
Publication #:
Pub Dt:
06/03/2004
Title:
ADAPTIVELY CONFIGURABLE CLASS-A/CLASS-B TRANSMIT DAC FOR TRANSCEIVER EMISSION AND POWER CONSUMPTION CONTROL
65
Patent #:
Issue Dt:
02/02/2010
Application #:
10717418
Filing Dt:
11/19/2003
Publication #:
Pub Dt:
05/05/2005
Title:
REDUCTION OF MEMORY REQUIREMENTS BY DE-INTERLEAVING AUDIO SAMPLES WITH TWO BUFFERS
66
Patent #:
Issue Dt:
04/18/2006
Application #:
10718894
Filing Dt:
11/21/2003
Publication #:
Pub Dt:
06/17/2004
Title:
GENERALIZED CONVOLUTIONAL INTERLEAVER/DE-INTERLEAVER
67
Patent #:
Issue Dt:
03/20/2007
Application #:
10719099
Filing Dt:
11/22/2003
Title:
CONTENT ADDRESSABLE MEMORY DEVICE
68
Patent #:
Issue Dt:
05/17/2011
Application #:
10719890
Filing Dt:
11/21/2003
Publication #:
Pub Dt:
05/26/2005
Title:
METHOD AND APPARATUS FOR DISTRIBUTION OF SATELLITE NAVIGATION DATA
69
Patent #:
Issue Dt:
03/15/2005
Application #:
10720144
Filing Dt:
11/25/2003
Publication #:
Pub Dt:
07/22/2004
Title:
CLASS AB DIGITAL TO ANALOG CONVERTER/LINE DRIVER
70
Patent #:
Issue Dt:
03/20/2007
Application #:
10721036
Filing Dt:
11/21/2003
Title:
CAM-BASED SEARCH ENGINE DEVICES HAVING ADVANCED SEARCH AND LEARN INSTRUCTION HANDLING
71
Patent #:
Issue Dt:
10/28/2008
Application #:
10721445
Filing Dt:
11/24/2003
Publication #:
Pub Dt:
05/26/2005
Title:
METHOD AND APPARATUS FOR COMMUNICATION IN THE PRESENCE OF IMPULSE NOISE
72
Patent #:
Issue Dt:
02/27/2007
Application #:
10723574
Filing Dt:
11/26/2003
Publication #:
Pub Dt:
02/03/2005
Title:
LDPC (LOW DENSITY PARITY CHECK) CODED MODULATION HYBRID DECODING
73
Patent #:
Issue Dt:
11/28/2006
Application #:
10724036
Filing Dt:
12/01/2003
Publication #:
Pub Dt:
06/17/2004
Title:
RECEIVER HAVING DECISIONAL FEEDBACK EQUALIZER WITH REMODULATION AND RELATED METHODS
74
Patent #:
Issue Dt:
05/20/2008
Application #:
10725008
Filing Dt:
12/02/2003
Publication #:
Pub Dt:
09/02/2004
Title:
METHOD OF AND SYSTEM FOR PERFORMING DIFFERENTIAL LOSSLESS COMPRESSION
75
Patent #:
NONE
Issue Dt:
Application #:
10725771
Filing Dt:
12/02/2003
Publication #:
Pub Dt:
05/05/2005
Title:
Reduction of memory requirements by overlaying buffers
76
Patent #:
Issue Dt:
12/13/2011
Application #:
10725974
Filing Dt:
12/02/2003
Publication #:
Pub Dt:
05/05/2005
Title:
VIDEO DISPLAY AND DECODE UTILIZING OFF-CHIP PROCESSOR AND DRAM
77
Patent #:
Issue Dt:
11/07/2006
Application #:
10726180
Filing Dt:
12/02/2003
Publication #:
Pub Dt:
05/05/2005
Title:
SYSTEM, METHOD, AND APPARATUS FOR DISPLAY MANAGER
78
Patent #:
NONE
Issue Dt:
Application #:
10726342
Filing Dt:
12/03/2003
Publication #:
Pub Dt:
09/23/2004
Title:
Free pointer pool implementation
79
Patent #:
Issue Dt:
12/14/2010
Application #:
10726814
Filing Dt:
12/03/2003
Publication #:
Pub Dt:
06/17/2004
Title:
PROCESSING HIGH DEFINITION VIDEO DATA
80
Patent #:
Issue Dt:
02/06/2007
Application #:
10727378
Filing Dt:
12/04/2003
Publication #:
Pub Dt:
06/17/2004
Title:
METHOD OF MANUFACTURING AN ON-CHIP TRANSFORMER BALUN
81
Patent #:
NONE
Issue Dt:
Application #:
10727379
Filing Dt:
12/04/2003
Publication #:
Pub Dt:
06/17/2004
Title:
Method of manufacture an on-chip inductor having a square geometry and high Q factor
82
Patent #:
Issue Dt:
08/15/2006
Application #:
10727380
Filing Dt:
12/04/2003
Publication #:
Pub Dt:
06/09/2005
Title:
LOW LOSS DIVERSITY ANTENNA T/R SWITCH
83
Patent #:
Issue Dt:
08/08/2006
Application #:
10727422
Filing Dt:
12/04/2003
Publication #:
Pub Dt:
06/10/2004
Title:
ON-CHIP MULTIPLE TAP TRANSFORMER AND INDUCTOR
84
Patent #:
Issue Dt:
09/08/2009
Application #:
10727430
Filing Dt:
12/04/2003
Publication #:
Pub Dt:
07/22/2004
Title:
DATA PATH SECURITY PROCESSING
85
Patent #:
Issue Dt:
08/15/2006
Application #:
10727431
Filing Dt:
12/04/2003
Publication #:
Pub Dt:
06/10/2004
Title:
ON-CHIP DIFFERENTIAL MULTI-LAYER INDUCTOR
86
Patent #:
Issue Dt:
04/21/2015
Application #:
10728192
Filing Dt:
12/04/2003
Publication #:
Pub Dt:
07/15/2004
Title:
TAGGING MECHANISM FOR DATA PATH SECURITY PROCESSING
87
Patent #:
Issue Dt:
11/16/2004
Application #:
10728201
Filing Dt:
12/04/2003
Publication #:
Pub Dt:
04/29/2004
Title:
APPLICATIONS OF A DIFFERENTIAL LATCH
88
Patent #:
Issue Dt:
10/02/2007
Application #:
10729275
Filing Dt:
12/05/2003
Publication #:
Pub Dt:
06/17/2004
Title:
MANAGING MULTI-COMPONENT DATA
89
Patent #:
Issue Dt:
02/13/2007
Application #:
10729405
Filing Dt:
12/05/2003
Publication #:
Pub Dt:
06/24/2004
Title:
BLOCK REDUNDANCY IMPLEMENTATION IN HEIRARCHICAL RAM'S
90
Patent #:
Issue Dt:
09/01/2009
Application #:
10729443
Filing Dt:
12/05/2003
Publication #:
Pub Dt:
06/17/2004
Title:
MANAGING BURSTS OF DATA
91
Patent #:
Issue Dt:
05/03/2005
Application #:
10730093
Filing Dt:
12/09/2003
Publication #:
Pub Dt:
06/17/2004
Title:
METHOD FOR MAKING AN ENHANCED DIE-UP BALL GRID ARRAY PACKAGE WITH TWO SUBSTRATES
92
Patent #:
Issue Dt:
06/15/2010
Application #:
10730405
Filing Dt:
12/08/2003
Publication #:
Pub Dt:
06/17/2004
Title:
PROCESSING DATA STREAMS
93
Patent #:
Issue Dt:
08/09/2005
Application #:
10731078
Filing Dt:
12/09/2003
Publication #:
Pub Dt:
06/24/2004
Title:
DYNAMIC REGISTER WITH LOW CLOCK RATE TESTING CAPABILITY
94
Patent #:
Issue Dt:
07/12/2005
Application #:
10731667
Filing Dt:
12/09/2003
Publication #:
Pub Dt:
06/24/2004
Title:
ANALOG TO DIGITAL CONVERTER THAT SERVICES VOICE COMMUNICATIONS
95
Patent #:
Issue Dt:
01/16/2007
Application #:
10731803
Filing Dt:
12/09/2003
Publication #:
Pub Dt:
06/24/2004
Title:
EDGE INCREMENTAL REDUNDANCY SUPPORT IN A CELLULAR WIRELESS TERMINAL
96
Patent #:
Issue Dt:
09/18/2007
Application #:
10731804
Filing Dt:
12/09/2003
Publication #:
Pub Dt:
06/24/2004
Title:
EDGE INCREMENTAL REDUNDANCY MEMORY STRUCTURE AND MEMORY MANAGEMENT
97
Patent #:
Issue Dt:
04/11/2006
Application #:
10731858
Filing Dt:
12/09/2003
Publication #:
Pub Dt:
06/24/2004
Title:
PIPELINE ARCHITECTURE FOR MULTI-SLOT WIRELESS LINK PROCESSING
98
Patent #:
Issue Dt:
07/18/2006
Application #:
10733823
Filing Dt:
12/11/2003
Publication #:
Pub Dt:
06/24/2004
Title:
FORWARD ERROR CORRECTOR
99
Patent #:
Issue Dt:
08/23/2011
Application #:
10733856
Filing Dt:
12/11/2003
Publication #:
Pub Dt:
09/23/2004
Title:
SYNCHRONIZATION OF MULTIPLE PROCESSORS IN A MULTI-MODE WIRELESS COMMUNICATION DEVICE
100
Patent #:
Issue Dt:
04/16/2013
Application #:
10733861
Filing Dt:
12/11/2003
Publication #:
Pub Dt:
09/09/2004
Title:
Multi-processor platform for wireless communication terminal having partitioned protocol stack
Assignor
1
Exec Dt:
01/20/2017
Assignee
1
1 YISHUN AVENUE 7
., SINGAPORE 768923
Correspondence name and address
OBLON, ET AL.
1940 DUKE STREET
ALEXANDRIA, VA 22314

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