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Reel/Frame:054633/0001   Pages: 1245
Recorded: 11/02/2020
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 8468
Page 29 of 85
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85
1
Patent #:
8538740
Issue Dt:
09/17/2013
Application #:
12579124
Filing Dt:
10/14/2009
Publication #:
US20110087469
Pub Dt:
04/14/2011
Title:
REAL-TIME PERFORMANCE MODELING OF SOFTWARE SYSTEMS WITH MULTI-CLASS WORKLOAD
2
Patent #:
8268679
Issue Dt:
09/18/2012
Application #:
12579654
Filing Dt:
10/15/2009
Publication #:
US20100107403
Pub Dt:
05/06/2010
Title:
SEMICONDUCTOR DEVICE COMPRISING EFUSES OF ENHANCED PROGRAMMING EFFICIENCY
3
Patent #:
8327302
Issue Dt:
12/04/2012
Application #:
12580330
Filing Dt:
10/16/2009
Publication #:
US20110093825
Pub Dt:
04/21/2011
Title:
TECHNIQUES FOR ANALYSIS OF LOGIC DESIGNS WITH TRANSIENT LOGIC
4
Patent #:
8207027
Issue Dt:
06/26/2012
Application #:
12603838
Filing Dt:
10/22/2009
Publication #:
US20100041198
Pub Dt:
02/18/2010
Title:
TRIPLE GATE AND DOUBLE GATE FINFETS WITH DIFFERENT VERTICAL DIMENSION FINS
5
Patent #:
7954021
Issue Dt:
05/31/2011
Application #:
12604614
Filing Dt:
10/23/2009
Publication #:
US20110099419
Pub Dt:
04/28/2011
Title:
SOLID STATE DRIVE WITH FLASH SPARING
6
Patent #:
8883610
Issue Dt:
11/11/2014
Application #:
12604703
Filing Dt:
10/23/2009
Publication #:
US20100133648
Pub Dt:
06/03/2010
Title:
MICROSTRUCTURE DEVICE INCLUDING A METALLIZATION STRUCTURE WITH SELF-ALIGNED AIR GAPS BETWEEN CLOSELY SPACED METAL LINES
7
Patent #:
8614492
Issue Dt:
12/24/2013
Application #:
12605523
Filing Dt:
10/26/2009
Publication #:
US20110095267
Pub Dt:
04/28/2011
Title:
NANOWIRE STRESS SENSORS, STRESS SENSOR INTEGRATED CIRCUITS, AND DESIGN STRUCTURES FOR A STRESS SENSOR INTEGRATED CIRCUIT
8
Patent #:
8035141
Issue Dt:
10/11/2011
Application #:
12607104
Filing Dt:
10/28/2009
Publication #:
US20110095343
Pub Dt:
04/28/2011
Title:
BI-LAYER NFET EMBEDDED STRESSOR ELEMENT AND INTEGRATION TO ENHANCE DRIVE CURRENT
9
Patent #:
8159060
Issue Dt:
04/17/2012
Application #:
12608368
Filing Dt:
10/29/2009
Publication #:
US20110101537
Pub Dt:
05/05/2011
Title:
HYBRID BONDING INTERFACE FOR 3-DIMENSIONAL CHIP INTEGRATION
10
Patent #:
7961996
Issue Dt:
06/14/2011
Application #:
12608518
Filing Dt:
10/29/2009
Publication #:
US20100046883
Pub Dt:
02/25/2010
Title:
COUPLING DEVICE FOR USE IN OPTICAL WAVEGUIDES
11
Patent #:
8781792
Issue Dt:
07/15/2014
Application #:
12610291
Filing Dt:
10/31/2009
Publication #:
US20110106497
Pub Dt:
05/05/2011
Title:
Yield Computation and Optimization for Selective Voltage Binning
12
Patent #:
8614435
Issue Dt:
12/24/2013
Application #:
12611421
Filing Dt:
11/03/2009
Publication #:
US20110101308
Pub Dt:
05/05/2011
Title:
UTILIZATION OF ORGANIC BUFFER LAYER TO FABRICATE HIGH PERFORMANCE CARBON NANOELECTRONIC DEVICES
13
Patent #:
8210741
Issue Dt:
07/03/2012
Application #:
12611519
Filing Dt:
11/03/2009
Publication #:
US20100046574
Pub Dt:
02/25/2010
Title:
APPARATUS FOR THERMAL CHARACTERIZATION UNDER NON-UNIFORM HEAT LOAD
14
Patent #:
8689180
Issue Dt:
04/01/2014
Application #:
12611561
Filing Dt:
11/03/2009
Publication #:
US20110107297
Pub Dt:
05/05/2011
Title:
SYSTEMS AND METHODS FOR RESOURCE LEAK DETECTION
15
Patent #:
8514374
Issue Dt:
08/20/2013
Application #:
12611947
Filing Dt:
11/04/2009
Publication #:
US20110102760
Pub Dt:
05/05/2011
Title:
ALIGNMENT METHOD FOR SEMICONDUCTOR PROCESSING
16
Patent #:
7829427
Issue Dt:
11/09/2010
Application #:
12612743
Filing Dt:
11/05/2009
Publication #:
US20100047990
Pub Dt:
02/25/2010
Title:
METHOD OF FABRICATING A HIGH Q FACTOR INTEGRATED CIRCUIT INDUCTOR
17
Patent #:
8298948
Issue Dt:
10/30/2012
Application #:
12613551
Filing Dt:
11/06/2009
Publication #:
US20110108990
Pub Dt:
05/12/2011
Title:
CAPPING OF COPPER INTERCONNECT LINES IN INTEGRATED CIRCUIT DEVICES
18
Patent #:
8587063
Issue Dt:
11/19/2013
Application #:
12613574
Filing Dt:
11/06/2009
Publication #:
US20110108943
Pub Dt:
05/12/2011
Title:
HYBRID DOUBLE BOX BACK GATE SILICON-ON-INSULATOR WAFERS WITH ENHANCED MOBILITY CHANNELS
19
Patent #:
8263879
Issue Dt:
09/11/2012
Application #:
12614224
Filing Dt:
11/06/2009
Publication #:
US20110108316
Pub Dt:
05/12/2011
Title:
AXIOCENTRIC SCRUBBING LAND GRID ARRAY CONTACTS AND METHODS FOR FABRICATION
20
Patent #:
7993999
Issue Dt:
08/09/2011
Application #:
12614906
Filing Dt:
11/09/2009
Publication #:
US20110108920
Pub Dt:
05/12/2011
Title:
HIGH-K/METAL GATE CMOS FINFET WITH IMPROVED PFET THRESHOLD VOLTAGE
21
Patent #:
9064717
Issue Dt:
06/23/2015
Application #:
12615175
Filing Dt:
11/09/2009
Publication #:
US20110111560
Pub Dt:
05/12/2011
Title:
Lock and Key Through-Via Method for Wafer Level 3D Integration and Structures Produced Thereby
22
Patent #:
8120179
Issue Dt:
02/21/2012
Application #:
12615354
Filing Dt:
11/10/2009
Publication #:
US20110108992
Pub Dt:
05/12/2011
Title:
AIR GAP INTERCONNECT STRUCTURES AND METHODS FOR FORMING THE SAME
23
Patent #:
8314983
Issue Dt:
11/20/2012
Application #:
12615358
Filing Dt:
11/10/2009
Publication #:
US20110109952
Pub Dt:
05/12/2011
Title:
NONVOLATILE NANO-ELECTROMECHANICAL SYSTEM DEVICE
24
Patent #:
7939446
Issue Dt:
05/10/2011
Application #:
12616259
Filing Dt:
11/11/2009
Publication #:
US20110108989
Pub Dt:
05/12/2011
Title:
PROCESS FOR REVERSING TONE OF PATTERNS ON INTEGERATED CIRCUIT AND STRUCTURAL PROCESS FOR NANOSCALE FABRICATION
25
Patent #:
8255346
Issue Dt:
08/28/2012
Application #:
12616534
Filing Dt:
11/11/2009
Publication #:
US20110112998
Pub Dt:
05/12/2011
Title:
METHODS AND SYSTEMS FOR VARIABLE GROUP SELECTION AND TEMPORAL CAUSAL MODELING
26
Patent #:
8541275
Issue Dt:
09/24/2013
Application #:
12616941
Filing Dt:
11/12/2009
Publication #:
US20110108921
Pub Dt:
05/12/2011
Title:
SINGLE METAL GATE CMOS INTEGRATION BY INTERMIXING POLARITY SPECIFIC CAPPING LAYERS
27
Patent #:
8530971
Issue Dt:
09/10/2013
Application #:
12617084
Filing Dt:
11/12/2009
Publication #:
US20110108930
Pub Dt:
05/12/2011
Title:
BORDERLESS CONTACTS FOR SEMICONDUCTOR DEVICES
28
Patent #:
8106383
Issue Dt:
01/31/2012
Application #:
12617770
Filing Dt:
11/13/2009
Publication #:
US20110114919
Pub Dt:
05/19/2011
Title:
SELF-ALIGNED GRAPHENE TRANSISTOR
29
Patent #:
8492838
Issue Dt:
07/23/2013
Application #:
12618871
Filing Dt:
11/16/2009
Publication #:
US20110115021
Pub Dt:
05/19/2011
Title:
ISOLATION STRUCTURES FOR SOI DEVICES WITH ULTRATHIN SOI AND ULTRATHIN BOX
30
Patent #:
8063424
Issue Dt:
11/22/2011
Application #:
12618895
Filing Dt:
11/16/2009
Publication #:
US20110115004
Pub Dt:
05/19/2011
Title:
EMBEDDED PHOTODETECTOR APPARATUS IN A 3D CMOS CHIP STACK
31
Patent #:
9379028
Issue Dt:
06/28/2016
Application #:
12619285
Filing Dt:
11/16/2009
Publication #:
US20110115553
Pub Dt:
05/19/2011
Title:
SOI CMOS STRUCTURE HAVING PROGRAMMABLE FLOATING BACKPLATE
32
Patent #:
8637395
Issue Dt:
01/28/2014
Application #:
12619298
Filing Dt:
11/16/2009
Publication #:
US20110115094
Pub Dt:
05/19/2011
Title:
METHODS FOR PHOTO-PATTERNABLE LOW-K (PPLK) INTEGRATION WITH CURING AFTER PATTERN TRANSFER
33
Patent #:
8791509
Issue Dt:
07/29/2014
Application #:
12620083
Filing Dt:
11/17/2009
Publication #:
US20100133614
Pub Dt:
06/03/2010
Title:
MULTIPLE GATE TRANSISTOR HAVING HOMOGENOUSLY SILICIDED FIN END PORTIONS
34
Patent #:
8304836
Issue Dt:
11/06/2012
Application #:
12620234
Filing Dt:
11/17/2009
Publication #:
US20110115027
Pub Dt:
05/19/2011
Title:
STRUCTURE AND METHOD TO OBTAIN EOT SCALED DIELECTRIC STACKS
35
Patent #:
8673703
Issue Dt:
03/18/2014
Application #:
12620320
Filing Dt:
11/17/2009
Publication #:
US20110114918
Pub Dt:
05/19/2011
Title:
FABRICATION OF GRAPHENE NANOELECTRONIC DEVICES ON SOI STRUCTURES
36
Patent #:
7923743
Issue Dt:
04/12/2011
Application #:
12620629
Filing Dt:
11/18/2009
Publication #:
US20100065815
Pub Dt:
03/18/2010
Title:
SEMICONDUCTOR STRUCTURE INCLUDING MIXED RARE EARTH OXIDE FORMED ON SILICON
37
Patent #:
8138543
Issue Dt:
03/20/2012
Application #:
12621460
Filing Dt:
11/18/2009
Publication #:
US20110115023
Pub Dt:
05/19/2011
Title:
HYBRID FINFET/PLANAR SOI FETS
38
Patent #:
7986022
Issue Dt:
07/26/2011
Application #:
12621956
Filing Dt:
11/19/2009
Publication #:
US20110115054
Pub Dt:
05/19/2011
Title:
SEMISPHERICAL INTEGRATED CIRCUIT STRUCTURES
39
Patent #:
8129095
Issue Dt:
03/06/2012
Application #:
12622461
Filing Dt:
11/20/2009
Publication #:
US20100261095
Pub Dt:
10/14/2010
Title:
METHODS, PHOTOMASKS AND METHODS OF FABRICATING PHOTOMASKS FOR IMPROVING DAMASCENE WIRE UNIFORMITY WITHOUT REDUCING PERFORMANCE
40
Patent #:
8276002
Issue Dt:
09/25/2012
Application #:
12623462
Filing Dt:
11/23/2009
Publication #:
US20110121811
Pub Dt:
05/26/2011
Title:
POWER DELIVERY IN A HETEROGENEOUS 3-D STACKED APPARATUS
41
Patent #:
8213224
Issue Dt:
07/03/2012
Application #:
12624141
Filing Dt:
11/23/2009
Publication #:
US20110122682
Pub Dt:
05/26/2011
Title:
HIGH DENSITY LOW POWER NANOWIRE PHASE CHANGE MATERIAL MEMORY DEVICE
42
Patent #:
8011517
Issue Dt:
09/06/2011
Application #:
12624633
Filing Dt:
11/24/2009
Publication #:
US20110120941
Pub Dt:
05/26/2011
Title:
COMPOSITE MEMBRANES WITH PERFORMANCE ENHANCING LAYERS
43
Patent #:
8140034
Issue Dt:
03/20/2012
Application #:
12624677
Filing Dt:
11/24/2009
Publication #:
US20110122983
Pub Dt:
05/26/2011
Title:
FREQUENCY LOCKED FEEDBACK LOOP FOR WIRELESS COMMUNICATIONS
44
Patent #:
8381050
Issue Dt:
02/19/2013
Application #:
12625703
Filing Dt:
11/25/2009
Publication #:
US20110121838
Pub Dt:
05/26/2011
Title:
METHOD AND APPARATUS FOR INCREASED EFFECTIVENESS OF DELAY AND TRANSISTION FAULT TESTING
45
Patent #:
8338258
Issue Dt:
12/25/2012
Application #:
12625827
Filing Dt:
11/25/2009
Publication #:
US20110121370
Pub Dt:
05/26/2011
Title:
EMBEDDED STRESSOR FOR SEMICONDUCTOR STRUCTURES
46
Patent #:
7943420
Issue Dt:
05/17/2011
Application #:
12625855
Filing Dt:
11/25/2009
Publication #:
US20110121251
Pub Dt:
05/26/2011
Title:
SINGLE MASK ADDER PHASE CHANGE MEMORY ELEMENT
47
Patent #:
8344428
Issue Dt:
01/01/2013
Application #:
12627747
Filing Dt:
11/30/2009
Publication #:
US20110127637
Pub Dt:
06/02/2011
Title:
NANOPILLAR E-FUSE STRUCTURE AND PROCESS
48
Patent #:
8021949
Issue Dt:
09/20/2011
Application #:
12628663
Filing Dt:
12/01/2009
Publication #:
US20110129978
Pub Dt:
06/02/2011
Title:
METHOD AND STRUCTURE FOR FORMING FINFETS WITH MULTIPLE DOPING REGIONS ON A SAME CHIP
49
Patent #:
8173993
Issue Dt:
05/08/2012
Application #:
12630942
Filing Dt:
12/04/2009
Publication #:
US20110133169
Pub Dt:
06/09/2011
Title:
GATE-ALL-AROUND NANOWIRE TUNNEL FIELD EFFECT TRANSISTORS
50
Patent #:
8384065
Issue Dt:
02/26/2013
Application #:
12631199
Filing Dt:
12/04/2009
Publication #:
US20110133162
Pub Dt:
06/09/2011
Title:
GATE-ALL-AROUND NANOWIRE FIELD EFFECT TRANSISTORS
51
Patent #:
8313990
Issue Dt:
11/20/2012
Application #:
12631203
Filing Dt:
12/04/2009
Publication #:
US20110133163
Pub Dt:
06/09/2011
Title:
NANOWIRE FET HAVING INDUCED RADIAL STRAIN
52
Patent #:
8097515
Issue Dt:
01/17/2012
Application #:
12631213
Filing Dt:
12/04/2009
Publication #:
US20110133165
Pub Dt:
06/09/2011
Title:
SELF-ALIGNED CONTACTS FOR NANOWIRE FIELD EFFECT TRANSISTORS
53
Patent #:
8309991
Issue Dt:
11/13/2012
Application #:
12631218
Filing Dt:
12/04/2009
Publication #:
US20110133166
Pub Dt:
06/09/2011
Title:
NANOWIRE FET HAVING INDUCED RADIAL STRAIN
54
Patent #:
8107276
Issue Dt:
01/31/2012
Application #:
12631310
Filing Dt:
12/04/2009
Publication #:
US20110134676
Pub Dt:
06/09/2011
Title:
RESISTIVE MEMORY DEVICES HAVING A NOT-AND (NAND) STRUCTURE
55
Patent #:
8378448
Issue Dt:
02/19/2013
Application #:
12632030
Filing Dt:
12/07/2009
Publication #:
US20100237464
Pub Dt:
09/23/2010
Title:
CHIP INDUCTOR WITH FREQUENCY DEPENDENT INDUCTANCE
56
Patent #:
8492807
Issue Dt:
07/23/2013
Application #:
12632040
Filing Dt:
12/07/2009
Publication #:
US20110134504
Pub Dt:
06/09/2011
Title:
MICRO-ELECTRO-MECHANICAL SYSTEM TILTABLE LENS
57
Patent #:
8247947
Issue Dt:
08/21/2012
Application #:
12632154
Filing Dt:
12/07/2009
Publication #:
US20110133603
Pub Dt:
06/09/2011
Title:
COUPLING PIEZOELECTRIC MATERIAL GENERATED STRESSES TO DEVICES FORMED IN INTEGRATED CIRCUITS
58
Patent #:
8211728
Issue Dt:
07/03/2012
Application #:
12632836
Filing Dt:
12/08/2009
Publication #:
US20100243414
Pub Dt:
09/30/2010
Title:
HORIZONTAL MICRO-ELECTRO-MECHANICAL-SYSTEM SWITCH
59
Patent #:
8298902
Issue Dt:
10/30/2012
Application #:
12634742
Filing Dt:
12/10/2009
Publication #:
US20100237467
Pub Dt:
09/23/2010
Title:
INTERCONNECT STRUCTURES, METHODS FOR FABRICATING INTERCONNECT STRUCTURES, AND DESIGN STRUCTURES FOR A RADIOFREQUENCY INTEGRATED CIRCUIT
60
Patent #:
7809923
Issue Dt:
10/05/2010
Application #:
12635385
Filing Dt:
12/10/2009
Publication #:
US20100095085
Pub Dt:
04/15/2010
Title:
DIRECT MEMORY ACCESS (DMA) ADDRESS TRANSLATION IN AN INPUT/OUTPUT MEMORY MANAGEMENT UNIT (IOMMU)
61
Patent #:
8046633
Issue Dt:
10/25/2011
Application #:
12635599
Filing Dt:
12/10/2009
Publication #:
US20110145627
Pub Dt:
06/16/2011
Title:
IMPROVING DATA AVAILABILITY DURING FAILURE DETECTION AND RECOVERY PROCESSING IN A SHARED RESOURCE SYSTEM
62
Patent #:
8465647
Issue Dt:
06/18/2013
Application #:
12636426
Filing Dt:
12/11/2009
Publication #:
US20110142743
Pub Dt:
06/16/2011
Title:
ISOLATION OF SINGLE-WALLED CARBON NANOTUBES FROM DOUBLE AND MULTI-WALLED CARBON NANOTUBES
63
Patent #:
8661382
Issue Dt:
02/25/2014
Application #:
12637016
Filing Dt:
12/14/2009
Publication #:
US20110145771
Pub Dt:
06/16/2011
Title:
Modeling for Soft Error Specification
64
Patent #:
8053870
Issue Dt:
11/08/2011
Application #:
12638004
Filing Dt:
12/15/2009
Publication #:
US20110140279
Pub Dt:
06/16/2011
Title:
SEMICONDUCTOR STRUCTURE INCORPORATING MULTIPLE NITRIDE LAYERS TO IMPROVE THERMAL DISSIPATION AWAY FROM A DEVICE AND A METHOD OF FORMING THE STRUCTURE
65
Patent #:
8193086
Issue Dt:
06/05/2012
Application #:
12640444
Filing Dt:
12/17/2009
Publication #:
US20100164123
Pub Dt:
07/01/2010
Title:
LOCAL SILICIDATION OF VIA BOTTOMS IN METALLIZATION SYSTEMS OF SEMICONDUCTOR DEVICES
66
Patent #:
8821978
Issue Dt:
09/02/2014
Application #:
12641959
Filing Dt:
12/18/2009
Publication #:
US20110147983
Pub Dt:
06/23/2011
Title:
METHODS OF DIRECTED SELF-ASSEMBLY AND LAYERED STRUCTURES FORMED THEREFROM
67
Patent #:
8623458
Issue Dt:
01/07/2014
Application #:
12642018
Filing Dt:
12/18/2009
Publication #:
US20110147984
Pub Dt:
06/23/2011
Title:
METHODS OF DIRECTED SELF-ASSEMBLY, AND LAYERED STRUCTURES FORMED THEREFROM
68
Patent #:
8745850
Issue Dt:
06/10/2014
Application #:
12642331
Filing Dt:
12/18/2009
Publication #:
US20110152104
Pub Dt:
06/23/2011
Title:
METHOD OF MANUFACTURING SUPERCONDUCTING LOW PASS FILTER FOR QUANTUM COMPUTING
69
Patent #:
8564120
Issue Dt:
10/22/2013
Application #:
12642989
Filing Dt:
12/21/2009
Publication #:
US20100164093
Pub Dt:
07/01/2010
Title:
HEAT DISSIPATION IN TEMPERATURE CRITICAL DEVICE AREAS OF SEMICONDUCTOR DEVICES BY HEAT PIPES CONNECTING TO THE SUBSTRATE BACKSIDE
70
Patent #:
8450124
Issue Dt:
05/28/2013
Application #:
12648400
Filing Dt:
12/29/2009
Publication #:
US20100164530
Pub Dt:
07/01/2010
Title:
ADJUSTING CONFIGURATION OF A MULTIPLE GATE TRANSISTOR BY CONTROLLING INDIVIDUAL FINS
71
Patent #:
8346898
Issue Dt:
01/01/2013
Application #:
12648442
Filing Dt:
12/29/2009
Publication #:
US20110161429
Pub Dt:
06/30/2011
Title:
AUTOMATED RELATIONSHIP CLASSIFICATION
72
Patent #:
8338274
Issue Dt:
12/25/2012
Application #:
12648867
Filing Dt:
12/29/2009
Publication #:
US20100163939
Pub Dt:
07/01/2010
Title:
TRANSISTOR DEVICE COMPRISING AN EMBEDDED SEMICONDUCTOR ALLOY HAVING AN ASYMMETRIC CONFIGURATION
73
Patent #:
8052931
Issue Dt:
11/08/2011
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12651504
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Assignor
1
GLOBALFOUNDRIES INC.
Exec Dt:
10/22/2020
Assignee
1
GLOBALFOUNDRIES U.S. INC.
2600 GREAT AMERICA WAY
SANTA CLARA, CALIFORNIA 95054
Correspondence name and address
GLOBALFOUNDRIES SINGAPORE PTE. LTD.
60 WOODLANDS INDUSTRIAL PARK D STREET 2,
SINGAPORE, 738406 SINGAPORE

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