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|
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|
Patent #:
|
|
Issue Dt:
|
04/20/1999
|
Application #:
|
08873809
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Filing Dt:
|
06/12/1997
|
|
Title:
|
PROCESS FOR MAKING INTEGRATED CIRCUIT STRUCTURE COMPRISING LOCAL AREA INTERCONNECTS FORMED OVER SEMICONDUCTOR SUBSTRATE BY SELECTIVE DEPOSITION ON SEED LAYER IN PATTERNED TRENCH
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Patent #:
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|
Issue Dt:
|
11/16/1999
|
Application #:
|
08874055
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Filing Dt:
|
06/12/1997
|
|
Title:
|
AUTOMATED ENDPOINT DETECTION SYSTEM DURING CHEMICAL-MECHANICAL POLISHING
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|
Patent #:
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|
Issue Dt:
|
12/28/1999
|
Application #:
|
08878579
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Filing Dt:
|
06/19/1997
|
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Title:
|
DEPOSITION OF HIGHLY DOPED SILICON DIOXIDE FILMS
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|
Patent #:
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|
Issue Dt:
|
09/19/2000
|
Application #:
|
08879100
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Filing Dt:
|
06/19/1997
|
|
Title:
|
POLYMERIC DIELECTRIC LAYERS HAVING LOW DIELECTRIC CONSTANTS AND IMPROVED ADHESION TO METAL LINES
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Patent #:
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|
Issue Dt:
|
06/27/2000
|
Application #:
|
08879341
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Filing Dt:
|
06/20/1997
|
|
Title:
|
COMPOSITE TRENCH-FIN CAPACITORS FOR DRAMS
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|
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|
Patent #:
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|
Issue Dt:
|
08/03/1999
|
Application #:
|
08879659
|
Filing Dt:
|
06/23/1997
|
|
Title:
|
ETCH PROCESS SELECTIVE TO COBALT SILICIDE FOR FORMATION OF INTEGRATED CIRCUIT STRUCTURES
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|
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|
Patent #:
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|
Issue Dt:
|
10/31/2000
|
Application #:
|
08879926
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Filing Dt:
|
06/20/1997
|
|
Title:
|
MOS IMAGE SENSOR
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|
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|
Patent #:
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|
Issue Dt:
|
12/29/1998
|
Application #:
|
08883403
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Filing Dt:
|
06/26/1997
|
|
Title:
|
LOW POWER PROGRAMMABLE FUSE STRUCTURES SAME
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/1998
|
Application #:
|
08887587
|
Filing Dt:
|
07/03/1997
|
|
Title:
|
LOW NOISE, HIGH POWER PSEUDOMORPHIC HEMT
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|
Patent #:
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|
Issue Dt:
|
05/11/1999
|
Application #:
|
08887910
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Filing Dt:
|
07/02/1997
|
|
Title:
|
PROCESS FOR FORMING PHOTORESIST MASK OVER INTEGRATED CIRCUIT STRUCTURES WITH CRITICAL DIMENSION CONTROL
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Patent #:
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|
Issue Dt:
|
12/21/1999
|
Application #:
|
08895960
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Filing Dt:
|
07/17/1997
|
|
Title:
|
DUAL PURPOSE RETAINING RING AND POLISHING PAD CONDITIONER
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|
Patent #:
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|
Issue Dt:
|
05/30/2000
|
Application #:
|
08899111
|
Filing Dt:
|
07/23/1997
|
|
Title:
|
SLURRY FILLING A RECESS FORMED DURING SEMICONDUCTOR FABRICATION
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|
Patent #:
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|
Issue Dt:
|
05/20/2003
|
Application #:
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08903974
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Filing Dt:
|
07/31/1997
|
|
Title:
|
PROCESS FOR DEVICE FABRICATION
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|
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|
Patent #:
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|
Issue Dt:
|
07/27/1999
|
Application #:
|
08904527
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Filing Dt:
|
08/01/1997
|
|
Title:
|
METHOD OF ETCHING SILICON MATERIALS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2000
|
Application #:
|
08907834
|
Filing Dt:
|
08/14/1997
|
|
Title:
|
SEMICONDUCTOR DEVICE HAVING AN ANTI-REFLECTIVE LAYER AND A METHOD OF MANUFACTURE THEREOF
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|
|
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|
Patent #:
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|
Issue Dt:
|
03/21/2000
|
Application #:
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08909563
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Filing Dt:
|
08/12/1997
|
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Title:
|
A DEVICE AND METHOD OF FORMING A METAL TO METAL CAPACITOR WITHIN AN INTEGRATED CIRCUIT
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/1999
|
Application #:
|
08914854
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Filing Dt:
|
08/19/1997
|
|
Title:
|
CHEMICAL MECHANICAL POLISHING PAD SLURRY DISTRIBUTION GROOVES
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|
|
|
|
Patent #:
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|
Issue Dt:
|
02/02/1999
|
Application #:
|
08915000
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Filing Dt:
|
08/20/1997
|
|
Title:
|
APPARATUS AND METHOD FOR POLISH REMOVING A PRECISE AMOUNT OF MATERIAL FROM A WAFER
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|
|
|
|
Patent #:
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|
Issue Dt:
|
06/13/2000
|
Application #:
|
08918174
|
Filing Dt:
|
08/25/1997
|
|
Title:
|
THIN FILM CAPACITORS AND PROCESS FOR MAKING THEM
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/1999
|
Application #:
|
08918483
|
Filing Dt:
|
08/26/1997
|
|
Title:
|
USE OF ETHYLENE GLYCOL AS A CORROSION INHIBITOR DURING CLEANING AFTER METAL CHEMICAL MECHANICAL POLISHING
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|
|
|
|
Patent #:
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|
Issue Dt:
|
09/28/1999
|
Application #:
|
08918781
|
Filing Dt:
|
08/25/1997
|
|
Title:
|
LITHOGRAPHIC PROCESS AND ENERGY-SENSITIVE MATERIAL FOR USE THEREIN
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/1999
|
Application #:
|
08918846
|
Filing Dt:
|
08/25/1997
|
|
Title:
|
METHOD AND APPARATUS FOR USING PRESSURE DIFFERENTIALS THROUGH A POLISHING PAD TO IMPROVE PERFORMANCE IN CHEMICAL MECHANICAL POLISHING
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|
|
|
|
Patent #:
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|
Issue Dt:
|
12/22/1998
|
Application #:
|
08919394
|
Filing Dt:
|
08/28/1997
|
|
Title:
|
PROCESS FOR FORMING INTEGRATED CIRCUIT STRUCTURE WITH IMPROVED METAL SILICIDE CONTACTS USING NOTCHED SIDEWALL SPACER ON GATE ELECTRODE, AND RESULTING STRUCTURE
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|
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|
Patent #:
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|
Issue Dt:
|
06/29/1999
|
Application #:
|
08923676
|
Filing Dt:
|
09/04/1997
|
|
Title:
|
STANDARDIZED GAS ISOLATION BOX (GIB) INSTALLATION
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|
|
|
|
Patent #:
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|
Issue Dt:
|
08/15/2000
|
Application #:
|
08924277
|
Filing Dt:
|
09/05/1997
|
|
Title:
|
IMPROVED METHOD FOR ESTIMATING QUIESCENT CURRENT IN INTEGRATED CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2000
|
Application #:
|
08924728
|
Filing Dt:
|
09/05/1997
|
|
Title:
|
METHOD OF INTEGRATED CIRCUIT FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2000
|
Application #:
|
08924730
|
Filing Dt:
|
09/05/1997
|
|
Title:
|
INTEGRATED CIRCUIT FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/1999
|
Application #:
|
08924902
|
Filing Dt:
|
09/08/1997
|
|
Title:
|
CONSISTENT ALIGNMENT MARK PROFILES ON SEMICONDUCTOR WAFERS USING PVD SHADOWING
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/29/2000
|
Application #:
|
08926220
|
Filing Dt:
|
09/09/1997
|
|
Title:
|
METHOD AND APPARATUS FOR FORMING DIELECTRIC FILMS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2000
|
Application #:
|
08926590
|
Filing Dt:
|
09/04/1997
|
|
Title:
|
EFFECTIVE SILICIDE BLOCKING
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|
|
|
|
Patent #:
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|
Issue Dt:
|
09/08/1998
|
Application #:
|
08931066
|
Filing Dt:
|
09/15/1997
|
|
Title:
|
LINEWIDTH METROLOGY OF INTEGRATED CIRCUIT STRUCTURES
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|
|
|
|
Patent #:
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|
Issue Dt:
|
05/11/1999
|
Application #:
|
08932005
|
Filing Dt:
|
09/17/1997
|
|
Title:
|
METAL TO METAL CAPACITOR APPARATUS AND METHOD FOR MAKING
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/1999
|
Application #:
|
08935121
|
Filing Dt:
|
09/22/1997
|
|
Title:
|
METHOD OF FORMING A T-SHAPED GATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/1999
|
Application #:
|
08935521
|
Filing Dt:
|
09/23/1997
|
|
Title:
|
THIN OXIDE MASK LEVEL DEFINED RESISTOR
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|
|
|
|
Patent #:
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|
Issue Dt:
|
10/19/1999
|
Application #:
|
08936829
|
Filing Dt:
|
09/25/1997
|
|
Title:
|
A METHOD OF FABRICATING A MICROELECTRONIC PACKAGE HAVING POLYMER ESD PROTECTION
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|
|
|
|
Patent #:
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|
Issue Dt:
|
01/12/1999
|
Application #:
|
08939350
|
Filing Dt:
|
09/29/1997
|
|
Title:
|
PROCESS FOR MAKING GROUP IV SEMICONDUCTOR SUBSTRATE TREATED WITH ONE OR MORE GROUP IV ELEMENTS TO FORM BARRIER REGION CAPABLE OF INHIBITING MIGRATION OF DOPANT MATERIALS IN SUBSTRATE
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|
|
|
|
Patent #:
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|
Issue Dt:
|
03/30/1999
|
Application #:
|
08939689
|
Filing Dt:
|
09/29/1997
|
|
Title:
|
METHOD AND APPARATUS FOR CHEMICAL MECHANICAL POLISHING
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|
|
|
|
Patent #:
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|
Issue Dt:
|
10/26/1999
|
Application #:
|
08941556
|
Filing Dt:
|
09/30/1997
|
|
Title:
|
SILICON IC CONTACTS USING COMPOSITE TIN BARRIER LAYER
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|
|
|
|
Patent #:
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|
Issue Dt:
|
08/31/1999
|
Application #:
|
08942991
|
Filing Dt:
|
10/02/1997
|
|
Title:
|
USE OF ABRASIVE TAPE CONVEYING ASSEMBLIES FOR CONDITIONING POLISHING PADS
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|
|
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|
Patent #:
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|
Issue Dt:
|
04/27/1999
|
Application #:
|
08943371
|
Filing Dt:
|
10/03/1997
|
|
Title:
|
ON-CHIP MISALIGNMENT INDICATION
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|
|
|
|
Patent #:
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|
Issue Dt:
|
06/15/1999
|
Application #:
|
08948874
|
Filing Dt:
|
10/10/1997
|
|
Title:
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ARTICLE COMPRISING AN OXIDE LAYER ON GAN
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|
|
|
|
Patent #:
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|
Issue Dt:
|
04/13/1999
|
Application #:
|
08954791
|
Filing Dt:
|
10/21/1997
|
|
Title:
|
APPARATUS FOR RAPID THERMAL PROCESSING OF A WAFER
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|
|
|
Patent #:
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|
Issue Dt:
|
04/27/1999
|
Application #:
|
08955384
|
Filing Dt:
|
10/21/1997
|
|
Title:
|
METHOD OF FORMING A LAYER AND SEMICONDUCTOR SUBSTRATE
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|
|
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|
Patent #:
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|
Issue Dt:
|
04/29/2003
|
Application #:
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08957122
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Filing Dt:
|
10/24/1997
|
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Title:
|
SCANNING ELECTRON MICROSCOPE SYSTEM AND METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT
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|
|
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|
Patent #:
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|
Issue Dt:
|
01/25/2000
|
Application #:
|
08957692
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Filing Dt:
|
10/24/1997
|
|
Title:
|
NITROGEN IMPLANTED POLYSILICON GATE FOR MOSFET GATE OXIDE HARDENING
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|
|
|
|
Patent #:
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|
Issue Dt:
|
10/05/1999
|
Application #:
|
08960925
|
Filing Dt:
|
10/30/1997
|
|
Title:
|
SHIMMING SUBSTRATE HOLDER ASSEMBLIES TO PRODUCE MORE UNIFORMLY POLISHED SUBSTRATE SURFACES
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|
|
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|
Patent #:
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|
Issue Dt:
|
08/22/2000
|
Application #:
|
08961383
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Filing Dt:
|
10/30/1997
|
|
Title:
|
EFFECTIVE PAD CONDITIONING
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|
|
|
|
Patent #:
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|
Issue Dt:
|
10/26/1999
|
Application #:
|
08963813
|
Filing Dt:
|
11/04/1997
|
|
Title:
|
"SEMICONDUCTOR DEVICE AND FABRICATION METHOD EMPLOYING A PALLADIUM -PLATED HEAT SPREADER SUBSTRATE"
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|
|
|
|
Patent #:
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|
Issue Dt:
|
02/22/2000
|
Application #:
|
08966637
|
Filing Dt:
|
11/10/1997
|
|
Title:
|
PLASMA-ENHANCED OXIDE PROCESS OPTIMIZATION AND MATERIAL AND APPARATUS THEREFOR
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|
|
|
|
Patent #:
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|
Issue Dt:
|
09/14/1999
|
Application #:
|
08970298
|
Filing Dt:
|
11/14/1997
|
|
Title:
|
METHOD OF ROUGHING A METALLIC SURFACE OF A SEMICONDUCTOR DEPOSITION TOOL
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|
|
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|
Patent #:
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|
Issue Dt:
|
11/30/1999
|
Application #:
|
08971422
|
Filing Dt:
|
11/17/1997
|
|
Title:
|
LOW TEMPERATURE COEFFICIENT DIELECTRIC MATERIAL COMPRISING BINARY CALCIUM NIOBATE AND CALCIUM TANTALATE OXIDES
|
|
|
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|
Patent #:
|
|
Issue Dt:
|
12/15/1998
|
Application #:
|
08979297
|
Filing Dt:
|
11/26/1997
|
|
Title:
|
METHOD FOR REMOVING ETCHING RESIDUES AND CONTAMINANTS
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|
|
|
|
Patent #:
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|
Issue Dt:
|
09/05/2000
|
Application #:
|
08979733
|
Filing Dt:
|
11/26/1997
|
|
Title:
|
PURGING GAS CONTROL STRUCTURE FOR CVD CHAMBER
|
|
|
|
|
Patent #:
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|
Issue Dt:
|
09/05/2000
|
Application #:
|
08979733
|
Filing Dt:
|
11/26/1997
|
|
Title:
|
PURGING GAS CONTROL STRUCTURE FOR CVD CHAMBER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/1999
|
Application #:
|
08979734
|
Filing Dt:
|
11/26/1997
|
|
Title:
|
IN SITU ETCH OF CVD CHAMBER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/1999
|
Application #:
|
08979734
|
Filing Dt:
|
11/26/1997
|
|
Title:
|
IN SITU ETCH OF CVD CHAMBER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1999
|
Application #:
|
08980943
|
Filing Dt:
|
12/01/1997
|
|
Title:
|
CHEMICAL MECHANICAL POLISHING CARRIER FIXTURE AND SYSTEM
|
|
|
|
|
Patent #:
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|
Issue Dt:
|
10/19/1999
|
Application #:
|
08982109
|
Filing Dt:
|
12/01/1997
|
|
Title:
|
METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT USING CHEMICAL MECHANICAL POLISHING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/1999
|
Application #:
|
08984003
|
Filing Dt:
|
12/03/1997
|
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT CORE PROBING FOR FAILURE ANALYSIS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/2001
|
Application #:
|
08988420
|
Filing Dt:
|
12/10/1997
|
|
Title:
|
PROCESS FOR ELECTROPLATING METALS
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|
|
|
|
Patent #:
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|
Issue Dt:
|
05/09/2000
|
Application #:
|
08990315
|
Filing Dt:
|
12/15/1997
|
|
Title:
|
PROCESS FOR ABRASIVE REMOVAL OF COPPER FROM THE BACK SURFACE OF A SILICON SUBSTRATE
|
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|
|
|
Patent #:
|
|
Issue Dt:
|
12/19/2000
|
Application #:
|
08991397
|
Filing Dt:
|
12/16/1997
|
|
Title:
|
METHOD OF FORMING THIN POLYGATES FOR SUB QUARTER MICRON CMOS PROCESS
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|
|
|
|
Patent #:
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|
Issue Dt:
|
05/23/2000
|
Application #:
|
08995260
|
Filing Dt:
|
12/19/1997
|
|
Title:
|
APPARATUS AND METHOD FOR ELECTRICAL DETERMINATION OF DELAMINATION AT ONE OR MORE INTERFACES WITHIN A SEMICONDUCTOR WAFER
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|
|
|
|
Patent #:
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|
Issue Dt:
|
03/28/2000
|
Application #:
|
09002497
|
Filing Dt:
|
01/02/1998
|
|
Title:
|
DETECTING DEFECTS IN INTEGRATED CIRCUITS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2003
|
Application #:
|
09005364
|
Filing Dt:
|
01/09/1998
|
|
Title:
|
METHOD AND APPARATUS FOR USING ACROSS WAFER BACK PRESSURE DIFFERENTIALS TO INFLUENCE THE PERFORMANCE OF CHEMICAL MECHANICAL POLISHING
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2003
|
Application #:
|
09005364
|
Filing Dt:
|
01/09/1998
|
|
Title:
|
METHOD AND APPARATUS FOR USING ACROSS WAFER BACK PRESSURE DIFFERENTIALS TO INFLUENCE THE PERFORMANCE OF CHEMICAL MECHANICAL POLISHING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
09006347
|
Filing Dt:
|
01/13/1998
|
|
Title:
|
FIELD EMISSION DEVICES EMPLOYING DIAMOND PARTICLE EMITTERS
|
|
|
|
|
Patent #:
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|
Issue Dt:
|
10/17/2000
|
Application #:
|
09006918
|
Filing Dt:
|
01/13/1998
|
|
Title:
|
FORMATION OF HIGH-VOLTAGE AND LOW-VOLTAGE DEVICES ON A SEMICONDUCTOR SUBSTRATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2000
|
Application #:
|
09015981
|
Filing Dt:
|
01/30/1998
|
|
Title:
|
A SEMICONDUCTOR DEVICE CONFIGURED TO CONTROL DOPANT
DIFFUSION IN THE SEMICONDUCTOR DEVICE SUBSTRATE
|
|
|
|
|
Patent #:
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|
Issue Dt:
|
11/30/1999
|
Application #:
|
09016475
|
Filing Dt:
|
01/30/1998
|
|
Title:
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DEVICE AND METHOD OF FABRICATING VIAS FOR ULSI METALLIZATION AND INTERCONNECT
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Patent #:
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Issue Dt:
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04/24/2001
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Application #:
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09017103
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Filing Dt:
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01/31/1998
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Title:
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ARTICLE COMPRISING A STABLE, LOW-RESISTANCE OHMIC CONTACT
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Patent #:
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Issue Dt:
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09/12/2000
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Application #:
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09022588
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Filing Dt:
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02/12/1998
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Title:
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USE OF CORROSION INHIBITING COMPOUNDS IN POST-ETCH CLEANING PROCESSES OF AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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05/07/2002
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Application #:
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09024601
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Filing Dt:
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02/17/1998
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Publication #:
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Pub Dt:
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08/16/2001
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Title:
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INTEGRATED CIRCUIT FABRICATION COMPRISING CAPACITOR WITH GROOVED CONDUCTORS
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Patent #:
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Issue Dt:
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12/21/1999
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Application #:
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09027307
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Filing Dt:
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02/20/1998
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Title:
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METHOD OF SINGLE STEP DAMASCENE PROCESS FOR DEPOSITION AND GLOBAL PLANARIZATION
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Patent #:
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Issue Dt:
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07/11/2000
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Application #:
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09037588
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Filing Dt:
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03/09/1998
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Title:
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COMPOSITE SEMICONDUCTOR GATE DIELECTRICS
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Patent #:
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Issue Dt:
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03/28/2000
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Application #:
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09039213
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Filing Dt:
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03/14/1998
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Title:
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METHOD OF LINEWIDTH MONITORING FOR NANOLITHOGRAPHY
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Patent #:
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Issue Dt:
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08/15/2000
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Application #:
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09045062
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Filing Dt:
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03/19/1998
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Title:
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CORROSION SENSITIVITY STRUCTURES FOR VIAS AND CONTACT HOLES IN INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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01/11/2000
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Application #:
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09046113
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Filing Dt:
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03/20/1998
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Title:
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STRUCTURE AND METHOD FOR MEASURING INTERFACE RESISTANCE IN MULTIPLE INTERFACE CONTACTS AND VIA STRUCTURES IN SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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06/06/2000
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Application #:
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09046242
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Filing Dt:
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03/23/1998
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Title:
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ISOLATION METHOD UTILIZING A HIGH PRESSURE OXIDATION
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Patent #:
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Issue Dt:
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03/07/2000
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Application #:
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09049531
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Filing Dt:
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03/27/1998
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Title:
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MOLD FOR NON - PHOTOLITHOGRAPHIC FABRICATION OF MICROSTRUCTURES
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Patent #:
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Issue Dt:
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09/07/1999
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Application #:
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09050711
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Filing Dt:
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03/30/1998
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Title:
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BIPOLAR TRANSISTOR WITH MOS-CONTROLLED PROTECTION FOR REVERSE-BIASED EMITTER-BASE JUNCTION
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Patent #:
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Issue Dt:
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03/19/2002
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Application #:
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09052793
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Filing Dt:
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03/31/1998
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Title:
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METHOD OF FORMING A TRENCH CAPACITOR EXTENDING BETWEEN AN UPPER AND A LOWER INTERCONNECTS
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Patent #:
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Issue Dt:
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05/02/2000
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Application #:
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09052851
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Filing Dt:
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03/31/1998
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Title:
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HIGH ASPECT RATIO, METAL-TO-METAL, LINEAR CAPACITOR FOR AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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12/07/1999
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Application #:
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09054279
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Filing Dt:
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04/02/1998
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Title:
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METHOD AND SYSTEM FOR ALIGNMENT OF OPENINGS IN SEMICONDUCTOR FABRICATION
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Patent #:
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Issue Dt:
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03/16/1999
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Application #:
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09055018
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Filing Dt:
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04/03/1998
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Title:
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LOW POWER PROGRAMMABLE FUSE STRUCTURES AND METHODS FOR MAKING THE SAME
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Patent #:
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Issue Dt:
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07/18/2000
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Application #:
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09058826
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Filing Dt:
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04/13/1998
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Title:
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TEMPERATURE COMPENSATION OF LDMOS DEVICES
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Patent #:
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Issue Dt:
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12/14/1999
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Application #:
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09060420
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Filing Dt:
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04/15/1998
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Title:
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METHOD FOR MAKING FIELD EFFECT DEVICES AND CAPACITORS WITH IMPROVED THIN FILM DIELECTRICS AND RESULTING DEVICES
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Patent #:
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Issue Dt:
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04/27/1999
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Application #:
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09062606
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Filing Dt:
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04/17/1998
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Title:
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BONDING SILICON WAFERS
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Patent #:
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Issue Dt:
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05/09/2000
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Application #:
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09063801
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04/21/1998
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Title:
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TEST CIRCUITRY FOR DETERMINING THE DEFECT DENSITY OF A SEMICONDUCTOR PROCESS AS A FUNCTION OF INDIVIDUAL METAL LAYERS
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Patent #:
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Issue Dt:
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07/09/2002
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Application #:
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09064802
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04/22/1998
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Title:
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AUTOMATING PHOTOLITHOGRAPHY IN THE FABRICATION OF INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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03/14/2000
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Application #:
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09069027
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04/27/1998
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Title:
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METAL-ENCAPSULATED POLYSILICON GATE AND INTERCONNECT
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Patent #:
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Issue Dt:
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07/06/1999
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Application #:
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09070188
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Filing Dt:
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04/30/1998
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Title:
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ANTIFUSE DEVICE FOR USE ON A FIELD PROGRAMMABLE INTERCONNECT CHIP
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Patent #:
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Issue Dt:
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05/23/2000
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09072705
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05/05/1998
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Title:
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NON-LINEAR CIRCUIT ELEMENTS ON INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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11/30/1999
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09072915
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05/04/1998
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Title:
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SILICON WAFER OR DIE STRENGTH TEST FIXTURE USING HIGH PRESSURE FLUID
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Patent #:
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Issue Dt:
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02/22/2000
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Application #:
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09073556
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Filing Dt:
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05/06/1998
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Title:
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INTEGRATED CIRCUIT HAVING AMORPHOUS SILICIDE LAYER IN CONTACTS AND VIAS AND METHOD OF MANUFACTURE THEREFOR
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Patent #:
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07/18/2000
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09074837
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05/08/1998
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Title:
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LINEAR CAPACITOR AND PROCESS FOR MAKING SAME
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Patent #:
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07/25/2000
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09075029
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05/08/1998
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Title:
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HIGH VOLTAGE TOLERANT THIN FILM TRANSISTOR TRANSISTOR
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Issue Dt:
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12/18/2001
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Application #:
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09076399
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05/11/1998
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Title:
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FORMATION OF INTEGRATED CIRCUIT STRUCTURE USING ONE OR MORE SILICON LAYERS FOR IMPLANTATION AND OUT-DIFFUSION IN FORMATION OF DEFECT-FREE SOURCE/DRAIN REGIONS AND ALSO FOR SUBSEQUENT FORMATION OF SILICON NITRIDE SPACERS
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Patent #:
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10/03/2000
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09076502
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05/11/1998
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Title:
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APPARATUS AND PROCESS FOR DEPOSITION OF THIN FILM ON SEMICONDUCTOR SUBSTRATE WHILE INHIBITING PARTICLE FORMATION AND DEPOSITION
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12/26/2000
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09079413
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05/13/1998
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Title:
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INDUCTOR WITH COBALT/NICKEL CORE FOR INTEGRATED CIRCUIT STRUCTURE WITH HIGH INDUCTANCE AND HIGH Q-FACTOR,
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