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04/02/2013
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12914570
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10/28/2010
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08/04/2011
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08/28/2012
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12914644
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10/28/2010
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05/03/2012
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OPTIMIZED SEMICONDUCTOR PACKAGING IN A THREE-DIMENSIONAL STACK
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04/23/2013
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12914730
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10/28/2010
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05/03/2012
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Thermal Power Plane for Integrated Circuits
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11/01/2011
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12915216
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10/29/2010
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08/04/2011
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REDUCING CONTAMINATION IN A PROCESS FLOW OF FORMING A CHANNEL SEMICONDUCTOR ALLOY IN A SEMICONDUCTOR DEVICE
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12/31/2013
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12915888
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10/29/2010
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05/03/2012
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ANTI-BLOOMING PIXEL SENSOR CELL WITH ACTIVE NEUTRAL DENSITY FILTER, METHODS OF MANUFACTURE, AND DESIGN STRUCTURE
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01/01/2013
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12915923
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10/29/2010
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05/03/2012
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SPLIT-LAYER DESIGN FOR DOUBLE PATTERNING LITHOGRAPHY
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07/31/2012
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12916864
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11/01/2010
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05/03/2012
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LATERAL EPITAXIAL GROWN SOI IN DEEP TRENCH STRUCTURES AND METHODS OF MANUFACTURE
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07/31/2012
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12917029
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11/01/2010
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05/03/2012
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STRUCTURE AND DESIGN STRUCTURE FOR HIGH-Q VALUE INDUCTOR AND METHOD OF MANUFACTURING THE SAME
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06/12/2012
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12917700
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11/02/2010
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09/01/2011
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TRANSISTORS COMPRISING HIGH-K METAL GATE ELECTRODE STRUCTURES AND ADAPTED CHANNEL SEMICONDUCTOR MATERIALS
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11/26/2013
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12938411
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11/03/2010
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05/03/2012
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SELF-UPDATING NODE CONTROLLER FOR AN ENDPOINT IN A CLOUD COMPUTING ENVIRONMENT
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08/13/2013
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12939282
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11/04/2010
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09/01/2011
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FIELD EFFECT TRANSISTORS FOR A FLASH MEMORY COMPRISING A SELF-ALIGNED CHARGE STORAGE REGION
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07/09/2013
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12939471
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11/04/2010
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09/01/2011
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ASSESSING METAL STACK INTEGRITY IN SOPHISTICATED SEMICONDUCTOR DEVICES BY MECHANICALLY STRESSING DIE CONTACTS
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02/04/2014
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12939506
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11/04/2010
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05/10/2012
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DEVICES HAVING REDUCED SUSCEPTIBILITY TO SOFT-ERROR EFFECTS AND METHOD FOR FABRICATION
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11/12/2013
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12939523
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11/04/2010
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09/01/2011
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CONTACT ELEMENTS OF SEMICONDUCTOR DEVICES COMPRISING A CONTINUOUS TRANSITION TO METAL LINES OF A METALLIZATION LAYER
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08/07/2012
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12939538
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11/04/2010
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02/24/2011
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FUSE LINK STRUCTURES USING FILM STRESS FOR PROGRAMMING AND METHODS OF MANUFACTURE
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07/31/2012
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12939668
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11/04/2010
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05/10/2012
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VERTICAL HETEROJUNCTION BIPOLAR TRANSISTORS WITH REDUCED BASE-COLLECTOR JUNCTION CAPACITANCE
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10/15/2013
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12940095
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11/05/2010
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05/10/2012
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Biodegradable Device and Mesh Network for Optimization of Payload Material Delivery
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07/23/2013
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12940210
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11/05/2010
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05/10/2012
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GATE-TO-GATE RECESSED STRAP AND METHODS OF MANUFACTURE OF SAME
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12/04/2012
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12941042
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11/06/2010
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05/10/2012
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CONTACTS FOR FET DEVICES
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12/17/2013
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12941185
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11/08/2010
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10/06/2011
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METHODS OF FORMING EFUSE DEVICES
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10/22/2013
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12941595
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11/08/2010
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10/06/2011
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ELECTRONIC FUSE STRUCTURE FORMED USING A METAL GATE ELECTRODE MATERIAL STACK CONFIGURATION
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12/31/2013
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12941771
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11/08/2010
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05/10/2012
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METHOD TO REDUCE GROUND-PLANE POISONING OF EXTREMELY-THIN SOI (ETSOI) LAYER WITH THIN BURIED OXIDE
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09/24/2013
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12942490
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11/09/2010
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05/10/2012
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FORMATION OF A GRAPHENE LAYER ON A LARGE SUBSTRATE
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07/30/2013
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12942506
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11/09/2010
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10/06/2011
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SEMICONDUCTOR DEVICE COMPRISING METAL GATE STRUCTURES FORMED BY A REPLACEMENT GATE APPROACH AND EFUSES INCLUDING A SILICIDE
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09/24/2013
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12942662
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11/09/2010
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05/10/2012
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THREE-DIMENSIONAL (3D) STACKED INTEGRATED CIRCUIT TESTING
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01/28/2014
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12943995
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11/11/2010
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05/17/2012
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SELF-ALIGNED CONTACT EMPLOYING A DIELECTRIC METAL OXIDE SPACER
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08/20/2013
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12944020
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11/11/2010
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05/17/2012
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IMPLEMENTING VERTICAL DIE STACKING TO DISTRIBUTE LOGICAL FUNCTION OVER MULTIPLE DIES IN THROUGH-SILICON-VIA STACKED SEMICONDUCTOR DEVICE
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08/07/2012
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12944480
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11/11/2010
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05/17/2012
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METHOD AND SYSTEM FOR OPTIMIZING A DEVICE WITH CURRENT SOURCE MODELS
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08/21/2012
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12944493
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11/11/2010
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05/17/2012
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SLACK-BASED TIMING BUDGET APPORTIONMENT
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09/03/2013
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12944682
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11/11/2010
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05/17/2012
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METHOD AND APPARATUS FOR OPTIMAL CACHE SIZING AND CONFIGURATION FOR LARGE MEMORY SYSTEMS
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12/17/2013
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12946875
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11/16/2010
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05/17/2012
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POST SILICIDE TESTING FOR REPLACEMENT HIGH-K METAL GATE TECHNOLOGIES
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10/08/2013
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12946925
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11/16/2010
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05/17/2012
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FREE COOLING SOLUTION FOR A CONTAINERIZED DATA CENTER
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03/04/2014
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12947445
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11/16/2010
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05/17/2012
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Clock Optimization with Local Clock Buffer Control Optimization
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10/01/2013
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12948031
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11/17/2010
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05/17/2012
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Replacement Gate Having Work Function at Valence Band Edge
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10/23/2012
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12948165
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11/17/2010
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05/17/2012
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IMPLEMENTING SPARE LATCH PLACEMENT QUALITY DETERMINATION
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08/07/2012
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12949108
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11/18/2010
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03/17/2011
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BIPOLAR TRANSISTOR WITH RAISED EXTRINSIC SELF-ALIGNED BASE USING SELECTIVE EPITAXIAL GROWTH FOR BICMOS INTEGRATION
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06/18/2013
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12949158
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11/18/2010
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05/19/2011
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Method of Forming Metal Interconnect Structures in Ultra Low-K Dielectrics
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12/04/2012
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12949328
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11/18/2010
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05/24/2012
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PARTITIONING FOR HARDWARE-ACCELERATED FUNCTIONAL VERIFICATION
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07/16/2013
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12950635
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11/19/2010
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05/24/2012
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THIN FILM RESISTORS AND METHODS OF MANUFACTURE
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07/23/2013
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12951107
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11/22/2010
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05/24/2012
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METHOD OF FORMING E-FUSE IN REPLACEMENT METAL GATE MANUFACTURING PROCESS
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03/05/2013
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12951516
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11/22/2010
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05/24/2012
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HETEROJUNCTION BIPOLAR TRANSISTORS WITH REDUCED BASE RESISTANCE
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01/21/2014
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11/22/2010
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05/24/2012
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FABRICATING PHOTONICS DEVICES FULLY INTEGRATED INTO A CMOS MANUFACTURING PROCESS
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07/16/2013
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12952465
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11/23/2010
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05/26/2011
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Method of Manufacturing a Photovoltaic Cell
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09/03/2013
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12955203
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11/29/2010
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05/31/2012
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III-V COMPOUND SEMICONDUCTOR MATERIAL PASSIVATION WITH CRYSTALLINE INTERLAYER
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03/20/2012
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12955224
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11/29/2010
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FORMING AN OXIDE MEMS BEAM
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03/13/2012
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12955883
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11/29/2010
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REMOVABLE AND REPLACEABLE DUAL-SIDED CONNECTOR PIN INTERPOSER
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04/23/2013
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12958607
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12/02/2010
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06/07/2012
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Self-Aligned Contact For Replacement Gate Devices
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07/09/2013
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12958608
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12/02/2010
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06/07/2012
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SELF-ALIGNED CONTACT COMBINED WITH A REPLACEMENT METAL GATE/HIGH-K GATE DIELECTRIC
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08/27/2013
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12/02/2010
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06/07/2012
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VAPOR CLEAN FOR HAZE AND PARTICLE REMOVAL FROM LITHOGRAPHIC PHOTOMASKS
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07/02/2013
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12959993
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12/03/2010
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06/07/2012
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PROGRAM DISTURB ERROR LOGGING AND CORRECTION FOR FLASH MEMORY
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06/11/2013
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12960004
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12/03/2010
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06/07/2012
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PROBABILISTIC MULTI-TIER ERROR CORRECTION IN NOT-AND (NAND) FLASH MEMORY
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06/18/2013
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12960589
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12/06/2010
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06/07/2012
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STRUCTURE AND METHOD FOR Vt TUNING AND SHORT CHANNEL CONTROL WITH HIGH K/METAL GATE MOSFETs
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02/19/2013
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12960593
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12/06/2010
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06/07/2012
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POLY RESISTOR AND METAL GATE FABRICATION AND STRUCTURE
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10/29/2013
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12961553
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12/07/2010
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06/07/2012
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METAL SEMICONDUCTOR ALLOY CONTACT WITH LOW RESISTANCE
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11/26/2013
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12962722
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12/08/2010
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06/14/2012
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THERMALLY CONTROLLED REFRACTORY METAL RESISTOR
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10/02/2012
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12963246
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12/08/2010
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06/14/2012
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CREATING SCAN CHAIN DEFINITION FROM HIGH-LEVEL MODEL USING HIGH-LEVEL MODEL SIMULATION
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04/09/2013
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12963314
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12/08/2010
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06/14/2012
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NARROW-BAND WIDE-RANGE FREQUENCY MODULATION CONTINUOUS WAVE (FMCW) RADAR SYSTEM
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05/22/2012
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12963908
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Filing Dt:
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12/09/2010
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Publication #:
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Pub Dt:
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11/03/2011
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Title:
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REDUCED DEFECTIVITY IN CONTACTS OF A SEMICONDUCTOR DEVICE COMPRISING REPLACEMENT GATE ELECTRODE STRUCTURES BY USING AN INTERMEDIATE CAP LAYER
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Patent #:
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Issue Dt:
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08/20/2013
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Application #:
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12964082
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Filing Dt:
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12/09/2010
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Publication #:
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Pub Dt:
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06/14/2012
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Title:
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PSEUDO BUTTED JUNCTION STRUCTURE FOR BACK PLANE CONNECTION
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Patent #:
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Issue Dt:
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10/15/2013
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Application #:
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12964340
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Filing Dt:
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12/09/2010
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Publication #:
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Pub Dt:
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06/14/2012
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Title:
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ADDING SCALABILITY AND FAULT TOLERANCE TO GENERIC FINITE STATE MACHINE FRAMEWORKS FOR USE IN AUTOMATED INCIDENT MANAGEMENT OF CLOUD COMPUTING INFRASTRUCTURES
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Patent #:
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Issue Dt:
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01/27/2015
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Application #:
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12965118
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Filing Dt:
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12/10/2010
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Publication #:
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Pub Dt:
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12/01/2011
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Title:
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Reduction of Defect Rates in PFET Transistors Comprising a Si/Ge Semiconductor Material Formed by Epitaxial Growth
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Patent #:
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Issue Dt:
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02/03/2015
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Application #:
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12965212
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Filing Dt:
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12/10/2010
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Publication #:
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Pub Dt:
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12/01/2011
| | | | |
Title:
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Semiconductor Device Comprising a Buried Capacitor Formed in the Contact Level
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Patent #:
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Issue Dt:
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03/18/2014
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Application #:
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12965341
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Filing Dt:
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12/10/2010
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Publication #:
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Pub Dt:
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01/05/2012
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Title:
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TEST STRUCTURE FOR CONTROLLING THE INCORPORATION OF SEMICONDUCTOR ALLOYS IN TRANSISTORS COMPRISING HIGH-K METAL GATE ELECTRODE STRUCTURES
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Patent #:
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Issue Dt:
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12/17/2013
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Application #:
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12967114
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Filing Dt:
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12/14/2010
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Publication #:
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Pub Dt:
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06/14/2012
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Title:
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SELF-PROTECTED ELECTROSTATIC DISCHARGE FIELD EFFECT TRANSISTOR (SPESDFET), AN INTEGRATED CIRCUIT INCORPORATING THE SPESDFET AS AN INPUT/OUTPUT (I/O) PAD DRIVER AND ASSOCIATED METHODS OF FORMING THE SPESDFET AND THE INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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11/19/2013
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Application #:
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12967308
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Filing Dt:
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12/14/2010
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Publication #:
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Pub Dt:
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06/14/2012
| | | | |
Title:
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ELECTRICAL FUSE WITH A CURRENT SHUNT
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Patent #:
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Issue Dt:
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02/10/2015
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Application #:
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12968068
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Filing Dt:
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12/14/2010
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Publication #:
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Pub Dt:
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06/14/2012
| | | | |
Title:
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SEMICONDUCTOR DEVICES HAVING THROUGH-CONTACTS AND RELATED FABRICATION METHODS
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Patent #:
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Issue Dt:
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02/25/2014
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Application #:
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12968864
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Filing Dt:
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12/15/2010
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Publication #:
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Pub Dt:
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06/21/2012
| | | | |
Title:
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STRESS TESTING OF SILICON-ON-INSULATOR SUBSTRATES USING APPLIED ELECTROSTATIC DISCHARGE
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Patent #:
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Issue Dt:
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05/21/2013
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12969004
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Filing Dt:
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12/15/2010
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Publication #:
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Pub Dt:
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06/21/2012
| | | | |
Title:
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METAL-INSULATOR-METAL CAPACITORS WITH HIGH CAPACITANCE DENSITY
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Patent #:
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Issue Dt:
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12/03/2013
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Application #:
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12970553
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Filing Dt:
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12/16/2010
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Publication #:
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Pub Dt:
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01/05/2012
| | | | |
Title:
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SEMICONDUCTOR DEVICE COMPRISING THROUGH HOLE VIAS HAVING A STRESS RELAXATION MECHANISM
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Patent #:
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Issue Dt:
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12/25/2012
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Application #:
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12972980
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Filing Dt:
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12/20/2010
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Publication #:
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Pub Dt:
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06/21/2012
| | | | |
Title:
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TASK-BASED MULTI-PROCESS DESIGN SYNTHESIS WITH REPRODUCIBLE TRANSFORMS
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Patent #:
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Issue Dt:
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02/17/2015
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12973147
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Filing Dt:
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12/20/2010
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Publication #:
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Pub Dt:
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12/29/2011
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Title:
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PLANAR CAVITY MEMS AND RELATED STRUCTURES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES
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Patent #:
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Issue Dt:
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04/01/2014
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Application #:
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12973285
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Filing Dt:
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12/20/2010
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Publication #:
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Pub Dt:
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12/29/2011
| | | | |
Title:
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PLANAR CAVITY MEMS AND RELATED STRUCTURES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES
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Patent #:
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Issue Dt:
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05/13/2014
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Application #:
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12973430
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Filing Dt:
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12/20/2010
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Publication #:
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Pub Dt:
|
12/29/2011
| | | | |
Title:
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PLANAR CAVITY MEMS AND RELATED STRUCTURES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES
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Patent #:
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Issue Dt:
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02/11/2014
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Application #:
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12974037
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Filing Dt:
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12/21/2010
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Publication #:
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Pub Dt:
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06/21/2012
| | | | |
Title:
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Encapsulation of Closely Spaced Gate Electrode Structures
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Patent #:
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Issue Dt:
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08/02/2016
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Application #:
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12974854
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Filing Dt:
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12/21/2010
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Publication #:
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Pub Dt:
|
12/29/2011
| | | | |
Title:
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PLANAR CAVITY MEMS AND RELATED STRUCTURES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES
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Patent #:
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Issue Dt:
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09/24/2013
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12975701
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Filing Dt:
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12/22/2010
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Publication #:
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Pub Dt:
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06/28/2012
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Title:
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INTEGRATED CIRCUIT FABRICATION METHODS UTILIZING EMBEDDED HARDMASK LAYERS FOR HIGH RESOLUTION PATTERNING
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Patent #:
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Issue Dt:
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11/05/2013
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Application #:
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12982014
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Filing Dt:
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12/30/2010
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Publication #:
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Pub Dt:
|
07/21/2011
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Title:
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MATERIALS AND METHODS FOR IMMOBILIZATION OF CATALYSTS ON SURFACES AND FOR SELECTIVE ELECTROLESS METALLIZATION
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Patent #:
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Issue Dt:
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06/25/2013
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12983353
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Filing Dt:
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01/03/2011
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Pub Dt:
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07/05/2012
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Title:
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STRUCTURE, METHOD AND SYSTEM FOR COMPLEMENTARY STRAIN FILL FOR INTEGRATED CIRCUIT CHIPS
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Issue Dt:
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06/17/2014
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12983489
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Filing Dt:
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01/03/2011
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Publication #:
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Pub Dt:
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07/05/2012
| | | | |
Title:
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JUNCTION FIELD EFFECT TRANSISTOR STRUCTURE WITH P-TYPE SILICON GERMANIUM OR SILICON GERMANIUM CARBIDE GATE(S) AND METHOD OF FORMING THE STRUCTURE
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01/15/2013
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12983552
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01/03/2011
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Publication #:
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Pub Dt:
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04/28/2011
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Title:
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SMALL AREA, ROBUST SILICON VIA STRUCTURE AND PROCESS
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Patent #:
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Issue Dt:
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10/30/2012
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12983925
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Filing Dt:
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01/04/2011
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Publication #:
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Pub Dt:
|
07/05/2012
| | | | |
Title:
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FIELD EFFECT TRANSISTOR HAVING OHMIC BODY CONTACT(S), AN INTEGRATED CIRCUIT STRUCTURE INCORPORATING STACKED FIELD EFFECT TRANSISTORS WITH SUCH OHMIC BODY CONTACTS AND ASSOCIATED METHODS
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Issue Dt:
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05/27/2014
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12984180
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Filing Dt:
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01/04/2011
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Publication #:
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Pub Dt:
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07/05/2012
| | | | |
Title:
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ADVANCED ROUTING OF VEHICLE FLEETS
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Patent #:
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Issue Dt:
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09/10/2013
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Application #:
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12984252
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Filing Dt:
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01/04/2011
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Publication #:
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Pub Dt:
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08/18/2011
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Title:
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CACHE DIRECTORY LOOK-UP RE-USE AS CONFLICT CHECK MECHANISM FOR SPECULATIVE MEMORY REQUESTS
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Patent #:
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Issue Dt:
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09/16/2014
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Application #:
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12984308
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Filing Dt:
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01/04/2011
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Publication #:
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Pub Dt:
|
07/14/2011
| | | | |
Title:
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EVICT ON WRITE, A MANAGEMENT STRATEGY FOR A PREFETCH UNIT AND/OR FIRST LEVEL CACHE IN A MULTIPROCESSOR SYSTEM WITH SPECULATIVE EXECUTION
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Patent #:
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Issue Dt:
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12/10/2013
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12984359
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Filing Dt:
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01/04/2011
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Publication #:
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Pub Dt:
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07/05/2012
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Title:
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FLAT RESPONSE DEVICE STRUCTURES FOR BIPOLAR JUNCTION TRANSISTORS
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Issue Dt:
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01/28/2014
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12984653
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Filing Dt:
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01/05/2011
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Pub Dt:
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05/12/2011
| | | | |
Title:
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VERTICAL NANOWIRE FET DEVICES
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Issue Dt:
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03/27/2012
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12984682
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Filing Dt:
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01/05/2011
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Publication #:
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Pub Dt:
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04/28/2011
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Title:
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MEMORY READING METHOD FOR RESISTANCE DRIFT MITIGATION
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Issue Dt:
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12/24/2013
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12985462
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01/06/2011
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Pub Dt:
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07/12/2012
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Title:
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VOLTAGE DRIVER FOR A VOLTAGE-DRIVEN INTELLIGENT CHARACTERIZATION BENCH FOR SEMICONDUCTOR
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Issue Dt:
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12/09/2014
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12985840
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01/06/2011
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Pub Dt:
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07/12/2012
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Title:
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SILICON CONTROLLED RECTIFIERS (SCR), METHODS OF MANUFACTURE AND DESIGN STRUCTURES
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Issue Dt:
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02/11/2014
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12986266
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01/07/2011
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Publication #:
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Pub Dt:
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07/12/2012
| | | | |
Title:
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CONDUCTIVE METAL AND DIFFUSION BARRIER SEED COMPOSITIONS, AND METHODS OF USE IN SEMICONDUCTOR AND INTERLEVEL DIELECTRIC SUBSTRATES
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Issue Dt:
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01/15/2013
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12987106
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01/08/2011
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Publication #:
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Pub Dt:
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05/05/2011
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Title:
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APPARATUS AND METHOD FOR HARDENING LATCHES IN SOI CMOS DEVICES
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Issue Dt:
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10/01/2013
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12987202
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Filing Dt:
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01/10/2011
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Publication #:
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Pub Dt:
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07/12/2012
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Title:
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ALIGNMENT MARKS TO ENABLE 3D INTEGRATION
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Issue Dt:
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09/17/2013
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Application #:
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12987221
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Filing Dt:
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01/10/2011
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Publication #:
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Pub Dt:
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07/12/2012
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Title:
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SELF-ALIGNED CONTACTS FOR HIGH K/METAL GATE PROCESS FLOW
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Issue Dt:
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05/13/2014
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Application #:
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12987353
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Filing Dt:
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01/10/2011
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Publication #:
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Pub Dt:
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07/12/2012
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Title:
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METHODS AND APPARATUS FOR DETECTION OF GASEOUS CORROSIVE CONTAMINANTS
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Patent #:
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Issue Dt:
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05/08/2012
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Application #:
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13004201
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Filing Dt:
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01/11/2011
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Title:
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PROCESS FOR EPITAXIALLY GROWING EPITAXIAL MATERIAL REGIONS
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Issue Dt:
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03/12/2013
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Application #:
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13004471
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Filing Dt:
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01/11/2011
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Pub Dt:
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05/26/2011
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Title:
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SINGLE MASK ADDER PHASE CHANGE MEMORY ELEMENT
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Issue Dt:
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01/08/2013
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Application #:
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13004883
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Filing Dt:
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01/12/2011
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Publication #:
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Pub Dt:
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07/12/2012
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Title:
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FLASH ANALOG TO DIGITAL CONVERTER WITH METHOD AND SYSTEM FOR DYNAMIC CALIBRATION
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Patent #:
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Issue Dt:
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05/07/2013
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Application #:
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13005089
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Filing Dt:
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01/12/2011
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Publication #:
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Pub Dt:
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07/12/2012
| | | | |
Title:
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IMPLEMENTING SEMICONDUCTOR SOC WITH METAL VIA GATE NODE HIGH PERFORMANCE STACKED TRANSISTORS
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Patent #:
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Issue Dt:
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02/19/2013
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Application #:
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13005246
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Filing Dt:
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01/12/2011
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Publication #:
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Pub Dt:
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05/12/2011
| | | | |
Title:
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METHOD AND APPARATUS FOR OPTICAL MODULATION
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Issue Dt:
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03/11/2014
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Application #:
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13005560
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01/13/2011
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Publication #:
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Pub Dt:
|
07/19/2012
| | | | |
Title:
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SEMICONDUCTOR STRUCTURES WITH THINNED JUNCTIONS AND METHODS OF MANUFACTURE
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