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Reel/Frame:054633/0001   Pages: 1245
Recorded: 11/02/2020
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 8468
Page 33 of 85
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85
1
Patent #:
Issue Dt:
04/02/2013
Application #:
12914570
Filing Dt:
10/28/2010
Publication #:
Pub Dt:
08/04/2011
Title:
REPLACEMENT GATE APPROACH BASED ON A REVERSE OFFSET SPACER APPLIED PRIOR TO WORK FUNCTION METAL DEPOSITION
2
Patent #:
Issue Dt:
08/28/2012
Application #:
12914644
Filing Dt:
10/28/2010
Publication #:
Pub Dt:
05/03/2012
Title:
OPTIMIZED SEMICONDUCTOR PACKAGING IN A THREE-DIMENSIONAL STACK
3
Patent #:
Issue Dt:
04/23/2013
Application #:
12914730
Filing Dt:
10/28/2010
Publication #:
Pub Dt:
05/03/2012
Title:
Thermal Power Plane for Integrated Circuits
4
Patent #:
Issue Dt:
11/01/2011
Application #:
12915216
Filing Dt:
10/29/2010
Publication #:
Pub Dt:
08/04/2011
Title:
REDUCING CONTAMINATION IN A PROCESS FLOW OF FORMING A CHANNEL SEMICONDUCTOR ALLOY IN A SEMICONDUCTOR DEVICE
5
Patent #:
Issue Dt:
12/31/2013
Application #:
12915888
Filing Dt:
10/29/2010
Publication #:
Pub Dt:
05/03/2012
Title:
ANTI-BLOOMING PIXEL SENSOR CELL WITH ACTIVE NEUTRAL DENSITY FILTER, METHODS OF MANUFACTURE, AND DESIGN STRUCTURE
6
Patent #:
Issue Dt:
01/01/2013
Application #:
12915923
Filing Dt:
10/29/2010
Publication #:
Pub Dt:
05/03/2012
Title:
SPLIT-LAYER DESIGN FOR DOUBLE PATTERNING LITHOGRAPHY
7
Patent #:
Issue Dt:
07/31/2012
Application #:
12916864
Filing Dt:
11/01/2010
Publication #:
Pub Dt:
05/03/2012
Title:
LATERAL EPITAXIAL GROWN SOI IN DEEP TRENCH STRUCTURES AND METHODS OF MANUFACTURE
8
Patent #:
Issue Dt:
07/31/2012
Application #:
12917029
Filing Dt:
11/01/2010
Publication #:
Pub Dt:
05/03/2012
Title:
STRUCTURE AND DESIGN STRUCTURE FOR HIGH-Q VALUE INDUCTOR AND METHOD OF MANUFACTURING THE SAME
9
Patent #:
Issue Dt:
06/12/2012
Application #:
12917700
Filing Dt:
11/02/2010
Publication #:
Pub Dt:
09/01/2011
Title:
TRANSISTORS COMPRISING HIGH-K METAL GATE ELECTRODE STRUCTURES AND ADAPTED CHANNEL SEMICONDUCTOR MATERIALS
10
Patent #:
Issue Dt:
11/26/2013
Application #:
12938411
Filing Dt:
11/03/2010
Publication #:
Pub Dt:
05/03/2012
Title:
SELF-UPDATING NODE CONTROLLER FOR AN ENDPOINT IN A CLOUD COMPUTING ENVIRONMENT
11
Patent #:
Issue Dt:
08/13/2013
Application #:
12939282
Filing Dt:
11/04/2010
Publication #:
Pub Dt:
09/01/2011
Title:
FIELD EFFECT TRANSISTORS FOR A FLASH MEMORY COMPRISING A SELF-ALIGNED CHARGE STORAGE REGION
12
Patent #:
Issue Dt:
07/09/2013
Application #:
12939471
Filing Dt:
11/04/2010
Publication #:
Pub Dt:
09/01/2011
Title:
ASSESSING METAL STACK INTEGRITY IN SOPHISTICATED SEMICONDUCTOR DEVICES BY MECHANICALLY STRESSING DIE CONTACTS
13
Patent #:
Issue Dt:
02/04/2014
Application #:
12939506
Filing Dt:
11/04/2010
Publication #:
Pub Dt:
05/10/2012
Title:
DEVICES HAVING REDUCED SUSCEPTIBILITY TO SOFT-ERROR EFFECTS AND METHOD FOR FABRICATION
14
Patent #:
Issue Dt:
11/12/2013
Application #:
12939523
Filing Dt:
11/04/2010
Publication #:
Pub Dt:
09/01/2011
Title:
CONTACT ELEMENTS OF SEMICONDUCTOR DEVICES COMPRISING A CONTINUOUS TRANSITION TO METAL LINES OF A METALLIZATION LAYER
15
Patent #:
Issue Dt:
08/07/2012
Application #:
12939538
Filing Dt:
11/04/2010
Publication #:
Pub Dt:
02/24/2011
Title:
FUSE LINK STRUCTURES USING FILM STRESS FOR PROGRAMMING AND METHODS OF MANUFACTURE
16
Patent #:
Issue Dt:
07/31/2012
Application #:
12939668
Filing Dt:
11/04/2010
Publication #:
Pub Dt:
05/10/2012
Title:
VERTICAL HETEROJUNCTION BIPOLAR TRANSISTORS WITH REDUCED BASE-COLLECTOR JUNCTION CAPACITANCE
17
Patent #:
Issue Dt:
10/15/2013
Application #:
12940095
Filing Dt:
11/05/2010
Publication #:
Pub Dt:
05/10/2012
Title:
Biodegradable Device and Mesh Network for Optimization of Payload Material Delivery
18
Patent #:
Issue Dt:
07/23/2013
Application #:
12940210
Filing Dt:
11/05/2010
Publication #:
Pub Dt:
05/10/2012
Title:
GATE-TO-GATE RECESSED STRAP AND METHODS OF MANUFACTURE OF SAME
19
Patent #:
Issue Dt:
12/04/2012
Application #:
12941042
Filing Dt:
11/06/2010
Publication #:
Pub Dt:
05/10/2012
Title:
CONTACTS FOR FET DEVICES
20
Patent #:
Issue Dt:
12/17/2013
Application #:
12941185
Filing Dt:
11/08/2010
Publication #:
Pub Dt:
10/06/2011
Title:
METHODS OF FORMING EFUSE DEVICES
21
Patent #:
Issue Dt:
10/22/2013
Application #:
12941595
Filing Dt:
11/08/2010
Publication #:
Pub Dt:
10/06/2011
Title:
ELECTRONIC FUSE STRUCTURE FORMED USING A METAL GATE ELECTRODE MATERIAL STACK CONFIGURATION
22
Patent #:
Issue Dt:
12/31/2013
Application #:
12941771
Filing Dt:
11/08/2010
Publication #:
Pub Dt:
05/10/2012
Title:
METHOD TO REDUCE GROUND-PLANE POISONING OF EXTREMELY-THIN SOI (ETSOI) LAYER WITH THIN BURIED OXIDE
23
Patent #:
Issue Dt:
09/24/2013
Application #:
12942490
Filing Dt:
11/09/2010
Publication #:
Pub Dt:
05/10/2012
Title:
FORMATION OF A GRAPHENE LAYER ON A LARGE SUBSTRATE
24
Patent #:
Issue Dt:
07/30/2013
Application #:
12942506
Filing Dt:
11/09/2010
Publication #:
Pub Dt:
10/06/2011
Title:
SEMICONDUCTOR DEVICE COMPRISING METAL GATE STRUCTURES FORMED BY A REPLACEMENT GATE APPROACH AND EFUSES INCLUDING A SILICIDE
25
Patent #:
Issue Dt:
09/24/2013
Application #:
12942662
Filing Dt:
11/09/2010
Publication #:
Pub Dt:
05/10/2012
Title:
THREE-DIMENSIONAL (3D) STACKED INTEGRATED CIRCUIT TESTING
26
Patent #:
Issue Dt:
01/28/2014
Application #:
12943995
Filing Dt:
11/11/2010
Publication #:
Pub Dt:
05/17/2012
Title:
SELF-ALIGNED CONTACT EMPLOYING A DIELECTRIC METAL OXIDE SPACER
27
Patent #:
Issue Dt:
08/20/2013
Application #:
12944020
Filing Dt:
11/11/2010
Publication #:
Pub Dt:
05/17/2012
Title:
IMPLEMENTING VERTICAL DIE STACKING TO DISTRIBUTE LOGICAL FUNCTION OVER MULTIPLE DIES IN THROUGH-SILICON-VIA STACKED SEMICONDUCTOR DEVICE
28
Patent #:
Issue Dt:
08/07/2012
Application #:
12944480
Filing Dt:
11/11/2010
Publication #:
Pub Dt:
05/17/2012
Title:
METHOD AND SYSTEM FOR OPTIMIZING A DEVICE WITH CURRENT SOURCE MODELS
29
Patent #:
Issue Dt:
08/21/2012
Application #:
12944493
Filing Dt:
11/11/2010
Publication #:
Pub Dt:
05/17/2012
Title:
SLACK-BASED TIMING BUDGET APPORTIONMENT
30
Patent #:
Issue Dt:
09/03/2013
Application #:
12944682
Filing Dt:
11/11/2010
Publication #:
Pub Dt:
05/17/2012
Title:
METHOD AND APPARATUS FOR OPTIMAL CACHE SIZING AND CONFIGURATION FOR LARGE MEMORY SYSTEMS
31
Patent #:
Issue Dt:
12/17/2013
Application #:
12946875
Filing Dt:
11/16/2010
Publication #:
Pub Dt:
05/17/2012
Title:
POST SILICIDE TESTING FOR REPLACEMENT HIGH-K METAL GATE TECHNOLOGIES
32
Patent #:
Issue Dt:
10/08/2013
Application #:
12946925
Filing Dt:
11/16/2010
Publication #:
Pub Dt:
05/17/2012
Title:
FREE COOLING SOLUTION FOR A CONTAINERIZED DATA CENTER
33
Patent #:
Issue Dt:
03/04/2014
Application #:
12947445
Filing Dt:
11/16/2010
Publication #:
Pub Dt:
05/17/2012
Title:
Clock Optimization with Local Clock Buffer Control Optimization
34
Patent #:
Issue Dt:
10/01/2013
Application #:
12948031
Filing Dt:
11/17/2010
Publication #:
Pub Dt:
05/17/2012
Title:
Replacement Gate Having Work Function at Valence Band Edge
35
Patent #:
Issue Dt:
10/23/2012
Application #:
12948165
Filing Dt:
11/17/2010
Publication #:
Pub Dt:
05/17/2012
Title:
IMPLEMENTING SPARE LATCH PLACEMENT QUALITY DETERMINATION
36
Patent #:
Issue Dt:
08/07/2012
Application #:
12949108
Filing Dt:
11/18/2010
Publication #:
Pub Dt:
03/17/2011
Title:
BIPOLAR TRANSISTOR WITH RAISED EXTRINSIC SELF-ALIGNED BASE USING SELECTIVE EPITAXIAL GROWTH FOR BICMOS INTEGRATION
37
Patent #:
Issue Dt:
06/18/2013
Application #:
12949158
Filing Dt:
11/18/2010
Publication #:
Pub Dt:
05/19/2011
Title:
Method of Forming Metal Interconnect Structures in Ultra Low-K Dielectrics
38
Patent #:
Issue Dt:
12/04/2012
Application #:
12949328
Filing Dt:
11/18/2010
Publication #:
Pub Dt:
05/24/2012
Title:
PARTITIONING FOR HARDWARE-ACCELERATED FUNCTIONAL VERIFICATION
39
Patent #:
Issue Dt:
07/16/2013
Application #:
12950635
Filing Dt:
11/19/2010
Publication #:
Pub Dt:
05/24/2012
Title:
THIN FILM RESISTORS AND METHODS OF MANUFACTURE
40
Patent #:
Issue Dt:
07/23/2013
Application #:
12951107
Filing Dt:
11/22/2010
Publication #:
Pub Dt:
05/24/2012
Title:
METHOD OF FORMING E-FUSE IN REPLACEMENT METAL GATE MANUFACTURING PROCESS
41
Patent #:
Issue Dt:
03/05/2013
Application #:
12951516
Filing Dt:
11/22/2010
Publication #:
Pub Dt:
05/24/2012
Title:
HETEROJUNCTION BIPOLAR TRANSISTORS WITH REDUCED BASE RESISTANCE
42
Patent #:
Issue Dt:
01/21/2014
Application #:
12951597
Filing Dt:
11/22/2010
Publication #:
Pub Dt:
05/24/2012
Title:
FABRICATING PHOTONICS DEVICES FULLY INTEGRATED INTO A CMOS MANUFACTURING PROCESS
43
Patent #:
Issue Dt:
07/16/2013
Application #:
12952465
Filing Dt:
11/23/2010
Publication #:
Pub Dt:
05/26/2011
Title:
Method of Manufacturing a Photovoltaic Cell
44
Patent #:
Issue Dt:
09/03/2013
Application #:
12955203
Filing Dt:
11/29/2010
Publication #:
Pub Dt:
05/31/2012
Title:
III-V COMPOUND SEMICONDUCTOR MATERIAL PASSIVATION WITH CRYSTALLINE INTERLAYER
45
Patent #:
Issue Dt:
03/20/2012
Application #:
12955224
Filing Dt:
11/29/2010
Title:
FORMING AN OXIDE MEMS BEAM
46
Patent #:
Issue Dt:
03/13/2012
Application #:
12955883
Filing Dt:
11/29/2010
Title:
REMOVABLE AND REPLACEABLE DUAL-SIDED CONNECTOR PIN INTERPOSER
47
Patent #:
Issue Dt:
04/23/2013
Application #:
12958607
Filing Dt:
12/02/2010
Publication #:
Pub Dt:
06/07/2012
Title:
Self-Aligned Contact For Replacement Gate Devices
48
Patent #:
Issue Dt:
07/09/2013
Application #:
12958608
Filing Dt:
12/02/2010
Publication #:
Pub Dt:
06/07/2012
Title:
SELF-ALIGNED CONTACT COMBINED WITH A REPLACEMENT METAL GATE/HIGH-K GATE DIELECTRIC
49
Patent #:
Issue Dt:
08/27/2013
Application #:
12958685
Filing Dt:
12/02/2010
Publication #:
Pub Dt:
06/07/2012
Title:
VAPOR CLEAN FOR HAZE AND PARTICLE REMOVAL FROM LITHOGRAPHIC PHOTOMASKS
50
Patent #:
Issue Dt:
07/02/2013
Application #:
12959993
Filing Dt:
12/03/2010
Publication #:
Pub Dt:
06/07/2012
Title:
PROGRAM DISTURB ERROR LOGGING AND CORRECTION FOR FLASH MEMORY
51
Patent #:
Issue Dt:
06/11/2013
Application #:
12960004
Filing Dt:
12/03/2010
Publication #:
Pub Dt:
06/07/2012
Title:
PROBABILISTIC MULTI-TIER ERROR CORRECTION IN NOT-AND (NAND) FLASH MEMORY
52
Patent #:
Issue Dt:
06/18/2013
Application #:
12960589
Filing Dt:
12/06/2010
Publication #:
Pub Dt:
06/07/2012
Title:
STRUCTURE AND METHOD FOR Vt TUNING AND SHORT CHANNEL CONTROL WITH HIGH K/METAL GATE MOSFETs
53
Patent #:
Issue Dt:
02/19/2013
Application #:
12960593
Filing Dt:
12/06/2010
Publication #:
Pub Dt:
06/07/2012
Title:
POLY RESISTOR AND METAL GATE FABRICATION AND STRUCTURE
54
Patent #:
Issue Dt:
10/29/2013
Application #:
12961553
Filing Dt:
12/07/2010
Publication #:
Pub Dt:
06/07/2012
Title:
METAL SEMICONDUCTOR ALLOY CONTACT WITH LOW RESISTANCE
55
Patent #:
Issue Dt:
11/26/2013
Application #:
12962722
Filing Dt:
12/08/2010
Publication #:
Pub Dt:
06/14/2012
Title:
THERMALLY CONTROLLED REFRACTORY METAL RESISTOR
56
Patent #:
Issue Dt:
10/02/2012
Application #:
12963246
Filing Dt:
12/08/2010
Publication #:
Pub Dt:
06/14/2012
Title:
CREATING SCAN CHAIN DEFINITION FROM HIGH-LEVEL MODEL USING HIGH-LEVEL MODEL SIMULATION
57
Patent #:
Issue Dt:
04/09/2013
Application #:
12963314
Filing Dt:
12/08/2010
Publication #:
Pub Dt:
06/14/2012
Title:
NARROW-BAND WIDE-RANGE FREQUENCY MODULATION CONTINUOUS WAVE (FMCW) RADAR SYSTEM
58
Patent #:
Issue Dt:
05/22/2012
Application #:
12963908
Filing Dt:
12/09/2010
Publication #:
Pub Dt:
11/03/2011
Title:
REDUCED DEFECTIVITY IN CONTACTS OF A SEMICONDUCTOR DEVICE COMPRISING REPLACEMENT GATE ELECTRODE STRUCTURES BY USING AN INTERMEDIATE CAP LAYER
59
Patent #:
Issue Dt:
08/20/2013
Application #:
12964082
Filing Dt:
12/09/2010
Publication #:
Pub Dt:
06/14/2012
Title:
PSEUDO BUTTED JUNCTION STRUCTURE FOR BACK PLANE CONNECTION
60
Patent #:
Issue Dt:
10/15/2013
Application #:
12964340
Filing Dt:
12/09/2010
Publication #:
Pub Dt:
06/14/2012
Title:
ADDING SCALABILITY AND FAULT TOLERANCE TO GENERIC FINITE STATE MACHINE FRAMEWORKS FOR USE IN AUTOMATED INCIDENT MANAGEMENT OF CLOUD COMPUTING INFRASTRUCTURES
61
Patent #:
Issue Dt:
01/27/2015
Application #:
12965118
Filing Dt:
12/10/2010
Publication #:
Pub Dt:
12/01/2011
Title:
Reduction of Defect Rates in PFET Transistors Comprising a Si/Ge Semiconductor Material Formed by Epitaxial Growth
62
Patent #:
Issue Dt:
02/03/2015
Application #:
12965212
Filing Dt:
12/10/2010
Publication #:
Pub Dt:
12/01/2011
Title:
Semiconductor Device Comprising a Buried Capacitor Formed in the Contact Level
63
Patent #:
Issue Dt:
03/18/2014
Application #:
12965341
Filing Dt:
12/10/2010
Publication #:
Pub Dt:
01/05/2012
Title:
TEST STRUCTURE FOR CONTROLLING THE INCORPORATION OF SEMICONDUCTOR ALLOYS IN TRANSISTORS COMPRISING HIGH-K METAL GATE ELECTRODE STRUCTURES
64
Patent #:
Issue Dt:
12/17/2013
Application #:
12967114
Filing Dt:
12/14/2010
Publication #:
Pub Dt:
06/14/2012
Title:
SELF-PROTECTED ELECTROSTATIC DISCHARGE FIELD EFFECT TRANSISTOR (SPESDFET), AN INTEGRATED CIRCUIT INCORPORATING THE SPESDFET AS AN INPUT/OUTPUT (I/O) PAD DRIVER AND ASSOCIATED METHODS OF FORMING THE SPESDFET AND THE INTEGRATED CIRCUIT
65
Patent #:
Issue Dt:
11/19/2013
Application #:
12967308
Filing Dt:
12/14/2010
Publication #:
Pub Dt:
06/14/2012
Title:
ELECTRICAL FUSE WITH A CURRENT SHUNT
66
Patent #:
Issue Dt:
02/10/2015
Application #:
12968068
Filing Dt:
12/14/2010
Publication #:
Pub Dt:
06/14/2012
Title:
SEMICONDUCTOR DEVICES HAVING THROUGH-CONTACTS AND RELATED FABRICATION METHODS
67
Patent #:
Issue Dt:
02/25/2014
Application #:
12968864
Filing Dt:
12/15/2010
Publication #:
Pub Dt:
06/21/2012
Title:
STRESS TESTING OF SILICON-ON-INSULATOR SUBSTRATES USING APPLIED ELECTROSTATIC DISCHARGE
68
Patent #:
Issue Dt:
05/21/2013
Application #:
12969004
Filing Dt:
12/15/2010
Publication #:
Pub Dt:
06/21/2012
Title:
METAL-INSULATOR-METAL CAPACITORS WITH HIGH CAPACITANCE DENSITY
69
Patent #:
Issue Dt:
12/03/2013
Application #:
12970553
Filing Dt:
12/16/2010
Publication #:
Pub Dt:
01/05/2012
Title:
SEMICONDUCTOR DEVICE COMPRISING THROUGH HOLE VIAS HAVING A STRESS RELAXATION MECHANISM
70
Patent #:
Issue Dt:
12/25/2012
Application #:
12972980
Filing Dt:
12/20/2010
Publication #:
Pub Dt:
06/21/2012
Title:
TASK-BASED MULTI-PROCESS DESIGN SYNTHESIS WITH REPRODUCIBLE TRANSFORMS
71
Patent #:
Issue Dt:
02/17/2015
Application #:
12973147
Filing Dt:
12/20/2010
Publication #:
Pub Dt:
12/29/2011
Title:
PLANAR CAVITY MEMS AND RELATED STRUCTURES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES
72
Patent #:
Issue Dt:
04/01/2014
Application #:
12973285
Filing Dt:
12/20/2010
Publication #:
Pub Dt:
12/29/2011
Title:
PLANAR CAVITY MEMS AND RELATED STRUCTURES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES
73
Patent #:
Issue Dt:
05/13/2014
Application #:
12973430
Filing Dt:
12/20/2010
Publication #:
Pub Dt:
12/29/2011
Title:
PLANAR CAVITY MEMS AND RELATED STRUCTURES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES
74
Patent #:
Issue Dt:
02/11/2014
Application #:
12974037
Filing Dt:
12/21/2010
Publication #:
Pub Dt:
06/21/2012
Title:
Encapsulation of Closely Spaced Gate Electrode Structures
75
Patent #:
Issue Dt:
08/02/2016
Application #:
12974854
Filing Dt:
12/21/2010
Publication #:
Pub Dt:
12/29/2011
Title:
PLANAR CAVITY MEMS AND RELATED STRUCTURES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES
76
Patent #:
Issue Dt:
09/24/2013
Application #:
12975701
Filing Dt:
12/22/2010
Publication #:
Pub Dt:
06/28/2012
Title:
INTEGRATED CIRCUIT FABRICATION METHODS UTILIZING EMBEDDED HARDMASK LAYERS FOR HIGH RESOLUTION PATTERNING
77
Patent #:
Issue Dt:
11/05/2013
Application #:
12982014
Filing Dt:
12/30/2010
Publication #:
Pub Dt:
07/21/2011
Title:
MATERIALS AND METHODS FOR IMMOBILIZATION OF CATALYSTS ON SURFACES AND FOR SELECTIVE ELECTROLESS METALLIZATION
78
Patent #:
Issue Dt:
06/25/2013
Application #:
12983353
Filing Dt:
01/03/2011
Publication #:
Pub Dt:
07/05/2012
Title:
STRUCTURE, METHOD AND SYSTEM FOR COMPLEMENTARY STRAIN FILL FOR INTEGRATED CIRCUIT CHIPS
79
Patent #:
Issue Dt:
06/17/2014
Application #:
12983489
Filing Dt:
01/03/2011
Publication #:
Pub Dt:
07/05/2012
Title:
JUNCTION FIELD EFFECT TRANSISTOR STRUCTURE WITH P-TYPE SILICON GERMANIUM OR SILICON GERMANIUM CARBIDE GATE(S) AND METHOD OF FORMING THE STRUCTURE
80
Patent #:
Issue Dt:
01/15/2013
Application #:
12983552
Filing Dt:
01/03/2011
Publication #:
Pub Dt:
04/28/2011
Title:
SMALL AREA, ROBUST SILICON VIA STRUCTURE AND PROCESS
81
Patent #:
Issue Dt:
10/30/2012
Application #:
12983925
Filing Dt:
01/04/2011
Publication #:
Pub Dt:
07/05/2012
Title:
FIELD EFFECT TRANSISTOR HAVING OHMIC BODY CONTACT(S), AN INTEGRATED CIRCUIT STRUCTURE INCORPORATING STACKED FIELD EFFECT TRANSISTORS WITH SUCH OHMIC BODY CONTACTS AND ASSOCIATED METHODS
82
Patent #:
Issue Dt:
05/27/2014
Application #:
12984180
Filing Dt:
01/04/2011
Publication #:
Pub Dt:
07/05/2012
Title:
ADVANCED ROUTING OF VEHICLE FLEETS
83
Patent #:
Issue Dt:
09/10/2013
Application #:
12984252
Filing Dt:
01/04/2011
Publication #:
Pub Dt:
08/18/2011
Title:
CACHE DIRECTORY LOOK-UP RE-USE AS CONFLICT CHECK MECHANISM FOR SPECULATIVE MEMORY REQUESTS
84
Patent #:
Issue Dt:
09/16/2014
Application #:
12984308
Filing Dt:
01/04/2011
Publication #:
Pub Dt:
07/14/2011
Title:
EVICT ON WRITE, A MANAGEMENT STRATEGY FOR A PREFETCH UNIT AND/OR FIRST LEVEL CACHE IN A MULTIPROCESSOR SYSTEM WITH SPECULATIVE EXECUTION
85
Patent #:
Issue Dt:
12/10/2013
Application #:
12984359
Filing Dt:
01/04/2011
Publication #:
Pub Dt:
07/05/2012
Title:
FLAT RESPONSE DEVICE STRUCTURES FOR BIPOLAR JUNCTION TRANSISTORS
86
Patent #:
Issue Dt:
01/28/2014
Application #:
12984653
Filing Dt:
01/05/2011
Publication #:
Pub Dt:
05/12/2011
Title:
VERTICAL NANOWIRE FET DEVICES
87
Patent #:
Issue Dt:
03/27/2012
Application #:
12984682
Filing Dt:
01/05/2011
Publication #:
Pub Dt:
04/28/2011
Title:
MEMORY READING METHOD FOR RESISTANCE DRIFT MITIGATION
88
Patent #:
Issue Dt:
12/24/2013
Application #:
12985462
Filing Dt:
01/06/2011
Publication #:
Pub Dt:
07/12/2012
Title:
VOLTAGE DRIVER FOR A VOLTAGE-DRIVEN INTELLIGENT CHARACTERIZATION BENCH FOR SEMICONDUCTOR
89
Patent #:
Issue Dt:
12/09/2014
Application #:
12985840
Filing Dt:
01/06/2011
Publication #:
Pub Dt:
07/12/2012
Title:
SILICON CONTROLLED RECTIFIERS (SCR), METHODS OF MANUFACTURE AND DESIGN STRUCTURES
90
Patent #:
Issue Dt:
02/11/2014
Application #:
12986266
Filing Dt:
01/07/2011
Publication #:
Pub Dt:
07/12/2012
Title:
CONDUCTIVE METAL AND DIFFUSION BARRIER SEED COMPOSITIONS, AND METHODS OF USE IN SEMICONDUCTOR AND INTERLEVEL DIELECTRIC SUBSTRATES
91
Patent #:
Issue Dt:
01/15/2013
Application #:
12987106
Filing Dt:
01/08/2011
Publication #:
Pub Dt:
05/05/2011
Title:
APPARATUS AND METHOD FOR HARDENING LATCHES IN SOI CMOS DEVICES
92
Patent #:
Issue Dt:
10/01/2013
Application #:
12987202
Filing Dt:
01/10/2011
Publication #:
Pub Dt:
07/12/2012
Title:
ALIGNMENT MARKS TO ENABLE 3D INTEGRATION
93
Patent #:
Issue Dt:
09/17/2013
Application #:
12987221
Filing Dt:
01/10/2011
Publication #:
Pub Dt:
07/12/2012
Title:
SELF-ALIGNED CONTACTS FOR HIGH K/METAL GATE PROCESS FLOW
94
Patent #:
Issue Dt:
05/13/2014
Application #:
12987353
Filing Dt:
01/10/2011
Publication #:
Pub Dt:
07/12/2012
Title:
METHODS AND APPARATUS FOR DETECTION OF GASEOUS CORROSIVE CONTAMINANTS
95
Patent #:
Issue Dt:
05/08/2012
Application #:
13004201
Filing Dt:
01/11/2011
Title:
PROCESS FOR EPITAXIALLY GROWING EPITAXIAL MATERIAL REGIONS
96
Patent #:
Issue Dt:
03/12/2013
Application #:
13004471
Filing Dt:
01/11/2011
Publication #:
Pub Dt:
05/26/2011
Title:
SINGLE MASK ADDER PHASE CHANGE MEMORY ELEMENT
97
Patent #:
Issue Dt:
01/08/2013
Application #:
13004883
Filing Dt:
01/12/2011
Publication #:
Pub Dt:
07/12/2012
Title:
FLASH ANALOG TO DIGITAL CONVERTER WITH METHOD AND SYSTEM FOR DYNAMIC CALIBRATION
98
Patent #:
Issue Dt:
05/07/2013
Application #:
13005089
Filing Dt:
01/12/2011
Publication #:
Pub Dt:
07/12/2012
Title:
IMPLEMENTING SEMICONDUCTOR SOC WITH METAL VIA GATE NODE HIGH PERFORMANCE STACKED TRANSISTORS
99
Patent #:
Issue Dt:
02/19/2013
Application #:
13005246
Filing Dt:
01/12/2011
Publication #:
Pub Dt:
05/12/2011
Title:
METHOD AND APPARATUS FOR OPTICAL MODULATION
100
Patent #:
Issue Dt:
03/11/2014
Application #:
13005560
Filing Dt:
01/13/2011
Publication #:
Pub Dt:
07/19/2012
Title:
SEMICONDUCTOR STRUCTURES WITH THINNED JUNCTIONS AND METHODS OF MANUFACTURE
Assignor
1
Exec Dt:
10/22/2020
Assignee
1
2600 GREAT AMERICA WAY
SANTA CLARA, CALIFORNIA 95054
Correspondence name and address
GLOBALFOUNDRIES SINGAPORE PTE. LTD.
60 WOODLANDS INDUSTRIAL PARK D STREET 2,
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