|
|
Patent #:
|
|
Issue Dt:
|
01/03/2012
|
Application #:
|
13005894
|
Filing Dt:
|
01/13/2011
|
Publication #:
|
|
Pub Dt:
|
05/12/2011
| | | | |
Title:
|
SRAM CELL HAVING A RECTANGULAR COMBINED ACTIVE AREA FOR PLANAR PASS GATE AND PLANAR PULL-DOWN NFETS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2013
|
Application #:
|
13006081
|
Filing Dt:
|
01/13/2011
|
Publication #:
|
|
Pub Dt:
|
07/19/2012
| | | | |
Title:
|
RADIATION HARDENED TRANSISTORS BASED ON GRAPHENE AND CARBON NANOTUBES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2013
|
Application #:
|
13006656
|
Filing Dt:
|
01/14/2011
|
Publication #:
|
|
Pub Dt:
|
07/19/2012
| | | | |
Title:
|
REPLACEMENT GATE WITH REDUCED GATE LEAKAGE CURRENT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
13007242
|
Filing Dt:
|
01/14/2011
|
Publication #:
|
|
Pub Dt:
|
07/19/2012
| | | | |
Title:
|
MULTIPLE LITHOGRAPHIC SYSTEM MASK SHAPE SLEEVING
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2013
|
Application #:
|
13007644
|
Filing Dt:
|
01/16/2011
|
Publication #:
|
|
Pub Dt:
|
07/19/2012
| | | | |
Title:
|
HIGH-SPEED GRAPHENE TRANSISTOR AND METHOD OF FABRICATION BY PATTERNABLE HARD MASK MATERIALS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/18/2014
|
Application #:
|
13008459
|
Filing Dt:
|
01/18/2011
|
Publication #:
|
|
Pub Dt:
|
07/19/2012
| | | | |
Title:
|
COMPACT THERMALLY CONTROLLED THIN FILM RESISTORS UTILIZING SUBSTRATE CONTACTS AND METHODS OF MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2012
|
Application #:
|
13008465
|
Filing Dt:
|
01/18/2011
|
Publication #:
|
|
Pub Dt:
|
07/19/2012
| | | | |
Title:
|
COMPACT THERMALLY CONTROLLED THIN FILM RESISTORS UTILIZING SUBSTRATE CONTACTS AND METHODS OF MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/29/2016
|
Application #:
|
13008531
|
Filing Dt:
|
01/18/2011
|
Publication #:
|
|
Pub Dt:
|
09/08/2011
| | | | |
Title:
|
CACHE AS POINT OF COHERENCE IN MULTIPROCESSOR SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2014
|
Application #:
|
13008602
|
Filing Dt:
|
01/18/2011
|
Publication #:
|
|
Pub Dt:
|
09/08/2011
| | | | |
Title:
|
CACHE DIRECTORY LOOKUP READER SET ENCODING FOR PARTIAL CACHE LINE SPECULATION SUPPORT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2013
|
Application #:
|
13009029
|
Filing Dt:
|
01/19/2011
|
Publication #:
|
|
Pub Dt:
|
07/19/2012
| | | | |
Title:
|
STRESSED CHANNEL FET WITH SOURCE/DRAIN BUFFERS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2013
|
Application #:
|
13009048
|
Filing Dt:
|
01/19/2011
|
Publication #:
|
|
Pub Dt:
|
07/19/2012
| | | | |
Title:
|
SEMICONDUCTOR STRUCTURE AND CIRCUIT INCLUDING ORDERED ARRANGEMENT OF GRAPHENE NANORIBBONS, AND METHODS OF FORMING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2013
|
Application #:
|
13009280
|
Filing Dt:
|
01/19/2011
|
Publication #:
|
|
Pub Dt:
|
07/19/2012
| | | | |
Title:
|
Graphene Devices and Silicon Field Effect Transistors in 3D Hybrid Integrated Circuits
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/2015
|
Application #:
|
13010184
|
Filing Dt:
|
01/20/2011
|
Publication #:
|
|
Pub Dt:
|
07/26/2012
| | | | |
Title:
|
TRANSFERRING HEAT THROUGH AN OPTICAL LAYER OF INTEGRATED CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/08/2013
|
Application #:
|
13010285
|
Filing Dt:
|
01/20/2011
|
Publication #:
|
|
Pub Dt:
|
07/26/2012
| | | | |
Title:
|
TRACK AND HOLD AMPLIFIERS AND DIGITAL CALIBRATION FOR ANALOG-TO-DIGITAL CONVERTERS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2014
|
Application #:
|
13010391
|
Filing Dt:
|
01/20/2011
|
Publication #:
|
|
Pub Dt:
|
07/26/2012
| | | | |
Title:
|
METHODS FOR ANALYZING CELLS OF A CELL LIBRARY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2014
|
Application #:
|
13012137
|
Filing Dt:
|
01/24/2011
|
Publication #:
|
|
Pub Dt:
|
07/26/2012
| | | | |
Title:
|
SEMICONDUCTOR-ON-INSULATOR DEVICE WITH ASYMMETRIC STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/2013
|
Application #:
|
13012142
|
Filing Dt:
|
01/24/2011
|
Publication #:
|
|
Pub Dt:
|
04/05/2012
| | | | |
Title:
|
Shallow Trench Isolation Chemical Mechanical Planarization
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2014
|
Application #:
|
13012147
|
Filing Dt:
|
01/24/2011
|
Publication #:
|
|
Pub Dt:
|
07/26/2012
| | | | |
Title:
|
LOW ENERGY ELECTROMAGNETIC RELAY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2013
|
Application #:
|
13012821
|
Filing Dt:
|
01/25/2011
|
Publication #:
|
|
Pub Dt:
|
04/05/2012
| | | | |
Title:
|
CHEMICAL MECHANICAL PLANARIZATION WITH OVERBURDEN MASK
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2013
|
Application #:
|
13012836
|
Filing Dt:
|
01/25/2011
|
Publication #:
|
|
Pub Dt:
|
04/05/2012
| | | | |
Title:
|
Chemical Mechanical Planarization Processes For Fabrication of FINFET Devices
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2013
|
Application #:
|
13012879
|
Filing Dt:
|
01/25/2011
|
Publication #:
|
|
Pub Dt:
|
04/05/2012
| | | | |
Title:
|
FABRICATION OF REPLACEMENT METAL GATE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2014
|
Application #:
|
13013108
|
Filing Dt:
|
01/25/2011
|
Publication #:
|
|
Pub Dt:
|
07/26/2012
| | | | |
Title:
|
AIR-DIELECTRIC FOR SUBTRACTIVE ETCH LINE AND VIA METALLIZATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2013
|
Application #:
|
13013133
|
Filing Dt:
|
01/25/2011
|
Publication #:
|
|
Pub Dt:
|
07/26/2012
| | | | |
Title:
|
TEST STRUCTURE FOR DETECTION OF GAP IN CONDUCTIVE LAYER OF MULTILAYER GATE STACK
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2013
|
Application #:
|
13013357
|
Filing Dt:
|
01/25/2011
|
Publication #:
|
|
Pub Dt:
|
07/26/2012
| | | | |
Title:
|
DEVICE AND METHOD FOR BORON DIFFUSION IN SEMICONDUCTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/02/2013
|
Application #:
|
13014114
|
Filing Dt:
|
01/26/2011
|
Publication #:
|
|
Pub Dt:
|
07/26/2012
| | | | |
Title:
|
NON-CONFORMAL HARDMASK DEPOSITION FOR THROUGH SILICON ETCH
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/2013
|
Application #:
|
13015239
|
Filing Dt:
|
01/27/2011
|
Publication #:
|
|
Pub Dt:
|
08/02/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICES HAVING ENCAPSULATED STRESSOR REGIONS AND RELATED FABRICATION METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2012
|
Application #:
|
13015293
|
Filing Dt:
|
01/27/2011
|
Publication #:
|
|
Pub Dt:
|
05/26/2011
| | | | |
Title:
|
METHOD OF FORMING AN ALLOY IN AN INTERCONNECT STRUCTURE TO INCREASE ELECTROMIGRATION RESISTANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/16/2013
|
Application #:
|
13016126
|
Filing Dt:
|
01/28/2011
|
Publication #:
|
|
Pub Dt:
|
06/09/2011
| | | | |
Title:
|
STRUCTURE OF VERY HIGH INSERTION LOSS OF THE SUBSTRATE NOISE DECOUPLING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
13017127
|
Filing Dt:
|
01/31/2011
|
Publication #:
|
|
Pub Dt:
|
08/02/2012
| | | | |
Title:
|
REDUCED S/D CONTACT RESISTANCE OF III-V MOSFET USING LOW TEMPERATURE METAL-INDUCED CRYSTALLIZATION OF N+ GE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2014
|
Application #:
|
13017558
|
Filing Dt:
|
01/31/2011
|
Publication #:
|
|
Pub Dt:
|
12/01/2011
| | | | |
Title:
|
SELF-ALIGNED MULTIPLE GATE TRANSISTOR FORMED ON A BULK SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2014
|
Application #:
|
13017682
|
Filing Dt:
|
01/31/2011
|
Publication #:
|
|
Pub Dt:
|
08/02/2012
| | | | |
Title:
|
DRAM CELL BASED ON CONDUCTIVE NANOCHANNEL PLATE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2014
|
Application #:
|
13018963
|
Filing Dt:
|
02/01/2011
|
Publication #:
|
|
Pub Dt:
|
08/02/2012
| | | | |
Title:
|
HIGH PERFORMANCE ON-CHIP VERTICAL COAXIAL CABLE, METHOD OF MANUFACTURE AND DESIGN STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/23/2013
|
Application #:
|
13019130
|
Filing Dt:
|
02/01/2011
|
Publication #:
|
|
Pub Dt:
|
06/09/2011
| | | | |
Title:
|
THREE-DIMENSIONAL INTEGRATED CIRCUITS AND TECHNIQUES FOR FABRICATION THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
13019716
|
Filing Dt:
|
02/02/2011
|
Publication #:
|
|
Pub Dt:
|
08/02/2012
| | | | |
Title:
|
SCHOTTKY BARRIER DIODE, A METHOD OF FORMING THE DIODE AND A DESIGN STRUCTURE FOR THE DIODE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2012
|
Application #:
|
13020051
|
Filing Dt:
|
02/03/2011
|
Publication #:
|
|
Pub Dt:
|
08/09/2012
| | | | |
Title:
|
METHOD FOR FORMING A SELF-ALIGNED BIT LINE FOR PCRAM AND SELF-ALIGNED ETCH BACK PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2013
|
Application #:
|
13020127
|
Filing Dt:
|
02/03/2011
|
Publication #:
|
|
Pub Dt:
|
02/02/2012
| | | | |
Title:
|
TEST STRUCTURE FOR ILD VOID TESTING AND CONTACT RESISTANCE MEASUREMENT IN A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2014
|
Application #:
|
13020222
|
Filing Dt:
|
02/03/2011
|
Publication #:
|
|
Pub Dt:
|
08/09/2012
| | | | |
Title:
|
ADAPTIVE NEXT-EXECUTING-CYCLE TRACE SELECTION FOR TRACE-DRIVEN CODE OPTIMIZERS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
13020223
|
Filing Dt:
|
02/03/2011
|
Publication #:
|
|
Pub Dt:
|
05/26/2011
| | | | |
Title:
|
STRAINED ULTRA-THIN SOI TRANSISTOR FORMED BY REPLACEMENT GATE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2013
|
Application #:
|
13020846
|
Filing Dt:
|
02/04/2011
|
Publication #:
|
|
Pub Dt:
|
08/09/2012
| | | | |
Title:
|
MANUFACTURING EXECUTION SYSTEM (MES) INCLUDING A WAFER SAMPLING ENGINE (WSE) FOR A SEMICONDUCTOR MANUFACTURING PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2012
|
Application #:
|
13020925
|
Filing Dt:
|
02/04/2011
|
Publication #:
|
|
Pub Dt:
|
05/26/2011
| | | | |
Title:
|
SPIN-CURRENT SWITCHABLE MAGNETIC MEMORY ELEMENT AND METHOD OF FABRICATING THE MEMORY ELEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/2012
|
Application #:
|
13021403
|
Filing Dt:
|
02/04/2011
|
Publication #:
|
|
Pub Dt:
|
05/26/2011
| | | | |
Title:
|
METHODS FOR PROTECTING GATE STACKS DURING FABRICATION OF SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES FABRICATED FROM SUCH METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/18/2014
|
Application #:
|
13021558
|
Filing Dt:
|
02/25/2011
|
Publication #:
|
|
Pub Dt:
|
06/16/2011
| | | | |
Title:
|
Photoacid Generators for Extreme Ultraviolet Lithography
|
|
|
Patent #:
|
|
Issue Dt:
|
06/26/2012
|
Application #:
|
13022231
|
Filing Dt:
|
02/07/2011
|
Title:
|
NONVOLATILE CMOS-COMPATIBLE LOGIC CIRCUITS AND RELATED OPERATING METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2012
|
Application #:
|
13022416
|
Filing Dt:
|
02/07/2011
|
Publication #:
|
|
Pub Dt:
|
08/09/2012
| | | | |
Title:
|
INTEGRATED CIRCUITS HAVING PLACE-EFFICIENT CAPACITORS AND METHODS FOR FABRICATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/08/2013
|
Application #:
|
13023042
|
Filing Dt:
|
02/08/2011
|
Publication #:
|
|
Pub Dt:
|
08/09/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE INCLUDING HIGH FIELD REGIONS AND RELATED METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
01/10/2012
|
Application #:
|
13023579
|
Filing Dt:
|
02/09/2011
|
Publication #:
|
|
Pub Dt:
|
06/02/2011
| | | | |
Title:
|
INTEGRATED BEOL THIN FILM RESISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/2011
|
Application #:
|
13023583
|
Filing Dt:
|
02/09/2011
|
Publication #:
|
|
Pub Dt:
|
06/02/2011
| | | | |
Title:
|
SYSTEM TO EXTEND THE SERVICE LIFE OF PORTABLE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2012
|
Application #:
|
13023743
|
Filing Dt:
|
02/09/2011
|
Publication #:
|
|
Pub Dt:
|
08/09/2012
| | | | |
Title:
|
ENHANCED ELECTROMIGRATION RESISTANCE IN TSV STRUCTURE AND DESIGN
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2012
|
Application #:
|
13023794
|
Filing Dt:
|
02/09/2011
|
Publication #:
|
|
Pub Dt:
|
08/09/2012
| | | | |
Title:
|
COMPLEMENTARY STRESS LINER TO IMPROVE DGO/AVT DEVICES AND POLY AND DIFFUSION RESISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/2012
|
Application #:
|
13024724
|
Filing Dt:
|
02/10/2011
|
Publication #:
|
|
Pub Dt:
|
01/05/2012
| | | | |
Title:
|
GERMANIUM PHOTODETECTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/24/2013
|
Application #:
|
13025501
|
Filing Dt:
|
02/11/2011
|
Publication #:
|
|
Pub Dt:
|
08/16/2012
| | | | |
Title:
|
DUAL CONTACT TRENCH RESISTOR IN SHALLOW TRENCH ISOLATION (STI) AND METHODS OF MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2013
|
Application #:
|
13025681
|
Filing Dt:
|
02/11/2011
|
Publication #:
|
|
Pub Dt:
|
06/02/2011
| | | | |
Title:
|
DELAMINATION AND CRACK RESISTANT IMAGE SENSOR STRUCTURES AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2012
|
Application #:
|
13026339
|
Filing Dt:
|
02/14/2011
|
Publication #:
|
|
Pub Dt:
|
07/21/2011
| | | | |
Title:
|
MICROWAVE READOUT FOR FLUX-BIASED QUBITS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2013
|
Application #:
|
13027342
|
Filing Dt:
|
02/15/2011
|
Publication #:
|
|
Pub Dt:
|
08/16/2012
| | | | |
Title:
|
MAGNETIC TUNNEL JUNCTION WITH SPACER LAYER FOR SPIN TORQUE SWITCHED MRAM
|
|
|
Patent #:
|
|
Issue Dt:
|
05/14/2013
|
Application #:
|
13027797
|
Filing Dt:
|
02/15/2011
|
Publication #:
|
|
Pub Dt:
|
08/16/2012
| | | | |
Title:
|
SEMICONDUCTOR CHIP WITH GRAPHENE BASED DEVICES IN AN INTERCONNECT STRUCTURE OF THE CHIP
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2015
|
Application #:
|
13029657
|
Filing Dt:
|
02/17/2011
|
Publication #:
|
|
Pub Dt:
|
08/23/2012
| | | | |
Title:
|
INTEGRATED ANTENNA FOR RFIC PACKAGE APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/25/2013
|
Application #:
|
13030341
|
Filing Dt:
|
02/18/2011
|
Publication #:
|
|
Pub Dt:
|
08/23/2012
| | | | |
Title:
|
SYSTEMS AND METHODS FOR MEMORY DEVICE PRECHARGING
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/2011
|
Application #:
|
13031195
|
Filing Dt:
|
02/19/2011
|
Publication #:
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Pub Dt:
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06/16/2011
| | | | |
Title:
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STRUCTURE FOR INHIBITING BACK END OF LINE DAMAGE FROM DICING AND CHIP PACKAGING INTERACTION FAILURES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2013
|
Application #:
|
13031392
|
Filing Dt:
|
02/21/2011
|
Publication #:
|
|
Pub Dt:
|
08/23/2012
| | | | |
Title:
|
CAPACITOR STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
13031693
|
Filing Dt:
|
02/22/2011
|
Publication #:
|
|
Pub Dt:
|
08/23/2012
| | | | |
Title:
|
METHOD AND SYSTEM FOR EXTRACTING COMPACT MODELS FOR CIRCUIT SIMULATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2012
|
Application #:
|
13032361
|
Filing Dt:
|
02/22/2011
|
Publication #:
|
|
Pub Dt:
|
03/29/2012
| | | | |
Title:
|
MANAGING CONCURRENT ACCESSES TO A CACHE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2016
|
Application #:
|
13032710
|
Filing Dt:
|
02/23/2011
|
Publication #:
|
|
Pub Dt:
|
10/06/2011
| | | | |
Title:
|
SEMICONDUCTOR DEVICE COMPRISING METAL-BASED EFUSES OF ENHANCED PROGRAMMING EFFICIENCY BY ENHANCING HEAT GENERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/2013
|
Application #:
|
13034936
|
Filing Dt:
|
02/25/2011
|
Publication #:
|
|
Pub Dt:
|
08/30/2012
| | | | |
Title:
|
WRITE BANDWIDTH IN A MEMORY CHARACTERIZED BY A VARIABLE WRITE TIME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2013
|
Application #:
|
13035549
|
Filing Dt:
|
02/25/2011
|
Publication #:
|
|
Pub Dt:
|
06/23/2011
| | | | |
Title:
|
DESIGN STRUCTURE AND METHOD FOR A SILICON CONTROLLED RECTIFIER (SCR) STRUCTURE FOR SOI TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/2013
|
Application #:
|
13036113
|
Filing Dt:
|
02/28/2011
|
Publication #:
|
|
Pub Dt:
|
08/30/2012
| | | | |
Title:
|
FILLING NARROW OPENINGS USING ION BEAM ETCH
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2012
|
Application #:
|
13037608
|
Filing Dt:
|
03/01/2011
|
Publication #:
|
|
Pub Dt:
|
06/23/2011
| | | | |
Title:
|
FORMATION OF IMPROVED SOI SUBSTRATES USING BULK SEMICONDUCTOR WAFERS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2014
|
Application #:
|
13037944
|
Filing Dt:
|
03/01/2011
|
Publication #:
|
|
Pub Dt:
|
08/16/2012
| | | | |
Title:
|
GROWING COMPRESSIVELY STRAINED SILICON DIRECTLY ON SILICON AT LOW TEMPERATURES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2012
|
Application #:
|
13038467
|
Filing Dt:
|
03/02/2011
|
Publication #:
|
|
Pub Dt:
|
08/18/2011
| | | | |
Title:
|
METHODS FOR FORMING A BONDED SEMICONDUCTOR SUBSTRATE INCLUDING A COOLING MECHANISM
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2015
|
Application #:
|
13039003
|
Filing Dt:
|
03/02/2011
|
Publication #:
|
|
Pub Dt:
|
09/06/2012
| | | | |
Title:
|
OPTICAL INTERCONNECT USING OPTICAL TRANSMITTER PRE-DISTORTION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/05/2013
|
Application #:
|
13039475
|
Filing Dt:
|
03/03/2011
|
Publication #:
|
|
Pub Dt:
|
09/06/2012
| | | | |
Title:
|
MULTILAYER-INTERCONNECTION FIRST INTEGRATION SCHEME FOR GRAPHENE AND CARBON NANOTUBE TRANSISTOR BASED INTEGRATION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2013
|
Application #:
|
13040399
|
Filing Dt:
|
03/04/2011
|
Publication #:
|
|
Pub Dt:
|
09/06/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE COMPRISING METALLIZATION LAYERS OF REDUCED INTERLAYER CAPACITANCE BY REDUCING THE AMOUNT OF ETCH STOP MATERIALS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2013
|
Application #:
|
13040482
|
Filing Dt:
|
03/04/2011
|
Publication #:
|
|
Pub Dt:
|
09/06/2012
| | | | |
Title:
|
WEAR-FOCUSING OF NON-VOLATILE MEMORIES FOR IMPROVED ENDURANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2013
|
Application #:
|
13040531
|
Filing Dt:
|
03/04/2011
|
Publication #:
|
|
Pub Dt:
|
09/06/2012
| | | | |
Title:
|
BAD BLOCK MANAGEMENT FOR FLASH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/29/2014
|
Application #:
|
13040975
|
Filing Dt:
|
03/04/2011
|
Publication #:
|
|
Pub Dt:
|
09/06/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE COMPRISING A CAPACITOR FORMED IN THE METALLIZATION SYSTEM BASED ON DUMMY METAL FEATURES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2013
|
Application #:
|
13041226
|
Filing Dt:
|
03/04/2011
|
Publication #:
|
|
Pub Dt:
|
06/23/2011
| | | | |
Title:
|
SPIN-CURRENT SWITCHED MAGNETIC MEMORY ELEMENT SUITABLE FOR CIRCUIT INTEGRATION AND METHOD OF FABRICATING THE MEMORY ELEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2014
|
Application #:
|
13041740
|
Filing Dt:
|
03/07/2011
|
Publication #:
|
|
Pub Dt:
|
08/18/2011
| | | | |
Title:
|
SEMICONDUCTOR NANOSTRUCTURES, SEMICONDUCTOR DEVICES, AND METHODS OF MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2013
|
Application #:
|
13041754
|
Filing Dt:
|
03/07/2011
|
Publication #:
|
|
Pub Dt:
|
06/30/2011
| | | | |
Title:
|
SEMICONDUCTOR NANOSTRUCTURES, SEMICONDUCTOR DEVICES, AND METHODS OF MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2013
|
Application #:
|
13042881
|
Filing Dt:
|
03/08/2011
|
Publication #:
|
|
Pub Dt:
|
09/13/2012
| | | | |
Title:
|
SELECTABLE REPAIR PASS MASKING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2013
|
Application #:
|
13042902
|
Filing Dt:
|
03/08/2011
|
Publication #:
|
|
Pub Dt:
|
09/13/2012
| | | | |
Title:
|
METHODS OF FABRICATING A BIPOLAR JUNCTION TRANSISTOR WITH A SELF-ALIGNED EMITTER AND BASE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2013
|
Application #:
|
13043749
|
Filing Dt:
|
03/09/2011
|
Publication #:
|
|
Pub Dt:
|
09/13/2012
| | | | |
Title:
|
HIGH MEMORY DENSITY, HIGH INPUT/OUTPUT BANDWIDTH LOGIC-MEMORY STRUCTURE AND ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2013
|
Application #:
|
13045784
|
Filing Dt:
|
03/11/2011
|
Publication #:
|
|
Pub Dt:
|
08/25/2011
| | | | |
Title:
|
SELECTIVE FLOATING BODY SRAM CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/2012
|
Application #:
|
13046084
|
Filing Dt:
|
03/11/2011
|
Title:
|
LOW CAPACITANCE HI-K DUAL WORK FUNCTION METAL GATE BODY-CONTACTED FIELD EFFECT TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2013
|
Application #:
|
13046377
|
Filing Dt:
|
03/11/2011
|
Publication #:
|
|
Pub Dt:
|
07/28/2011
| | | | |
Title:
|
DRAIN-PUMPED SUB-HARMONIC MIXER FOR MILLIMETER WAVE APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2013
|
Application #:
|
13047037
|
Filing Dt:
|
03/14/2011
|
Publication #:
|
|
Pub Dt:
|
07/07/2011
| | | | |
Title:
|
LITHOGRAPHY FOR PRINTING CONSTANT LINE WIDTH FEATURES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2012
|
Application #:
|
13047120
|
Filing Dt:
|
03/14/2011
|
Publication #:
|
|
Pub Dt:
|
07/07/2011
| | | | |
Title:
|
PHOTOSENSITIVE SELF-ASSEMBLED MONOLAYER FOR SELECTIVE PLACEMENT OF HYDROPHILIC STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2013
|
Application #:
|
13048170
|
Filing Dt:
|
03/15/2011
|
Publication #:
|
|
Pub Dt:
|
06/30/2011
| | | | |
Title:
|
HIGH-K METAL GATE CMOS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2013
|
Application #:
|
13048366
|
Filing Dt:
|
03/15/2011
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
Title:
|
VERTICAL POLYSILICON-GERMANIUM HETEROJUNCTION BIPOLAR TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2013
|
Application #:
|
13049491
|
Filing Dt:
|
03/16/2011
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
Title:
|
HYBRID MOSFET STRUCTURE HAVING DRAIN SIDE SCHOTTKY JUNCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2013
|
Application #:
|
13050101
|
Filing Dt:
|
03/17/2011
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
Title:
|
FIN FIELD EFFECT TRANSISTOR WITH VARIABLE CHANNEL THICKNESS FOR THRESHOLD VOLTAGE TUNING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2013
|
Application #:
|
13051510
|
Filing Dt:
|
03/18/2011
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
Title:
|
DAMASCENE METAL GATE AND SHIELD STRUCTURE, METHODS OF MANUFACTURE AND DESIGN STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2013
|
Application #:
|
13051707
|
Filing Dt:
|
03/18/2011
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
Title:
|
NITRIDE GATE DIELECTRIC FOR GRAPHENE MOSFET
|
|
|
Patent #:
|
|
Issue Dt:
|
12/24/2013
|
Application #:
|
13052583
|
Filing Dt:
|
03/21/2011
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
Title:
|
Shallow Source and Drain Architecture in an Active Region of a Semiconductor Device Having a Pronounced Surface Topography by Tilted Implantation
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/2015
|
Application #:
|
13053138
|
Filing Dt:
|
03/21/2011
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
Title:
|
COMPOSITE MEMBRANES AND METHODS OF PREPARATION THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
07/02/2013
|
Application #:
|
13069653
|
Filing Dt:
|
03/23/2011
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
Title:
|
PHASE PROFILE GENERATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2012
|
Application #:
|
13072023
|
Filing Dt:
|
03/25/2011
|
Publication #:
|
|
Pub Dt:
|
07/14/2011
| | | | |
Title:
|
ANTI-FUSE DEVICE STRUCTURE AND ELECTROPLATING CIRCUIT STRUCTURE AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/2013
|
Application #:
|
13073103
|
Filing Dt:
|
03/28/2011
|
Publication #:
|
|
Pub Dt:
|
10/04/2012
| | | | |
Title:
|
DRAM WITH SCHOTTKY BARRIER FET AND MIM TRENCH CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/08/2013
|
Application #:
|
13073151
|
Filing Dt:
|
03/28/2011
|
Publication #:
|
|
Pub Dt:
|
10/04/2012
| | | | |
Title:
|
FORMING BORDERLESS CONTACT FOR TRANSISTORS IN A REPLACEMENT METAL GATE PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/18/2013
|
Application #:
|
13074854
|
Filing Dt:
|
03/29/2011
|
Publication #:
|
|
Pub Dt:
|
10/04/2012
| | | | |
Title:
|
SELF-ALIGNED III-V FIELD EFFECT TRANSISTOR (FET), INTEGRATED CIRCUIT (IC) CHIP WITH SELF-ALIGNED III-V FETS AND METHOD OF MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2012
|
Application #:
|
13075271
|
Filing Dt:
|
03/30/2011
|
Publication #:
|
|
Pub Dt:
|
07/21/2011
| | | | |
Title:
|
DEEP TRENCH CAPACITOR FOR SOI CMOS DEVICES FOR SOFT ERROR IMMUNITY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
13075443
|
Filing Dt:
|
03/30/2011
|
Publication #:
|
|
Pub Dt:
|
10/04/2012
| | | | |
Title:
|
STRUCTURE AND PROCESS FOR METAL FILL IN REPLACEMENT METAL GATE INTEGRATION
|
|