|
|
Patent #:
|
|
Issue Dt:
|
04/13/2010
|
Application #:
|
10779217
|
Filing Dt:
|
02/13/2004
|
Publication #:
|
|
Pub Dt:
|
08/18/2005
| | | | |
Title:
|
METHOD AND APPARATUS FOR PROCESSING A FREQUENCY MODULATED (FM) SIGNAL USING AN ADAPTIVE EQUALIZER
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2007
|
Application #:
|
10780143
|
Filing Dt:
|
02/17/2004
|
Publication #:
|
|
Pub Dt:
|
08/18/2005
| | | | |
Title:
|
SEMICONDUCTOR STRUCTURE HAVING STRAINED SEMICONDUCTOR AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
|
Application #:
|
10782566
|
Filing Dt:
|
02/19/2004
|
Title:
|
PHOTOLITHOGRAPHY RETICLE DESIGN
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2006
|
Application #:
|
10787288
|
Filing Dt:
|
02/26/2004
|
Publication #:
|
|
Pub Dt:
|
09/01/2005
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE WITH CROSSING CONDUCTOR ASSEMBLY AND METHOD OF MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2005
|
Application #:
|
10787510
|
Filing Dt:
|
02/26/2004
|
Publication #:
|
|
Pub Dt:
|
09/01/2005
| | | | |
Title:
|
METHOD FOR REMOVING NANOCLUSTERS FROM SELECTED REGIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
|
Application #:
|
10788588
|
Filing Dt:
|
02/27/2004
|
Publication #:
|
|
Pub Dt:
|
09/01/2005
| | | | |
Title:
|
METHOD AND APPARATUS FOR COMPLEX CASCADE SIGMA-DELTA MODULATION AND SINGLE-SIDEBAND ANALOG-TO-DIGITAL CONVERSION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/2006
|
Application #:
|
10790420
|
Filing Dt:
|
03/01/2004
|
Publication #:
|
|
Pub Dt:
|
09/01/2005
| | | | |
Title:
|
INTEGRATED CIRCUIT WITH MULTIPLE SPACER INSULATING REGION WIDTHS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2006
|
Application #:
|
10790516
|
Filing Dt:
|
03/01/2004
|
Publication #:
|
|
Pub Dt:
|
09/01/2005
| | | | |
Title:
|
METHOD AND APPARATUS FOR A HIGH PERFORMANCE AND HIGH DYNAMIC RANGE BASEBAND POWER CONTROL SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2008
|
Application #:
|
10791171
|
Filing Dt:
|
03/01/2004
|
Publication #:
|
|
Pub Dt:
|
09/01/2005
| | | | |
Title:
|
AUTONOMOUS MEMORY CHECKER FOR RUNTIME SECURITY ASSURANCE AND METHOD THEREFORE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2008
|
Application #:
|
10792591
|
Filing Dt:
|
03/03/2004
|
Publication #:
|
|
Pub Dt:
|
09/08/2005
| | | | |
Title:
|
MULTIPLE BURST PROTOCOL DEVICE CONTROLLER
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/2010
|
Application #:
|
10795700
|
Filing Dt:
|
03/08/2004
|
Publication #:
|
|
Pub Dt:
|
09/08/2005
| | | | |
Title:
|
SELECTIVE TONE EVENT DETECTOR AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2006
|
Application #:
|
10797222
|
Filing Dt:
|
03/10/2004
|
Publication #:
|
|
Pub Dt:
|
09/15/2005
| | | | |
Title:
|
METHOD OF INHIBITING METAL SILICIDE ENCROACHMENT IN A TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2005
|
Application #:
|
10799554
|
Filing Dt:
|
03/10/2004
|
Title:
|
METHOD OF MAKING A SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE MADE THEREBY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2006
|
Application #:
|
10802018
|
Filing Dt:
|
03/16/2004
|
Publication #:
|
|
Pub Dt:
|
09/22/2005
| | | | |
Title:
|
SELF-CALIBRATING OSCILLATOR SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2006
|
Application #:
|
10804450
|
Filing Dt:
|
03/19/2004
|
Publication #:
|
|
Pub Dt:
|
09/22/2005
| | | | |
Title:
|
DETECTING OVERCURRENTS IN A SWITCHING REGULATOR USING A VOLTAGE DEPENDENT REFERENCE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/22/2005
|
Application #:
|
10804453
|
Filing Dt:
|
03/19/2004
|
Publication #:
|
|
Pub Dt:
|
10/06/2005
| | | | |
Title:
|
OPTIMIZED REFERENCE VOLTAGE GENERATION USING SWITCHED CAPACITOR SCALING FOR DATA CONVERTERS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/16/2007
|
Application #:
|
10805119
|
Filing Dt:
|
03/19/2004
|
Publication #:
|
|
Pub Dt:
|
09/22/2005
| | | | |
Title:
|
ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND METHOD THEREFORE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2005
|
Application #:
|
10805954
|
Filing Dt:
|
03/22/2004
|
Publication #:
|
|
Pub Dt:
|
10/06/2005
| | | | |
Title:
|
LOAD BOARD WITH EMBEDDED RELAY TRACKER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
|
Application #:
|
10806498
|
Filing Dt:
|
03/23/2004
|
Publication #:
|
|
Pub Dt:
|
09/29/2005
| | | | |
Title:
|
METHOD AND APPARATUS FOR ENTERING A LOW POWER MODE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2007
|
Application #:
|
10807527
|
Filing Dt:
|
03/24/2004
|
Publication #:
|
|
Pub Dt:
|
09/29/2005
| | | | |
Title:
|
LAND GRID ARRAY PACKAGED DEVICE AND METHOD OF FORMING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2006
|
Application #:
|
10807624
|
Filing Dt:
|
03/24/2004
|
Publication #:
|
|
Pub Dt:
|
09/29/2005
| | | | |
Title:
|
TRANSISTOR WITH REDUCED GATE-TO-SOURCE CAPACITANCE AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/2006
|
Application #:
|
10808056
|
Filing Dt:
|
03/24/2004
|
Publication #:
|
|
Pub Dt:
|
09/29/2005
| | | | |
Title:
|
METHOD AND APPARATUS FOR DOHERTY AMPLIFIER BIASING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2006
|
Application #:
|
10811461
|
Filing Dt:
|
03/26/2004
|
Publication #:
|
|
Pub Dt:
|
09/29/2005
| | | | |
Title:
|
METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A NOTCHED CONTROL ELECTRODE AND STRUCTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
04/05/2005
|
Application #:
|
10811581
|
Filing Dt:
|
03/29/2004
|
Publication #:
|
|
Pub Dt:
|
09/16/2004
| | | | |
Title:
|
METHOD OF ATTACHING A DIE TO A SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
10818861
|
Filing Dt:
|
04/06/2004
|
Publication #:
|
|
Pub Dt:
|
10/06/2005
| | | | |
Title:
|
STATE RETENTION WITHIN A DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2008
|
Application #:
|
10819383
|
Filing Dt:
|
04/06/2004
|
Publication #:
|
|
Pub Dt:
|
10/06/2005
| | | | |
Title:
|
STATE RETENTION WITHIN A DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2005
|
Application #:
|
10821749
|
Filing Dt:
|
04/09/2004
|
Publication #:
|
|
Pub Dt:
|
10/07/2004
| | | | |
Title:
|
METHOD OF MANUFACTURING A WIRE BOND-LESS ELECTRONIC COMPONENT FOR USE WITH AN EXTERNAL CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/18/2006
|
Application #:
|
10827202
|
Filing Dt:
|
04/19/2004
|
Publication #:
|
|
Pub Dt:
|
10/20/2005
| | | | |
Title:
|
METHOD FOR FORMING A GATE ELECTRODE HAVING A METAL
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2006
|
Application #:
|
10827220
|
Filing Dt:
|
04/19/2004
|
Publication #:
|
|
Pub Dt:
|
10/20/2005
| | | | |
Title:
|
MOTION SENSING FOR TIRE PRESSURE MONITORING
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2006
|
Application #:
|
10828042
|
Filing Dt:
|
04/20/2004
|
Publication #:
|
|
Pub Dt:
|
10/20/2005
| | | | |
Title:
|
MEM STRUCTURE HAVING REDUCED SPRING STICTION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2006
|
Application #:
|
10828090
|
Filing Dt:
|
04/20/2004
|
Publication #:
|
|
Pub Dt:
|
10/07/2004
| | | | |
Title:
|
SWITCHING CIRCUIT AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2008
|
Application #:
|
10834024
|
Filing Dt:
|
04/29/2004
|
Publication #:
|
|
Pub Dt:
|
11/03/2005
| | | | |
Title:
|
WIRELESS TRANSCEIVER AND METHOD OF OPERATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2006
|
Application #:
|
10836149
|
Filing Dt:
|
04/30/2004
|
Publication #:
|
|
Pub Dt:
|
11/03/2005
| | | | |
Title:
|
A METHOD OF MAKING A HIGH QUALITY THIN DIELECTRIC LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/2005
|
Application #:
|
10836150
|
Filing Dt:
|
04/30/2004
|
Publication #:
|
|
Pub Dt:
|
11/03/2005
| | | | |
Title:
|
ISOLATION TRENCH
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/2006
|
Application #:
|
10836170
|
Filing Dt:
|
04/30/2004
|
Publication #:
|
|
Pub Dt:
|
11/03/2005
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/16/2007
|
Application #:
|
10836172
|
Filing Dt:
|
04/30/2004
|
Publication #:
|
|
Pub Dt:
|
11/03/2005
| | | | |
Title:
|
METHOD FOR MAKING A SEMICONDUCTOR STRUCTURE USING SILICON GERMANIUM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2008
|
Application #:
|
10836173
|
Filing Dt:
|
04/30/2004
|
Publication #:
|
|
Pub Dt:
|
11/17/2005
| | | | |
Title:
|
MASKING WITHIN A DATA PROCESSING SYSTEM HAVING APPLICABILITY FOR A DEVELOPMENT INTERFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/03/2007
|
Application #:
|
10838809
|
Filing Dt:
|
05/04/2004
|
Publication #:
|
|
Pub Dt:
|
11/17/2005
| | | | |
Title:
|
METHOD FOR VOLTAGE DROP ANALYSIS IN INTEGRETED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2006
|
Application #:
|
10839385
|
Filing Dt:
|
05/05/2004
|
Publication #:
|
|
Pub Dt:
|
11/10/2005
| | | | |
Title:
|
METHOD OF SEMICONDUCTOR FABRICATION INCORPORATING DISPOSABLE SPACER INTO ELEVATED SOURCE/DRAIN PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2006
|
Application #:
|
10843805
|
Filing Dt:
|
05/12/2004
|
Publication #:
|
|
Pub Dt:
|
11/17/2005
| | | | |
Title:
|
CIRCUIT FOR PERFORMING VOLTAGE REGULATION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2005
|
Application #:
|
10843850
|
Filing Dt:
|
05/12/2004
|
Title:
|
SEMICONDUCTOR PROCESS AND INTEGRATED CIRCUIT HAVING DUAL METAL OXIDE GATE DIELECTRIC WITH SINGLE METAL GATE ELECTRODE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2006
|
Application #:
|
10845523
|
Filing Dt:
|
05/14/2004
|
Publication #:
|
|
Pub Dt:
|
02/03/2005
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
10/31/2006
|
Application #:
|
10845949
|
Filing Dt:
|
05/14/2004
|
Publication #:
|
|
Pub Dt:
|
11/17/2005
| | | | |
Title:
|
METHOD AND APPARATUS HAVING A DIGITAL PWM SIGNAL GENERATOR WITH INTEGRAL NOISE SHAPING
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/2006
|
Application #:
|
10847775
|
Filing Dt:
|
05/18/2004
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
Title:
|
PACKAGED IC USING INSULATED WIRE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2007
|
Application #:
|
10851347
|
Filing Dt:
|
05/21/2004
|
Publication #:
|
|
Pub Dt:
|
11/24/2005
| | | | |
Title:
|
METHOD FOR MAKING A SEMICONDUCTOR STRUCTURE USING SILICON GERMANIUM
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2007
|
Application #:
|
10851607
|
Filing Dt:
|
05/21/2004
|
Publication #:
|
|
Pub Dt:
|
11/24/2005
| | | | |
Title:
|
METHOD FOR REMOVING A SEMICONDUCTOR LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2006
|
Application #:
|
10851608
|
Filing Dt:
|
05/21/2004
|
Publication #:
|
|
Pub Dt:
|
11/25/2004
| | | | |
Title:
|
ANALOG TO DIGITAL CONVERTER
|
|
|
Patent #:
|
|
Issue Dt:
|
11/07/2006
|
Application #:
|
10853701
|
Filing Dt:
|
05/25/2004
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
DECOUPLED COMPLEMENTARY MASK PATTERNING TRANSFER METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/2006
|
Application #:
|
10854298
|
Filing Dt:
|
05/26/2004
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
AUTOMATIC HIDDEN REFRESH IN A DRAM AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/26/2007
|
Application #:
|
10854389
|
Filing Dt:
|
05/26/2004
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A SILICIDE LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2007
|
Application #:
|
10854554
|
Filing Dt:
|
05/26/2004
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
MEMORY WITH SERIAL INPUT/OUTPUT TERMINALS FOR ADDRESS AND DATA AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2006
|
Application #:
|
10856581
|
Filing Dt:
|
05/28/2004
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
SEPARATELY STRAINED N-CHANNEL AND P-CHANNEL TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/2006
|
Application #:
|
10856602
|
Filing Dt:
|
05/28/2004
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
SCHOTTKY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/2006
|
Application #:
|
10857040
|
Filing Dt:
|
05/28/2004
|
Publication #:
|
|
Pub Dt:
|
12/01/2005
| | | | |
Title:
|
TEMPERATURE COMPENSATED ON-CHIP BIAS CIRCUIT FOR LINEAR RF HBT POWER AMPLIFIERS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2006
|
Application #:
|
10857041
|
Filing Dt:
|
05/28/2004
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
DOUBLE-SAMPLED INTEGRATOR SYSTEM AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2008
|
Application #:
|
10857208
|
Filing Dt:
|
05/26/2004
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
Title:
|
METHOD AND APPARATUS FOR ENDIANNESS CONTROL IN A DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2006
|
Application #:
|
10857545
|
Filing Dt:
|
05/28/2004
|
Publication #:
|
|
Pub Dt:
|
12/01/2005
| | | | |
Title:
|
MEMORY WITH RECESSED DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2008
|
Application #:
|
10861467
|
Filing Dt:
|
06/07/2004
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
Title:
|
METHOD AND APPARATUS UTILIZING MONOCRYSTALLINE INSULATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2009
|
Application #:
|
10865267
|
Filing Dt:
|
06/10/2004
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
METHOD AND APPARATUS FOR PROVIDING SECURITY IN A DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
11/07/2006
|
Application #:
|
10865268
|
Filing Dt:
|
06/10/2004
|
Publication #:
|
|
Pub Dt:
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12/15/2005
| | | | |
Title:
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METHOD FOR TREATING A SEMICONDUCTOR SURFACE TO FORM A METAL-CONTAINING LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2006
|
Application #:
|
10865269
|
Filing Dt:
|
06/10/2004
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
SINGLE SUPPLY LEVEL SHIFTER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2008
|
Application #:
|
10865274
|
Filing Dt:
|
06/10/2004
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
MEMORY DEVICE WITH A DATA HOLD LATCH
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/2006
|
Application #:
|
10865363
|
Filing Dt:
|
06/10/2004
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
HIGH VOLTAGE LEVEL CONVERTER USING LOW VOLTAGE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/26/2006
|
Application #:
|
10865451
|
Filing Dt:
|
06/10/2004
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
SEMICONDUCTOR OPTICAL DEVICES AND METHOD FOR FORMING
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/2006
|
Application #:
|
10865452
|
Filing Dt:
|
06/10/2004
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
METHOD TO REDUCE IMPURITY ELEMENTS DURING SEMICONDUCTOR FILM DEPOSITION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/2017
|
Application #:
|
10865585
|
Filing Dt:
|
06/10/2004
|
Publication #:
|
|
Pub Dt:
|
01/06/2005
| | | | |
Title:
|
Flexible memory interface system for independently processing different portions of an instruction
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2011
|
Application #:
|
10868903
|
Filing Dt:
|
06/17/2004
|
Publication #:
|
|
Pub Dt:
|
08/25/2005
| | | | |
Title:
|
COMMON SIGNALLING MODE FOR USE WITH MULTIPLE WIRELESS FORMATS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2006
|
Application #:
|
10868948
|
Filing Dt:
|
06/17/2004
|
Publication #:
|
|
Pub Dt:
|
09/15/2005
| | | | |
Title:
|
MULTIPLE-STAGE FILTERING DEVICE AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2006
|
Application #:
|
10871402
|
Filing Dt:
|
06/18/2004
|
Publication #:
|
|
Pub Dt:
|
12/22/2005
| | | | |
Title:
|
METHOD OF FORMING A TRANSISTOR WITH A BOTTOM GATE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/28/2006
|
Application #:
|
10871772
|
Filing Dt:
|
06/18/2004
|
Publication #:
|
|
Pub Dt:
|
12/22/2005
| | | | |
Title:
|
TRANSISTOR WITH VERTICAL DIELECTRIC STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2007
|
Application #:
|
10872057
|
Filing Dt:
|
06/18/2004
|
Publication #:
|
|
Pub Dt:
|
12/22/2005
| | | | |
Title:
|
REFLECTIVE MASK USEFUL FOR TRANSFERRING A PATTERN USING EXTREME ULTRA VIOLET (EUV) RADIATION AND METHOD OF MAKING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2007
|
Application #:
|
10872066
|
Filing Dt:
|
06/18/2004
|
Publication #:
|
|
Pub Dt:
|
12/30/2004
| | | | |
Title:
|
ARRANGEMENT AND METHOD FOR DIGITAL DELAY LINE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2008
|
Application #:
|
10872077
|
Filing Dt:
|
06/18/2004
|
Publication #:
|
|
Pub Dt:
|
03/31/2005
| | | | |
Title:
|
ARRANGEMENT AND METHOD FOR ITERATIVE DECODING
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2008
|
Application #:
|
10873422
|
Filing Dt:
|
06/23/2004
|
Publication #:
|
|
Pub Dt:
|
02/17/2005
| | | | |
Title:
|
SYSTEM AND METHOD FOR LOW POWER CLEAR CHANNEL ASSESSMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2006
|
Application #:
|
10875105
|
Filing Dt:
|
06/23/2004
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
LDMOS TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2006
|
Application #:
|
10876805
|
Filing Dt:
|
06/25/2004
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
METHOD OF FORMING A NANOCLUSTER CHARGE STORAGE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2006
|
Application #:
|
10876820
|
Filing Dt:
|
06/25/2004
|
Publication #:
|
|
Pub Dt:
|
08/31/2006
| | | | |
Title:
|
METHOD OF FORMING A NANOCLUSTER CHARGE STORAGE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/2009
|
Application #:
|
10878839
|
Filing Dt:
|
06/28/2004
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
METHOD FOR MAKING A SEMICONDUCTOR DEVICE WITH REDUCED SPACING
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2005
|
Application #:
|
10878956
|
Filing Dt:
|
06/28/2004
|
Publication #:
|
|
Pub Dt:
|
11/25/2004
| | | | |
Title:
|
VARIABLE REFRESH CONTROL FOR A MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2006
|
Application #:
|
10879242
|
Filing Dt:
|
06/29/2004
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
LEAD SOLDER INDICATOR AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
07/05/2005
|
Application #:
|
10879440
|
Filing Dt:
|
06/29/2004
|
Publication #:
|
|
Pub Dt:
|
12/09/2004
| | | | |
Title:
|
ARTICLE COMPRISING AN OXIDE LAYER ON A GAAS-BASED SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2010
|
Application #:
|
10879991
|
Filing Dt:
|
06/29/2004
|
Publication #:
|
|
Pub Dt:
|
12/02/2004
| | | | |
Title:
|
METHOD AND APPARATUS FOR SELECTIVELY OPTIMIZING INTERPRETED LANGUAGE CODE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/31/2006
|
Application #:
|
10880681
|
Filing Dt:
|
06/30/2004
|
Publication #:
|
|
Pub Dt:
|
01/05/2006
| | | | |
Title:
|
SCRIBE STREET STRUCTURE FOR BACKEND INTERCONNECT SEMICONDUCTOR WAFER INTEGRATION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2007
|
Application #:
|
10880685
|
Filing Dt:
|
06/30/2004
|
Publication #:
|
|
Pub Dt:
|
01/05/2006
| | | | |
Title:
|
METHOD OF MAKING A SEMICONDUCTOR DEVICE HAVING A STRAINED SEMICONDUCTOR LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2009
|
Application #:
|
10881144
|
Filing Dt:
|
06/30/2004
|
Publication #:
|
|
Pub Dt:
|
01/05/2006
| | | | |
Title:
|
ULTRA-THIN DIE AND METHOD OF FABRICATING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2008
|
Application #:
|
10881678
|
Filing Dt:
|
06/30/2004
|
Publication #:
|
|
Pub Dt:
|
01/05/2006
| | | | |
Title:
|
SCHOTTKY DEVICE AND METHOD OF FORMING
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2007
|
Application #:
|
10882482
|
Filing Dt:
|
06/30/2004
|
Publication #:
|
|
Pub Dt:
|
01/05/2006
| | | | |
Title:
|
METHOD OF PASSIVATING OXIDE/COMPOUND SEMICONDUCTOR INTERFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2006
|
Application #:
|
10883180
|
Filing Dt:
|
06/30/2004
|
Publication #:
|
|
Pub Dt:
|
01/05/2006
| | | | |
Title:
|
SEMICONDUCTOR STRUCTURES AND METHODS OF FABRICATING SEMICONDUCTOR STRUCTURES COMPRISING HAFNIUM OXIDE MODIFIED WITH LANTHANUM, A LANTHANIDE-SERIES METAL, OR A COMBINATION THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2005
|
Application #:
|
10883181
|
Filing Dt:
|
06/30/2004
|
Title:
|
METHODS OF FABRICATING SEMICONDUCTOR STRUCTURES COMPRISING EPITAXIAL HF3SI2 LAYERS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2005
|
Application #:
|
10883182
|
Filing Dt:
|
06/30/2004
|
Title:
|
METHOD OF FABRICATING THREE DIMENSIONAL GATE STRUCTURE USING OXYGEN DIFFUSION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/14/2006
|
Application #:
|
10883237
|
Filing Dt:
|
07/01/2004
|
Publication #:
|
|
Pub Dt:
|
01/05/2006
| | | | |
Title:
|
DIELECTRIC STORAGE MEMORY CELL HAVING HIGH PERMITTIVITY TOP DIELECTRIC AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/2009
|
Application #:
|
10886340
|
Filing Dt:
|
07/07/2004
|
Publication #:
|
|
Pub Dt:
|
01/12/2006
| | | | |
Title:
|
MEMORY HAVING VARIABLE REFRESH CONTROL AND METHOD THEREFOR
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10887131
|
Filing Dt:
|
07/08/2004
|
Publication #:
|
|
Pub Dt:
|
01/12/2006
| | | | |
Title:
|
Method and system for displaying a sequence of image frames
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2010
|
Application #:
|
10887132
|
Filing Dt:
|
07/08/2004
|
Publication #:
|
|
Pub Dt:
|
01/12/2006
| | | | |
Title:
|
METHOD AND SYSTEM FOR PERFORMING DEBLOCKING FILTERING
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2007
|
Application #:
|
10889159
|
Filing Dt:
|
07/12/2004
|
Publication #:
|
|
Pub Dt:
|
01/12/2006
| | | | |
Title:
|
MEMORY ROW/COLUMN REPLACEMENT IN AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/2006
|
Application #:
|
10891648
|
Filing Dt:
|
07/15/2004
|
Publication #:
|
|
Pub Dt:
|
01/19/2006
| | | | |
Title:
|
METHOD OF ASSEMBLING A SEMICONDUCTOR COMPONENT AND APPARATUS THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2008
|
Application #:
|
10891649
|
Filing Dt:
|
07/15/2004
|
Publication #:
|
|
Pub Dt:
|
02/23/2006
| | | | |
Title:
|
MEMORY WITH FAULT TOLERANT REFERENCE CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2007
|
Application #:
|
10891811
|
Filing Dt:
|
07/15/2004
|
Publication #:
|
|
Pub Dt:
|
01/19/2006
| | | | |
Title:
|
VOLTAGE REGULATOR WITH ADAPTIVE FREQUENCY COMPENSATION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/2006
|
Application #:
|
10892420
|
Filing Dt:
|
07/15/2004
|
Publication #:
|
|
Pub Dt:
|
01/19/2006
| | | | |
Title:
|
POWER ON RESET CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2006
|
Application #:
|
10892693
|
Filing Dt:
|
07/16/2004
|
Publication #:
|
|
Pub Dt:
|
04/14/2005
| | | | |
Title:
|
DEVICE INCLUDING AN AMORPHOUS CARBON LAYER FOR IMPROVED ADHESION OF ORGANIC LAYERS AND METHOD OF FABRICATION
|
|