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Patent #:
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Issue Dt:
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05/13/2014
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13371049
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Filing Dt:
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02/10/2012
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Publication #:
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Pub Dt:
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08/23/2012
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Title:
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SEMICONDUCTOR DEVICE COMPRISING SELF-ALIGNED CONTACT ELEMENTS AND A REPLACEMENT GATE ELECTRODE STRUCTURE
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10/22/2013
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13371430
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02/11/2012
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Pub Dt:
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08/15/2013
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Title:
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FORMING METAL PREFORMS AND METAL BALLS
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10/29/2013
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13371493
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Filing Dt:
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02/13/2012
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08/15/2013
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Title:
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DUAL-METAL SELF-ALIGNED WIRES AND VIAS
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Patent #:
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01/13/2015
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13371605
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Filing Dt:
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02/13/2012
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Publication #:
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Pub Dt:
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08/15/2013
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Title:
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SELF-ALIGNED EMITTER-BASE REGION
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Patent #:
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04/15/2014
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13372058
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Filing Dt:
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02/13/2012
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Publication #:
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Pub Dt:
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06/07/2012
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Title:
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MICROELECTRONIC STRUCTURE BY SELECTIVE DEPOSITION
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08/26/2014
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13372085
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02/13/2012
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Publication #:
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Pub Dt:
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08/15/2013
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Title:
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DEVICES HAVING BIAS TEMPERATURE INSTABILITY COMPENSATION
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09/16/2014
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13372604
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02/14/2012
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Publication #:
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Pub Dt:
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08/23/2012
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Title:
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SEMICONDUCTOR DEVICE COMPRISING SELF-ALIGNED CONTACT ELEMENTS
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Patent #:
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08/13/2013
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13372714
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02/14/2012
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Publication #:
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Pub Dt:
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06/07/2012
| | | | |
Title:
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OMEGA SHAPED NANOWIRE TUNNEL FIELD EFFECT TRANSISTORS
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Patent #:
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03/25/2014
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13372719
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Filing Dt:
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02/14/2012
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Publication #:
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Pub Dt:
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06/14/2012
| | | | |
Title:
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OMEGA SHAPED NANOWIRE FIELD EFFECT TRANSISTORS
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Patent #:
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02/18/2014
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13372837
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02/14/2012
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Pub Dt:
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08/23/2012
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Title:
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FIN-TRANSISTOR FORMED ON A PATTERNED STI REGION BY LATE FIN ETCH
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11/15/2016
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13372974
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02/14/2012
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Pub Dt:
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06/07/2012
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Title:
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SILICON WAFER BASED STRUCTURE FOR HETEROSTRUCTURE SOLAR CELLS
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Patent #:
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09/17/2013
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13396291
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02/14/2012
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06/14/2012
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Title:
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FINFET WITH REDUCED GATE TO FIN OVERLAY SENSITIVITY
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10/16/2012
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13397004
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02/15/2012
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Pub Dt:
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08/09/2012
| | | | |
Title:
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ENHANCED ELECTROMIGRATION RESISTANCE IN TSV STRUCTURE AND DESIGN
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NONE
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13397199
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02/15/2012
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Pub Dt:
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08/15/2013
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Title:
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Methods of Forming Device Level Conductive Contacts to Improve Device Performance and Semiconductor Devices Comprising Such Contacts
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03/18/2014
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13397345
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02/15/2012
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Pub Dt:
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08/30/2012
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Title:
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SOI Semiconductor Device Comprising a Substrate Diode with Reduced Metal Silicide Leakage
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03/11/2014
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13398070
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02/16/2012
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Pub Dt:
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06/14/2012
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Title:
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METAL CAP WITH ULTRA-LOW k DIELECTRIC MATERIAL FOR CIRCUIT INTERCONNECT APPLICATIONS
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08/11/2015
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13398151
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02/16/2012
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Pub Dt:
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08/22/2013
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Title:
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MOSFET WITH WORK FUNCTION ADJUSTED METAL BACKGATE
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Patent #:
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08/05/2014
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13398190
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02/16/2012
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Publication #:
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Pub Dt:
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08/22/2013
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Title:
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OPTICAL RECEIVER USING INFINITE IMPULSE RESPONSE DECISION FEEDBACK EQUALIZATION
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Patent #:
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01/28/2014
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13398339
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02/16/2012
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Pub Dt:
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08/22/2013
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Title:
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NON-PLANAR MOSFET STRUCTURES WITH ASYMMETRIC RECESSED SOURCE DRAINS AND METHODS FOR MAKING THE SAME
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Patent #:
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Issue Dt:
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09/09/2014
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13398408
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Filing Dt:
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02/16/2012
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Publication #:
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Pub Dt:
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06/14/2012
| | | | |
Title:
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STRUCTURE AND LAYOUT OF A FET PRIME CELL
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Patent #:
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Issue Dt:
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10/08/2013
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13398518
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Filing Dt:
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02/16/2012
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Publication #:
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Pub Dt:
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06/07/2012
| | | | |
Title:
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ELECTRONICALLY SCANNABLE MULTIPLEXING DEVICE
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Patent #:
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03/18/2014
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13398991
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02/17/2012
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Publication #:
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Pub Dt:
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08/22/2013
| | | | |
Title:
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DRY ETCH POLYSILICON REMOVAL FOR REPLACEMENT GATES
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Patent #:
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09/24/2013
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13399674
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02/17/2012
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Publication #:
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Pub Dt:
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08/22/2013
| | | | |
Title:
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METHODS FOR FABRICATING INTEGRATED CIRCUITS
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Patent #:
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02/24/2015
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13399675
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02/17/2012
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Publication #:
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Pub Dt:
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08/22/2013
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Title:
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ANALOG SIGNAL CURRENT INTEGRATORS WITH TUNABLE PEAKING FUNCTION
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Patent #:
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03/25/2014
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13399727
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02/17/2012
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Publication #:
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Pub Dt:
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08/22/2013
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Title:
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METHODS FOR FABRICATING SEMICONDUCTOR DEVICES WITH ISOLATION REGIONS HAVING UNIFORM STEPHEIGHTS
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Patent #:
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02/04/2014
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13400407
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02/20/2012
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Pub Dt:
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08/22/2013
| | | | |
Title:
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METHODS OF FORMING ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES
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Patent #:
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NONE
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Application #:
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13400422
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Filing Dt:
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02/20/2012
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Publication #:
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Pub Dt:
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08/22/2013
| | | | |
Title:
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METHODS OF FORMING STEPPED ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES USING A SPACER TECHNIQUE
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Patent #:
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Issue Dt:
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10/08/2013
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13400445
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02/20/2012
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Publication #:
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Pub Dt:
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08/22/2013
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Title:
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METHODS FOR DECOMPOSING CIRCUIT DESIGN LAYOUTS AND FOR FABRICATING SEMICONDUCTOR DEVICES USING DECOMPOSED PATTERNS
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Patent #:
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07/30/2013
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13400610
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02/21/2012
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Pub Dt:
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08/22/2013
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Title:
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INTERCONNECT STRUCTURES AND METHODS OF MANUFACTURING OF INTERCONNECT STRUCTURES
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Patent #:
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06/10/2014
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13400981
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02/21/2012
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Pub Dt:
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08/22/2013
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Title:
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REPLACEMENT GATE APPROACH FOR HIGH-K METAL GATE STACKS BY USING A MULTI-LAYER CONTACT LEVEL
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07/22/2014
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13401064
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02/21/2012
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Pub Dt:
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08/22/2013
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Title:
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TRANSISTOR HAVING A MONOCRYSTALLINE CENTER SECTION AND A POLYCRYSTALLINE OUTER SECTION, AND NARROW IN-SUBSTRATE COLLECTOR REGION FOR REDUCED BASE-COLLECTOR JUNCTION CAPACITANCE
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09/25/2012
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13401967
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02/22/2012
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06/14/2012
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Title:
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ULTRATHIN SPACER FORMATION FOR CARBON-BASED FET
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12/23/2014
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13402068
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02/22/2012
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08/22/2013
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Title:
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DUAL HARD MASK LITHOGRAPHY PROCESS
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01/05/2016
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13403457
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02/23/2012
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06/14/2012
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SEMICONDUCTOR STRUCTURE AND METHODS OF MANUFACTURE
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01/08/2013
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13403799
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02/23/2012
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08/23/2012
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VERIFICATION TECHNIQUES FOR LIVENESS CHECKING OF LOGIC DESIGNS
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03/25/2014
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13404212
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02/24/2012
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08/29/2013
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Title:
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METHODS AND SYSTEMS FOR MEMORY DEVICES WITH ASYMMETRIC SWITCHING CHARACTERISTICS
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04/22/2014
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13405587
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02/27/2012
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08/29/2013
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Title:
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METAL PEROXO COMPOUNDS WITH ORGANIC CO-LIGANDS FOR ELECTRON BEAM, DEEP UV AND EXTREME UV PHOTORESIST APPLICATIONS
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02/18/2014
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13405662
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02/27/2012
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08/29/2013
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Title:
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PATTERN BASED METHOD FOR IDENTIFYING DESIGN FOR MANUFACTURING IMPROVEMENT IN A SEMICONDUCTOR DEVICE
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04/15/2014
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13405682
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02/27/2012
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08/29/2013
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Title:
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GATE-ALL AROUND SEMICONDUCTOR NANOWIRE FET'S ON BULK SEMICODUCTOR WAFERS
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NONE
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13405713
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02/27/2012
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Pub Dt:
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08/29/2013
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Title:
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METHODS OF FORMING ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES BY EMPLOYING A SPIN-ON GLASS MATERIAL OR A FLOWABLE OXIDE MATERIAL
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03/18/2014
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13405732
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02/27/2012
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Pub Dt:
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08/29/2013
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Title:
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PAD-LESS GATE-ALL AROUND SEMICONDUCTOR NANOWIRE FETS ON BULK SEMICONDUCTOR WAFERS
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06/18/2013
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13406096
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02/27/2012
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Pub Dt:
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06/21/2012
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Title:
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THREE-TERMINAL CASCADE SWITCH FOR CONTROLLING STATIC POWER CONSUMPTION IN INTEGRATED CIRCUITS
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04/09/2013
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13406652
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02/28/2012
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Pub Dt:
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06/21/2012
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Title:
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MULTI-GATE NON-PLANAR FIELD EFFECT TRANSISTOR STRUCTURE AND METHOD OF FORMING THE STRUCTURE USING A DOPANT IMPLANT PROCESS TO TUNE DEVICE DRIVE CURRENT
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01/14/2014
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13406838
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02/28/2012
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08/29/2013
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Title:
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SOLAR CELL MADE IN A SINGLE PROCESSING CHAMBER
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12/23/2014
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13406869
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02/28/2012
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Pub Dt:
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09/06/2012
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Title:
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SUPERIOR INTEGRITY OF HIGH-K METAL GATE STACKS BY CAPPING STI REGIONS
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Patent #:
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04/01/2014
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13407813
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02/29/2012
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08/29/2013
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Title:
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SENSE SCHEME FOR PHASE CHANGE MATERIAL CONTENT ADDRESSABLE MEMORY
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08/19/2014
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13408139
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02/29/2012
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Pub Dt:
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08/29/2013
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Title:
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METHODS OF FORMING BULK FINFET DEVICES WITH REPLACEMENT GATES SO AS TO REDUCE PUNCH THROUGH LEAKAGE CURRENTS
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10/30/2012
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13408141
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02/29/2012
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Pub Dt:
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06/28/2012
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Title:
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INTERLEVEL CONDUCTIVE LIGHT SHIELD
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02/18/2014
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13408291
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02/29/2012
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Pub Dt:
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08/29/2013
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Title:
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METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH NARROW, METAL FILLED OPENINGS
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08/19/2014
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13408300
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02/29/2012
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Pub Dt:
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08/29/2013
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Title:
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THROUGH SILICON VIA NOISE SUPPRESSION USING BURIED INTERFACE CONTACTS
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04/02/2013
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13408407
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02/29/2012
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07/26/2012
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Title:
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LENGTHENING LIFE OF A LIMITED LIFE MEMORY
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10/30/2012
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13408658
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02/29/2012
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Pub Dt:
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06/28/2012
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Title:
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METHODS FOR FORMING A BONDED SEMICONDUCTOR SUBSTRATE INCLUDING A COOLING MECHANISM
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07/23/2013
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13410466
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03/02/2012
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Pub Dt:
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06/28/2012
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Title:
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IC HAVING VIABAR INTERCONNECTION AND RELATED METHOD
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Patent #:
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NONE
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13410729
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03/02/2012
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Publication #:
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Pub Dt:
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09/05/2013
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Title:
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OPTICAL PROXIMITY CORRECTION METHODS FOR MASKS TO BE USED IN MULTIPLE PATTERNING PROCESSES
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Patent #:
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NONE
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13410793
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03/02/2012
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Publication #:
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Pub Dt:
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09/05/2013
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Title:
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MULTIPLE STEP IMPLANT PROCESS FOR FORMING SOURCE/DRAIN REGIONS ON SEMICONDUCTOR DEVICES
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Issue Dt:
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09/16/2014
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13414742
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03/08/2012
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Pub Dt:
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09/12/2013
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Title:
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Fuse and Integrated Conductor
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Patent #:
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Issue Dt:
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01/14/2014
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Application #:
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13414877
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Filing Dt:
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03/08/2012
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Publication #:
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Pub Dt:
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09/12/2013
| | | | |
Title:
|
STRUCTURES AND METHODS FOR DETECTING SOLDER WETTING OF PEDESTAL SIDEWALLS
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Patent #:
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Issue Dt:
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09/16/2014
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Application #:
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13414946
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Filing Dt:
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03/08/2012
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Publication #:
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Pub Dt:
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09/12/2013
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Title:
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HNO3 SINGLE WAFER CLEAN PROCESS TO STRIP NICKEL AND FOR MOL POST ETCH
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Patent #:
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Issue Dt:
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07/15/2014
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Application #:
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13414971
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Filing Dt:
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03/08/2012
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Publication #:
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Pub Dt:
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09/12/2013
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Title:
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MULTIPLE PATTERNING PROCESS FOR FORMING TRENCHES OR HOLES USING STITCHED ASSIST FEATURES
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Patent #:
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Issue Dt:
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06/17/2014
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Application #:
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13415012
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Filing Dt:
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03/08/2012
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Publication #:
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Pub Dt:
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09/13/2012
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Title:
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DETERMINING CELL-STATE IN PHASE-CHANGE MEMORY
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Patent #:
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Issue Dt:
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07/08/2014
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Application #:
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13415159
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Filing Dt:
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03/08/2012
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Publication #:
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Pub Dt:
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07/05/2012
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Title:
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INTERCONNECT STRUCTURE AND METHOD OF MAKING SAME
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Patent #:
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Issue Dt:
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09/16/2014
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Application #:
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13415492
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Filing Dt:
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03/08/2012
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Publication #:
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Pub Dt:
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09/12/2013
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Title:
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NISI REWORK PROCEDURE TO REMOVE PLATINUM RESIDUALS
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Patent #:
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Issue Dt:
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10/01/2013
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Application #:
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13415902
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Filing Dt:
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03/09/2012
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Publication #:
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Pub Dt:
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09/12/2013
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Title:
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SELF-ALIGNED POLYMER PASSIVATION/ALUMINUM PAD
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Patent #:
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Issue Dt:
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05/13/2014
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Application #:
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13416354
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Filing Dt:
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03/09/2012
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Publication #:
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Pub Dt:
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07/12/2012
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Title:
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EFFICIENCY IN ANTIREFLECTIVE COATING LAYERS FOR SOLAR CELLS
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Patent #:
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Issue Dt:
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12/09/2014
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Application #:
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13417491
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Filing Dt:
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03/12/2012
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Publication #:
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Pub Dt:
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09/12/2013
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Title:
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PROCESSES FOR FORMING INTEGRATED CIRCUITS AND INTEGRATED CIRCUITS FORMED THEREBY
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Patent #:
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Issue Dt:
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11/05/2013
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Application #:
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13417651
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Filing Dt:
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03/12/2012
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Publication #:
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Pub Dt:
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07/05/2012
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Title:
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ASYMMETRIC TRANSISTOR DEVICES FORMED BY ASYMMETRIC SPACERS AND TILTED IMPLANTATION
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Patent #:
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Issue Dt:
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03/12/2013
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Application #:
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13417829
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Filing Dt:
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03/12/2012
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Publication #:
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Pub Dt:
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07/05/2012
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Title:
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NANOMESH SRAM CELL
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Patent #:
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Issue Dt:
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01/14/2014
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Application #:
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13417900
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Filing Dt:
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03/12/2012
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Publication #:
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Pub Dt:
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07/05/2012
| | | | |
Title:
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STRUCTURE AND METHOD TO FORM EDRAM ON SOI SUBSTRATE
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Patent #:
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Issue Dt:
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10/29/2013
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Application #:
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13418421
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Filing Dt:
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03/13/2012
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Publication #:
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Pub Dt:
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07/12/2012
| | | | |
Title:
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MULTIPLE EXPOSURE PHOTOLITHOGRAPHY METHODS
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Patent #:
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Issue Dt:
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09/16/2014
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Application #:
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13418423
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Filing Dt:
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03/13/2012
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Publication #:
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Pub Dt:
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10/04/2012
| | | | |
Title:
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ENCODING A DATA WORD FOR WRITING THE ENCODED DATA WORD IN A MULTI-LEVEL SOLID STATE MEMORY
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Patent #:
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Issue Dt:
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01/13/2015
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Application #:
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13418454
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Filing Dt:
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03/13/2012
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Publication #:
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Pub Dt:
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07/05/2012
| | | | |
Title:
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CARBON NANOTUBE STRUCTURES FOR ENHANCEMENT OF THERMAL DISSIPATION FROM SEMICONDUCTOR MODULES
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Patent #:
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Issue Dt:
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10/22/2013
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Application #:
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13418659
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Filing Dt:
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03/13/2012
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Publication #:
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Pub Dt:
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07/05/2012
| | | | |
Title:
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METHOD OF MANUFACTURING AN INTERCONNECT STRUCTURE AND DESIGN STRUCTURE THEREOF
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Patent #:
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Issue Dt:
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01/08/2013
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Application #:
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13418716
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Filing Dt:
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03/13/2012
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Publication #:
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Pub Dt:
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07/05/2012
| | | | |
Title:
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HYBRID BONDING INTERFACE FOR 3-DIMENSIONAL CHIP INTEGRATION
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Patent #:
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Issue Dt:
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06/11/2013
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Application #:
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13418818
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Filing Dt:
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03/13/2012
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Publication #:
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Pub Dt:
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07/05/2012
| | | | |
Title:
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STRUCTURE WITH SELF ALIGNED RESIST LAYER ON AN INTERCONNECT SURFACE AND METHOD OF MAKING SAME
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Patent #:
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Issue Dt:
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08/12/2014
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Application #:
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13418895
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Filing Dt:
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03/13/2012
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Publication #:
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Pub Dt:
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09/19/2013
| | | | |
Title:
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METHODS OF MAKING JOGGED LAYOUT ROUTINGS DOUBLE PATTERNING COMPLIANT
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Patent #:
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Issue Dt:
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05/03/2016
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Application #:
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13419286
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Filing Dt:
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03/13/2012
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Publication #:
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Pub Dt:
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09/19/2013
| | | | |
Title:
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AUTOMATED HYBRID METROLOGY FOR SEMICONDUCTOR DEVICE FABRICATION
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|
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Patent #:
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Issue Dt:
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09/03/2013
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Application #:
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13419508
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Filing Dt:
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03/14/2012
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Publication #:
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Pub Dt:
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07/05/2012
| | | | |
Title:
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FORMATION OF FINFET GATE SPACER
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Patent #:
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Issue Dt:
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04/09/2013
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Application #:
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13419522
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Filing Dt:
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03/14/2012
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Publication #:
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Pub Dt:
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07/05/2012
| | | | |
Title:
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SINGLE MASK ADDER PHASE CHANGE MEMORY ELEMENT
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|
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Patent #:
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Issue Dt:
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10/07/2014
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Application #:
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13420412
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Filing Dt:
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03/14/2012
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Publication #:
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Pub Dt:
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09/19/2013
| | | | |
Title:
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METHODS FOR FABRICATING INTEGRATED CIRCUITS
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|
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Patent #:
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Issue Dt:
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09/09/2014
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Application #:
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13421154
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Filing Dt:
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03/15/2012
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Publication #:
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Pub Dt:
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09/20/2012
| | | | |
Title:
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PROTECTION OF REACTIVE METAL SURFACES OF SEMICONDUCTOR DEVICES DURING SHIPPING BY PROVIDING AN ADDITIONAL PROTECTION LAYER
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|
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Patent #:
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Issue Dt:
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09/02/2014
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Application #:
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13421242
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Filing Dt:
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03/15/2012
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Publication #:
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Pub Dt:
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09/20/2012
| | | | |
Title:
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PERFORMANCE ENHANCEMENT IN TRANSISTORS BY REDUCING THE RECESSING OF ACTIVE REGIONS AND REMOVING SPACERS
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Patent #:
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Issue Dt:
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09/16/2014
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Application #:
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13421394
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Filing Dt:
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03/15/2012
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Publication #:
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Pub Dt:
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09/20/2012
| | | | |
Title:
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REDUCING DEFECT RATE DURING DEPOSITION OF A CHANNEL SEMICONDUCTOR ALLOY INTO AN IN SITU RECESSED ACTIVE REGION
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|
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Patent #:
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Issue Dt:
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07/16/2013
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Application #:
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13421400
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Filing Dt:
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03/15/2012
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Publication #:
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Pub Dt:
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07/12/2012
| | | | |
Title:
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METHOD OF FABRICATING A DEVICE USING LOW TEMPERATURE ANNEAL PROCESSES, A DEVICE AND DESIGN STRUCTURE
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Patent #:
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Issue Dt:
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08/27/2013
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Application #:
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13422295
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Filing Dt:
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03/16/2012
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Publication #:
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Pub Dt:
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09/19/2013
| | | | |
Title:
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METHODS OF FORMING COPPER-BASED CONDUCTIVE STRUCTURES ON AN INTEGRATED CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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03/18/2014
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Application #:
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13422297
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Filing Dt:
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03/16/2012
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Publication #:
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Pub Dt:
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09/20/2012
| | | | |
Title:
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STRUCTURE AND METHOD OF FORMING A TRANSISTOR WITH ASYMMETRIC CHANNEL AND SOURCE/DRAIN REGIONS
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Patent #:
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Issue Dt:
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12/10/2013
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Application #:
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13422390
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Filing Dt:
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03/16/2012
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Publication #:
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Pub Dt:
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07/12/2012
| | | | |
Title:
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SEMICONDUCTOR STRUCTURES AND METHODS OF MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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07/29/2014
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Application #:
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13422439
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Filing Dt:
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03/16/2012
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Publication #:
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Pub Dt:
|
09/19/2013
| | | | |
Title:
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METHODS OF FORMING COPPER-BASED CONDUCTIVE STRUCTURES ON SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
|
08/13/2013
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Application #:
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13423659
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Filing Dt:
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03/19/2012
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Publication #:
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Pub Dt:
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07/12/2012
| | | | |
Title:
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Structure and Apparatus for Cooling Integrated Circuits Using Copper Microchannels
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|
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Patent #:
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Issue Dt:
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01/14/2014
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Application #:
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13423772
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Filing Dt:
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03/19/2012
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Publication #:
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Pub Dt:
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07/12/2012
| | | | |
Title:
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APPARATUS AND METHODS FOR PACKAGING INTEGRATED CIRCUIT CHIPS WITH ANTENNAS FORMED FROM PACKAGE LEAD WIRES
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Patent #:
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Issue Dt:
|
03/04/2014
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Application #:
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13424447
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Filing Dt:
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03/20/2012
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Publication #:
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Pub Dt:
|
09/26/2013
| | | | |
Title:
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Structure and method to improve etsoi mosfets with back gate
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|
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Patent #:
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Issue Dt:
|
11/26/2013
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Application #:
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13424787
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Filing Dt:
|
03/20/2012
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Publication #:
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Pub Dt:
|
09/26/2013
| | | | |
Title:
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SELECTIVELY RAISED SOURCE/DRAIN TRANSISTOR
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|
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Patent #:
|
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Issue Dt:
|
09/10/2013
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Application #:
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13425654
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Filing Dt:
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03/21/2012
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Publication #:
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Pub Dt:
|
07/12/2012
| | | | |
Title:
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REPLACEMENT SPACER FOR TUNNEL FETS
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|
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Patent #:
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Issue Dt:
|
08/23/2016
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Application #:
|
13427216
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Filing Dt:
|
03/22/2012
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Publication #:
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Pub Dt:
|
07/26/2012
| | | | |
Title:
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COMPLIMENTARY METAL-INSULATOR-METAL (MIM) CAPACITORS AND METHOD OF MANUFACTURE
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|
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Patent #:
|
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Issue Dt:
|
07/01/2014
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Application #:
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13427237
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Filing Dt:
|
03/22/2012
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Publication #:
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Pub Dt:
|
07/12/2012
| | | | |
Title:
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REPLACEMENT GATE CMOS
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|
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Patent #:
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Issue Dt:
|
10/08/2013
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Application #:
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13427963
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Filing Dt:
|
03/23/2012
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Publication #:
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Pub Dt:
|
07/26/2012
| | | | |
Title:
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STRUCTURE AND METHOD TO MAKE REPLACEMENT METAL GATE AND CONTACT METAL
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|
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Patent #:
|
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Issue Dt:
|
11/19/2013
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Application #:
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13428004
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Filing Dt:
|
03/23/2012
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Publication #:
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Pub Dt:
|
09/26/2013
| | | | |
Title:
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CREATING DEEP TRENCHES ON UNDERLYING SUBSTRATE
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|
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Patent #:
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Issue Dt:
|
09/17/2013
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Application #:
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13428277
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Filing Dt:
|
03/23/2012
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Publication #:
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Pub Dt:
|
09/26/2013
| | | | |
Title:
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FLEXIBLE FIBER TO WAFER INTERFACE
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|
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Patent #:
|
|
Issue Dt:
|
04/29/2014
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Application #:
|
13429466
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Filing Dt:
|
03/26/2012
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Publication #:
|
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Pub Dt:
|
07/26/2012
| | | | |
Title:
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CIRCUIT DESIGN APPROXIMATION
|
|
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Patent #:
|
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Issue Dt:
|
05/06/2014
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Application #:
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13430018
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Filing Dt:
|
03/26/2012
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Publication #:
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Pub Dt:
|
07/19/2012
| | | | |
Title:
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METHOD TO TAILOR LOCATION OF PEAK ELECTRIC FIELD DIRECTLY UNDERNEATH AN EXTENSION SPACER FOR ENHANCED PROGRAMMABILITY OF A PROMPT-SHIFT DEVICE
|
|
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Patent #:
|
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Issue Dt:
|
06/17/2014
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Application #:
|
13430067
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Filing Dt:
|
03/26/2012
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Publication #:
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Pub Dt:
|
07/26/2012
| | | | |
Title:
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ASYMMETRIC SILICON-ON-INSULATOR SRAM CELL
|
|