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03/18/2014
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13544259
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07/09/2012
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01/09/2014
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Title:
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METHODS OF FORMING FINFET DEVICES WITH ALTERNATIVE CHANNEL MATERIALS
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02/24/2015
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13545224
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07/10/2012
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01/16/2014
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Title:
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FIELD EFFECT TRANSISTORS WITH VARYING THRESHOLD VOLTAGES
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11/26/2013
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13545456
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07/10/2012
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12/05/2013
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CUT-VERY-LAST DUAL-EPI FLOW
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08/26/2014
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13545621
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07/10/2012
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01/16/2014
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Title:
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FINFET DEVICE WITH A GRAPHENE GATE ELECTRODE AND METHODS OF FORMING SAME
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10/28/2014
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13545624
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07/10/2012
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01/16/2014
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Title:
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STRESS ENHANCED CMOS CIRCUITS AND METHODS FOR THEIR MANUFACTURE
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11/19/2013
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13546150
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07/11/2012
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Title:
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INVERSION MODE VARACTOR
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03/01/2016
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13546151
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07/11/2012
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11/01/2012
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Title:
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PRECAST THERMAL INTERFACE ADHESIVE FOR EASY AND REPEATED, SEPARATION AND REMATING
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01/07/2014
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13546562
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07/11/2012
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01/16/2014
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Title:
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SYSTEMS AND METHODS FOR FIXING PIN MISMATCH IN LAYOUT MIGRATION
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02/04/2014
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13547142
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07/12/2012
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01/16/2014
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Title:
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Replacement Contacts for All-Around Contacts
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07/23/2013
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13547485
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07/12/2012
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11/01/2012
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Title:
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USING DIRECT MEMORY ACCESS TO INITIALIZE A PROGRAMMABLE LOGIC DEVICE
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09/16/2014
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13547792
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07/12/2012
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11/01/2012
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Title:
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CONTROL OF THRESHOLD VOLTAGES IN HIGH-K METAL GATE STACK AND STRUCTURES FOR CMOS DEVICES
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12/17/2013
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13549184
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07/13/2012
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11/08/2012
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Title:
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ENHANCING INTERFACE CHARACTERISTICS BETWEEN A CHANNEL SEMICONDUCTOR ALLOY AND A GATE DIELECTRIC BY AN OXIDATION PROCESS
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09/03/2013
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13549440
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07/14/2012
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11/08/2012
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CLUSTERED STACKED VIAS FOR RELIABLE ELECTRONIC SUBSTRATES
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02/03/2015
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13550092
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07/16/2012
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01/03/2013
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Analog-Digital Converter
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08/19/2014
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13550861
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07/17/2012
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01/23/2014
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Replacement Gate Fin First Wire Last Gate All Around Devices
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11/05/2013
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13550957
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07/17/2012
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11/08/2012
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SCHEDULING FOR PARALLEL PROCESSING OF REGIONALLY-CONSTRAINED PLACEMENT PROBLEM
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03/18/2014
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13551054
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07/17/2012
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01/23/2014
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Title:
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SEMICONDUCTOR STRUCTURE HAVING NFET EXTENSION LAST IMPLANTS
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12/31/2013
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13551659
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07/18/2012
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01/23/2014
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Title:
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POST-GATE ISOLATION AREA FORMATION FOR FIN FIELD EFFECT TRANSISTOR DEVICE
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01/27/2015
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13551728
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07/18/2012
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01/23/2014
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Title:
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WRITING SCHEME FOR PHASE CHANGE MATERIAL-CONTENT ADDRESSABLE MEMORY
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07/15/2014
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13551766
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07/18/2012
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01/23/2014
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Title:
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DRAM WITH DUAL LEVEL WORD LINES
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03/18/2014
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13551776
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07/18/2012
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01/23/2014
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Title:
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SELF-ALIGNED PROCESS TO FABRICATE A MEMORY CELL ARRAY WITH A SURROUNDING-GATE ACCESS TRANSISTOR
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07/08/2014
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13551785
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07/18/2012
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01/24/2013
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TUNNEL FIELD-EFFECT TRANSISTOR
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02/11/2014
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13551962
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07/18/2012
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01/23/2014
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USE OF GRAPHENE TO LIMIT COPPER SURFACE OXIDATION, DIFFUSION AND ELECTROMIGRATION IN INTERCONNECT STRUCTURES
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09/23/2014
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13551971
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07/18/2012
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01/23/2014
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LOCAL WIRING FOR A BIPOLAR JUNCTION TRANSISTOR INCLUDING A SELF-ALIGNED EMITTER REGION
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06/25/2013
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13552091
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07/18/2012
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11/08/2012
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POWER DELIVERY IN A HETEROGENEOUS 3-D STACKED APPARATUS
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09/03/2013
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13552205
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07/18/2012
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11/08/2012
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MULTIPLYING PATTERN DENSITY BY SINGLE SIDEWALL IMAGING TRANSFER
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09/10/2013
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13552313
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07/18/2012
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PROVIDING CONVERSION OF A PLANAR DESIGN TO A FINFET DESIGN
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03/04/2014
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13552722
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07/19/2012
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02/14/2013
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FORMATION OF A CHANNEL SEMICONDUCTOR ALLOY BY FORMING A NITRIDE BASED HARD MASK LAYER
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06/24/2014
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13552788
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07/19/2012
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01/23/2014
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CONTROL OF SILVER IN C4 METALLURGY WITH PLATING PROCESS
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06/03/2014
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13552792
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07/19/2012
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01/23/2014
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SOLDER VOLUME COMPENSATION WITH C4 PROCESS
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04/29/2014
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07/20/2012
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01/23/2014
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REDISTRIBUTION LAYER (RDL) WITH VARIABLE OFFSET BUMPS
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12/10/2013
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13553887
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07/20/2012
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01/17/2013
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SELF ORIENTING MICRO PLATES OF THERMALLY CONDUCTING MATERIAL AS COMPONENT IN THERMAL PASTE OR ADHESIVE
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08/05/2014
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13553941
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07/20/2012
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01/23/2014
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OPTIMIZATION METALLIZATION FOR PREVENTION OF DIELECTRIC CRACKING UNDER CONTROLLED COLLAPSE CHIP CONNECTIONS
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05/20/2014
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07/20/2012
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01/23/2014
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MULTI-LAYER BARRIER LAYER FOR INTERCONNECT STRUCTURE
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02/23/2016
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07/20/2012
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01/23/2014
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MULTI-LAYER BARRIER LAYER FOR INTERCONNECT STRUCTURE
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08/27/2013
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07/20/2012
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11/08/2012
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NANOWIRE CIRCUITS IN MATCHED DEVICES
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05/21/2013
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13554065
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07/20/2012
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11/08/2012
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A P-FET WITH A STRAINED NANOWIRE CHANNEL AND EMBEDDED SIGE SOURCE AND DRAIN STRESSORS
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10/28/2014
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13555240
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07/23/2012
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01/23/2014
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METHOD OF MULTIPLE PATTERNING TO FORM SEMICONDUCTOR DEVICES
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12/02/2014
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07/23/2012
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01/02/2014
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PINNING MAGNETIC DOMAIN WALLS IN A MAGNETIC DOMAIN SHIFT REGISTER MEMORY DEVICE
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06/03/2014
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13555368
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07/23/2012
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01/02/2014
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MAGNETIC TUNNEL JUNCTION SELF-ALIGNMENT IN MAGNETIC DOMAIN WALL SHIFT REGISTER MEMORY DEVICES
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07/02/2013
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07/23/2012
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11/15/2012
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OPTIMIZED SEMICONDUCTOR PACKAGING IN A THREE-DIMENSIONAL STACK
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04/01/2014
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13556237
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07/24/2012
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01/30/2014
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PHASE ROTATOR BASED ON VOLTAGE REFERENCING
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07/30/2013
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07/24/2012
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11/15/2012
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08/11/2015
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07/24/2012
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11/15/2012
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03/03/2015
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07/24/2012
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01/30/2014
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12/24/2013
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07/24/2012
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11/15/2012
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GERMANIUM PHOTODETECTOR
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10/08/2013
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07/25/2012
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11/15/2012
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INCREASED CAPACITY HETEROGENEOUS STORAGE ELEMENTS
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07/16/2013
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07/25/2012
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11/15/2012
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INCREASED CAPACITY HETEROGENEOUS STORAGE ELEMENTS
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04/08/2014
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07/26/2012
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01/16/2014
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REPLACEMENT CONTACTS FOR ALL-AROUND CONTACTS
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03/05/2013
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13559095
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07/26/2012
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11/22/2012
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HIGH ENERGY DENSITY STORAGE MATERIAL DEVICE USING NANOCHANNEL STRUCTURE
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08/20/2013
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07/27/2012
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11/22/2012
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CMOS DEVICES INCORPORATING HYBRID ORIENTATION TECHNOLOGY (HOT) WITH EMBEDDED CONNECTORS
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11/19/2013
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13559941
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07/27/2012
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11/22/2012
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GRAPHENE DEVICES AND SILICON FIELD EFFECT TRANSISTORS IN 3D HYBRID INTEGRATED CIRCUITS
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01/07/2014
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13560280
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07/27/2012
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01/30/2014
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REPAIRING ANOMALOUS STIFF PILLAR BUMPS
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07/29/2014
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13560446
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07/27/2012
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11/22/2012
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INTERCONNECT STRUCTURES AND DESIGN STRUCTURES FOR A RADIOFREQUENCY INTEGRATED CIRCUIT
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10/08/2013
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13560769
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07/27/2012
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FILTRATION MEMBRANE WITH COVALENTLY GRAFTED FOULING-RESISTANT POLYMER
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08/05/2014
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13561142
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07/30/2012
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01/30/2014
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SELF-ALIGNED TRENCH OVER FIN
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07/01/2014
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13561177
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07/30/2012
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01/30/2014
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GERMANIUM PHOTODETECTOR SCHOTTKY CONTACT FOR INTEGRATION WITH CMOS AND SI NANOPHOTONICS
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05/13/2014
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13561195
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07/30/2012
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01/30/2014
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METHOD FOR REDUCING WETTABILITY OF INTERCONNECT MATERIAL AT CORNER INTERFACE AND DEVICE INCORPORATING SAME
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02/03/2015
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13561352
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07/30/2012
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Publication #:
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Pub Dt:
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01/30/2014
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Title:
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MERGED FIN FINFET WITH (100) SIDEWALL SURFACES AND METHOD OF MAKING SAME
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Patent #:
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Issue Dt:
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08/05/2014
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Application #:
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13561661
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Filing Dt:
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07/30/2012
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Publication #:
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Pub Dt:
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01/30/2014
| | | | |
Title:
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UNDERFILL ADHESION MEASUREMENTS AT A MICROSCOPIC SCALE
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Patent #:
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Issue Dt:
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05/26/2015
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Application #:
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13561671
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Filing Dt:
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07/30/2012
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Publication #:
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Pub Dt:
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01/30/2014
| | | | |
Title:
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CHARGE SENSORS USING INVERTED LATERAL BIPOLAR JUNCTION TRANSISTORS
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Patent #:
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Issue Dt:
|
09/03/2013
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Application #:
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13561738
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Filing Dt:
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07/30/2012
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Title:
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PHOTONIC MODULATOR WITH A SEMICONDUCTOR CONTACT
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Patent #:
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Issue Dt:
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11/15/2016
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Application #:
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13561758
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Filing Dt:
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07/30/2012
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Publication #:
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Pub Dt:
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01/30/2014
| | | | |
Title:
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MULTI-ELEMENT PACKAGING OF CONCENTRATOR PHOTOVOLTAIC CELLS
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Patent #:
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Issue Dt:
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01/28/2014
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Application #:
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13561760
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Filing Dt:
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07/30/2012
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Publication #:
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Pub Dt:
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01/30/2014
| | | | |
Title:
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CAPTURING MUTUAL COUPLING EFFECTS BETWEEN AN INTEGRATED CIRCUIT CHIP AND CHIP PACKAGE
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Patent #:
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Issue Dt:
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06/17/2014
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Application #:
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13562341
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Filing Dt:
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07/31/2012
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Publication #:
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Pub Dt:
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02/06/2014
| | | | |
Title:
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SELF ALIGNED BORDERLESS CONTACT
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Patent #:
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Issue Dt:
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12/23/2014
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Application #:
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13562426
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Filing Dt:
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07/31/2012
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Publication #:
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Pub Dt:
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02/06/2014
| | | | |
Title:
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INTERCONNECT FORMATION USING A SIDEWALL MASK LAYER
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Patent #:
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Issue Dt:
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06/16/2015
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Application #:
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13562506
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Filing Dt:
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07/31/2012
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Publication #:
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Pub Dt:
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11/27/2014
| | | | |
Title:
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Rate Adaptive Transmission of Wireless Broadcast Packets
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Patent #:
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Issue Dt:
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05/27/2014
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Application #:
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13562659
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Filing Dt:
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07/31/2012
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Publication #:
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Pub Dt:
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02/06/2014
| | | | |
Title:
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INTEGRATED CIRCUIT HAVING A REPLACEMENT GATE STRUCTURE AND METHOD FOR FABRICATING THE SAME
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Patent #:
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Issue Dt:
|
06/04/2013
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Application #:
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13562827
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Filing Dt:
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07/31/2012
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Publication #:
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Pub Dt:
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11/22/2012
| | | | |
Title:
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SELF-ALIGNED CONTACTS IN CARBON DEVICES
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Patent #:
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Issue Dt:
|
04/29/2014
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Application #:
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13562927
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Filing Dt:
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07/31/2012
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Publication #:
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Pub Dt:
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02/06/2014
| | | | |
Title:
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METHOD AND STRUCTURE OF FORMING BACKSIDE THROUGH SILICON VIA CONNECTIONS
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Patent #:
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|
Issue Dt:
|
03/10/2015
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Application #:
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13563202
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Filing Dt:
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07/31/2012
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Publication #:
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Pub Dt:
|
02/06/2014
| | | | |
Title:
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DUAL WORK FUNCTION FINFET STRUCTURES AND METHODS FOR FABRICATING THE SAME
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Patent #:
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|
Issue Dt:
|
06/10/2014
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Application #:
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13564221
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Filing Dt:
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08/01/2012
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Publication #:
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Pub Dt:
|
02/06/2014
| | | | |
Title:
|
EXTREME ULTRAVIOLET (EUV) MULTILAYER DEFECT COMPENSATION AND EUV MASKS
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|
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Patent #:
|
|
Issue Dt:
|
08/05/2014
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Application #:
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13565080
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Filing Dt:
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08/02/2012
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Publication #:
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Pub Dt:
|
02/06/2014
| | | | |
Title:
|
SELF-POLARIZED MASK AND SELF-POLARIZED MASK APPLICATION
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|
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Patent #:
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|
Issue Dt:
|
03/04/2014
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Application #:
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13565970
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Filing Dt:
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08/03/2012
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Publication #:
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Pub Dt:
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02/07/2013
| | | | |
Title:
|
HIGH-K METAL GATE ELECTRODE STRUCTURES FORMED BY EARLY CAP LAYER ADAPTATION
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Patent #:
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|
Issue Dt:
|
03/17/2015
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Application #:
|
13566324
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Filing Dt:
|
08/03/2012
|
Publication #:
|
|
Pub Dt:
|
01/30/2014
| | | | |
Title:
|
CHARGE SENSORS USING INVERTED LATERAL BIPOLAR JUNCTION TRANSISTORS
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|
Patent #:
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|
Issue Dt:
|
10/22/2013
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Application #:
|
13566594
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Filing Dt:
|
08/03/2012
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Publication #:
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|
Pub Dt:
|
11/29/2012
| | | | |
Title:
|
NANOWIRE FET HAVING INDUCED RADIAL STRAIN
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|
|
Patent #:
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|
Issue Dt:
|
05/27/2014
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Application #:
|
13567233
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Filing Dt:
|
08/06/2012
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Publication #:
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|
Pub Dt:
|
02/06/2014
| | | | |
Title:
|
INTEGRATED CIRCUITS AND METHODS FOR FABRICATING INTEGRATED CIRCUITS USING DOUBLE PATTERNING PROCESSES
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|
|
Patent #:
|
|
Issue Dt:
|
02/25/2014
|
Application #:
|
13567353
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Filing Dt:
|
08/06/2012
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Publication #:
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Pub Dt:
|
11/29/2012
| | | | |
Title:
|
ADVANCED MEMORY DEVICE HAVING IMPROVED PERFORMANCE, REDUCED POWER AND INCREASED RELIABILITY
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|
Patent #:
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|
Issue Dt:
|
05/28/2013
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Application #:
|
13567357
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Filing Dt:
|
08/06/2012
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Publication #:
|
|
Pub Dt:
|
11/29/2012
| | | | |
Title:
|
ADVANCED MEMORY DEVICE HAVING IMPROVED PERFORMANCE, REDUCED POWER AND INCREASED RELIABILITY
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|
Patent #:
|
|
Issue Dt:
|
03/25/2014
|
Application #:
|
13567407
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Filing Dt:
|
08/06/2012
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Publication #:
|
|
Pub Dt:
|
02/06/2014
| | | | |
Title:
|
THIN FILM SOLAR CELLS
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|
|
Patent #:
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|
Issue Dt:
|
06/24/2014
|
Application #:
|
13567567
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Filing Dt:
|
08/06/2012
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Publication #:
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|
Pub Dt:
|
01/16/2014
| | | | |
Title:
|
UNDERFILL MATERIAL DISPENSING FOR STACKED SEMICONDUCTOR CHIPS
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|
|
Patent #:
|
|
Issue Dt:
|
09/20/2016
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Application #:
|
13567853
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Filing Dt:
|
08/06/2012
|
Publication #:
|
|
Pub Dt:
|
02/06/2014
| | | | |
Title:
|
INTEGRATED CIRCUITS WITH METAL-INSULATOR-METAL (MIM) CAPACITORS AND METHODS FOR FABRICATING SAME
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|
Patent #:
|
|
Issue Dt:
|
06/09/2015
|
Application #:
|
13568248
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Filing Dt:
|
08/07/2012
|
Publication #:
|
|
Pub Dt:
|
02/13/2014
| | | | |
Title:
|
ELECTRO-RHEOLOGICAL MICRO-CHANNEL ANISOTROPIC COOLED INTEGRATED CIRCUITS AND METHODS THEREOF
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|
|
Patent #:
|
|
Issue Dt:
|
12/24/2013
|
Application #:
|
13568324
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Filing Dt:
|
08/07/2012
|
Publication #:
|
|
Pub Dt:
|
11/29/2012
| | | | |
Title:
|
UTILIZATION OF ORGANIC BUFFER LAYER TO FABRICATE HIGH PERFORMANCE CARBON NANOELECTRONIC DEVICES
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|
Patent #:
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|
Issue Dt:
|
10/08/2013
|
Application #:
|
13568601
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Filing Dt:
|
08/07/2012
|
Publication #:
|
|
Pub Dt:
|
11/29/2012
| | | | |
Title:
|
SOI TRENCH DRAM STRUCTURE WITH BACKSIDE STRAP
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
13568655
|
Filing Dt:
|
08/07/2012
|
Publication #:
|
|
Pub Dt:
|
11/29/2012
| | | | |
Title:
|
THIN BODY SILICON-ON-INSULATOR TRANSISTOR WITH BORDERLESS SELF-ALIGNED CONTACTS
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|
|
Patent #:
|
|
Issue Dt:
|
02/25/2014
|
Application #:
|
13568720
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Filing Dt:
|
08/07/2012
|
Publication #:
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|
Pub Dt:
|
12/27/2012
| | | | |
Title:
|
INTEGRATED CIRCUIT STACK
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|
|
Patent #:
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|
Issue Dt:
|
03/10/2015
|
Application #:
|
13568802
|
Filing Dt:
|
08/07/2012
|
Publication #:
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|
Pub Dt:
|
02/13/2014
| | | | |
Title:
|
CAPACITORS POSITIONED AT THE DEVICE LEVEL IN AN INTEGRATED CIRCUIT PRODUCT AND METHODS OF MAKING SUCH CAPACITORS
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|
Patent #:
|
|
Issue Dt:
|
09/30/2014
|
Application #:
|
13569486
|
Filing Dt:
|
08/08/2012
|
Publication #:
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|
Pub Dt:
|
02/13/2014
| | | | |
Title:
|
METHOD FOR OPTIMIZING REFRESH RATE FOR DRAM
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|
|
Patent #:
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|
Issue Dt:
|
07/01/2014
|
Application #:
|
13569674
|
Filing Dt:
|
08/08/2012
|
Publication #:
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|
Pub Dt:
|
02/13/2014
| | | | |
Title:
|
CONTROLLED COLLAPSE CHIP CONNECTION (C4) STRUCTURE AND METHODS OF FORMING
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|
Patent #:
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|
Issue Dt:
|
07/02/2013
|
Application #:
|
13569745
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Filing Dt:
|
08/08/2012
|
Publication #:
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|
Pub Dt:
|
02/28/2013
| | | | |
Title:
|
ON-CHIP RADIATION DOSIMETER
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|
|
Patent #:
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|
Issue Dt:
|
10/21/2014
|
Application #:
|
13569826
|
Filing Dt:
|
08/08/2012
|
Publication #:
|
|
Pub Dt:
|
11/29/2012
| | | | |
Title:
|
CONSTRUCTION OF RELIABLE STACKED VIA IN ELECTRONIC SUBSTRATES - VERTICAL STIFFNESS CONTROL METHOD
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|
|
Patent #:
|
|
Issue Dt:
|
10/22/2013
|
Application #:
|
13570360
|
Filing Dt:
|
08/09/2012
|
Title:
|
INVERSION MODE VARACTOR
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
13570410
|
Filing Dt:
|
08/09/2012
|
Publication #:
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|
Pub Dt:
|
02/13/2014
| | | | |
Title:
|
METHODS OF FORMING STRESS-INDUCING LAYERS ON SEMICONDUCTOR DEVICES
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|
|
Patent #:
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|
Issue Dt:
|
08/19/2014
|
Application #:
|
13570841
|
Filing Dt:
|
08/09/2012
|
Publication #:
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|
Pub Dt:
|
01/30/2014
| | | | |
Title:
|
VISUALIZING JOBS IN A DISTRIBUTED ENVIRONMENT WITH LIMITED RESOURCES
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|
|
Patent #:
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|
Issue Dt:
|
07/16/2013
|
Application #:
|
13570847
|
Filing Dt:
|
08/09/2012
|
Publication #:
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|
Pub Dt:
|
11/29/2012
| | | | |
Title:
|
MANAGING CONCURRENT ACCESSES TO A CACHE
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|
|
Patent #:
|
|
Issue Dt:
|
11/05/2013
|
Application #:
|
13570921
|
Filing Dt:
|
08/09/2012
|
Publication #:
|
|
Pub Dt:
|
11/29/2012
| | | | |
Title:
|
PATTERNING NANO-SCALE PATTERNS ON A FILM COMPRISING UNZIPPING COPOLYMERS
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|
|
Patent #:
|
|
Issue Dt:
|
06/24/2014
|
Application #:
|
13570972
|
Filing Dt:
|
08/09/2012
|
Publication #:
|
|
Pub Dt:
|
02/13/2014
| | | | |
Title:
|
STRUCTURE WITH SUB-LITHOGRAPHIC RANDOM CONDUCTORS AS A PHYSICAL UNCLONABLE FUNCTION
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|
|
Patent #:
|
|
Issue Dt:
|
04/09/2013
|
Application #:
|
13570989
|
Filing Dt:
|
08/09/2012
|
Publication #:
|
|
Pub Dt:
|
12/06/2012
| | | | |
Title:
|
METHOD TO PREVENT SURFACE DECOMPOSITION OF III-V COMPOUND SEMICONDUCTORS
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|
|
Patent #:
|
|
Issue Dt:
|
03/18/2014
|
Application #:
|
13571094
|
Filing Dt:
|
08/09/2012
|
Publication #:
|
|
Pub Dt:
|
11/29/2012
| | | | |
Title:
|
GATED DIODE MEMORY CELLS
|
|