|
|
Patent #:
|
|
Issue Dt:
|
01/27/2015
|
Application #:
|
13604995
|
Filing Dt:
|
09/06/2012
|
Publication #:
|
|
Pub Dt:
|
03/07/2013
| | | | |
Title:
|
AMPLIFIERS USING GATED DIODES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/2015
|
Application #:
|
13605060
|
Filing Dt:
|
09/06/2012
|
Publication #:
|
|
Pub Dt:
|
03/06/2014
| | | | |
Title:
|
METHOD AND SYSTEM FOR DETERMINING OVERLAP PROCESS WINDOWS IN SEMICONDUCTORS BY INSPECTION TECHNIQUES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2013
|
Application #:
|
13605253
|
Filing Dt:
|
09/06/2012
|
Publication #:
|
|
Pub Dt:
|
10/03/2013
| | | | |
Title:
|
SOI LATERAL BIPOLAR JUNCTION TRANSISTOR HAVING A WIDE BAND GAP EMITTER CONTACT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2014
|
Application #:
|
13606035
|
Filing Dt:
|
09/07/2012
|
Publication #:
|
|
Pub Dt:
|
01/03/2013
| | | | |
Title:
|
METAL GATE FILL BY OPTIMIZING ETCH IN SACRIFICIAL GATE PROFILE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2014
|
Application #:
|
13606055
|
Filing Dt:
|
09/07/2012
|
Publication #:
|
|
Pub Dt:
|
12/27/2012
| | | | |
Title:
|
METHOD FOR DESIGNING OPTICAL LITHOGRAPHY MASKS FOR DIRECTED SELF-ASSEMBLY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2013
|
Application #:
|
13606326
|
Filing Dt:
|
09/07/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
ACCURATE DEPOSITION OF NANO-OBJECTS ON A SURFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2013
|
Application #:
|
13606365
|
Filing Dt:
|
09/07/2012
|
Publication #:
|
|
Pub Dt:
|
07/11/2013
| | | | |
Title:
|
Nanowire Field Effect Transistors
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/2015
|
Application #:
|
13606788
|
Filing Dt:
|
09/07/2012
|
Publication #:
|
|
Pub Dt:
|
02/07/2013
| | | | |
Title:
|
SELF-ALIGNED FINE PITCH PERMANENT ON-CHIP INTERCONNECT STRUCTURES AND METHOD OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2014
|
Application #:
|
13606815
|
Filing Dt:
|
09/07/2012
|
Publication #:
|
|
Pub Dt:
|
12/27/2012
| | | | |
Title:
|
ELECTRON BEAM SCULPTING OF TUNNELING JUNCTION FOR NANOPORE DNA SEQUENCING
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2014
|
Application #:
|
13606816
|
Filing Dt:
|
09/07/2012
|
Publication #:
|
|
Pub Dt:
|
12/27/2012
| | | | |
Title:
|
MOSFET WITH RECESSED CHANNEL FILM AND ABRUPT JUNCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2014
|
Application #:
|
13606893
|
Filing Dt:
|
09/07/2012
|
Publication #:
|
|
Pub Dt:
|
06/20/2013
| | | | |
Title:
|
SOI FINFET WITH RECESSED MERGED FINS AND LINER FOR ENHANCED STRESS COUPLING
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2015
|
Application #:
|
13607020
|
Filing Dt:
|
09/07/2012
|
Publication #:
|
|
Pub Dt:
|
02/28/2013
| | | | |
Title:
|
PROGRAMMING THE BEHAVIOR OF INDIVIDUAL CHIPS OR STRATA IN A 3D STACK OF INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/18/2013
|
Application #:
|
13607089
|
Filing Dt:
|
09/07/2012
|
Publication #:
|
|
Pub Dt:
|
02/28/2013
| | | | |
Title:
|
3D CHIP STACK SKEW REDUCTION WITH RESONANT CLOCK AND INDUCTIVE COUPLING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2013
|
Application #:
|
13607672
|
Filing Dt:
|
09/08/2012
|
Title:
|
GERMANIUM LATERAL BIPOLAR JUNCTION TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/2013
|
Application #:
|
13607678
|
Filing Dt:
|
09/08/2012
|
Publication #:
|
|
Pub Dt:
|
10/17/2013
| | | | |
Title:
|
METHODOLOGIES FOR AUTOMATIC 3-D DEVICE STRUCTURE SYNTHESIS FROM CIRCUIT LAYOUTS FOR DEVICE SIMULATION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2014
|
Application #:
|
13607680
|
Filing Dt:
|
09/08/2012
|
Publication #:
|
|
Pub Dt:
|
12/27/2012
| | | | |
Title:
|
SEMICONDUCTOR CHIP STACKING FOR REDUNDANCY AND YIELD IMPROVEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/31/2017
|
Application #:
|
13607741
|
Filing Dt:
|
09/09/2012
|
Publication #:
|
|
Pub Dt:
|
12/27/2012
| | | | |
Title:
|
HIGH k GATE STACK ON III-V COMPOUND SEMICONDUCTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2014
|
Application #:
|
13607954
|
Filing Dt:
|
09/10/2012
|
Publication #:
|
|
Pub Dt:
|
03/13/2014
| | | | |
Title:
|
FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2014
|
Application #:
|
13608183
|
Filing Dt:
|
09/10/2012
|
Publication #:
|
|
Pub Dt:
|
03/13/2014
| | | | |
Title:
|
ELECTRONIC ANTI-FUSE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2014
|
Application #:
|
13608211
|
Filing Dt:
|
09/10/2012
|
Publication #:
|
|
Pub Dt:
|
03/13/2014
| | | | |
Title:
|
Semiconductor plural gate lengths
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2014
|
Application #:
|
13608277
|
Filing Dt:
|
09/10/2012
|
Publication #:
|
|
Pub Dt:
|
03/13/2014
| | | | |
Title:
|
HYBRID PHASE-LOCKED LOOP ARCHITECTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2014
|
Application #:
|
13608281
|
Filing Dt:
|
09/10/2012
|
Publication #:
|
|
Pub Dt:
|
12/27/2012
| | | | |
Title:
|
MULTI-MODE MULTIPLEXING USING STAGED COUPLING AND QUASI-PHASE-MATCHING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2013
|
Application #:
|
13608314
|
Filing Dt:
|
09/10/2012
|
Publication #:
|
|
Pub Dt:
|
01/03/2013
| | | | |
Title:
|
SEMICONDUCTOR-ON-INSULATOR SUBSTRATE AND STRUCTURE INCLUDING MULTIPLE ORDER RADIO FREQUENCY HARMONIC SUPRESSING REGION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2013
|
Application #:
|
13609615
|
Filing Dt:
|
09/11/2012
|
Title:
|
FIN BIPOLAR TRANSISTORS HAVING SELF-ALIGNED COLLECTOR AND EMITTER REGIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2013
|
Application #:
|
13609828
|
Filing Dt:
|
09/11/2012
|
Title:
|
METHODS OF FORMING 3-D SEMICONDUCTOR DEVICES WITH A NANOWIRE GATE STRUCTURE WHEREIN THE NANOWIRE GATE STRUCTURE IS FORMED AFTER SOURCE/DRAIN FORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2013
|
Application #:
|
13609941
|
Filing Dt:
|
09/11/2012
|
Title:
|
METHODS OF FORMING 3-D SEMICONDUCTOR DEVICES WITH A NANOWIRE GATE STRUCTURE WHEREIN THE NANOWIRE GATE STRUCTURE IS FORMED PRIOR TO SOURCE/DRAIN FORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2014
|
Application #:
|
13610158
|
Filing Dt:
|
09/11/2012
|
Publication #:
|
|
Pub Dt:
|
03/13/2014
| | | | |
Title:
|
SELF-ALIGNED CARBON NANOSTRUCTURE FIELD EFFECT TRANSISTORS USING SELECTIVE DIELECTRIC DEPOSITION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2014
|
Application #:
|
13610223
|
Filing Dt:
|
09/11/2012
|
Publication #:
|
|
Pub Dt:
|
01/17/2013
| | | | |
Title:
|
GENERATION OF MULTIPLE DIAMETER NANOWIRE FIELD EFFECT TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/2014
|
Application #:
|
13610456
|
Filing Dt:
|
09/11/2012
|
Publication #:
|
|
Pub Dt:
|
04/04/2013
| | | | |
Title:
|
ENHANCEMENT OF CHARGE CARRIER MOBILITY IN TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2014
|
Application #:
|
13610991
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
03/13/2014
| | | | |
Title:
|
SELF-ALIGNED CARBON NANOSTRUCTURE FIELD EFFECT TRANSISTORS USING SELECTIVE DIELECTRIC DEPOSITION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2014
|
Application #:
|
13611008
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
03/13/2014
| | | | |
Title:
|
HYBRID PHASE-LOCKED LOOP ARCHITECTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2014
|
Application #:
|
13611044
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
02/07/2013
| | | | |
Title:
|
REPLACEMENT GATE ETSOI WITH SHARP JUNCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/26/2014
|
Application #:
|
13611081
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
05/02/2013
| | | | |
Title:
|
NANOWIRE EFUSES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2014
|
Application #:
|
13611193
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
01/03/2013
| | | | |
Title:
|
METHODS FOR FORMING ISOLATED FIN STRUCTURES ON BULK SEMICONDUCTOR MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2014
|
Application #:
|
13611257
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
03/06/2014
| | | | |
Title:
|
TECHNIQUES FOR METAL GATE WORKFUNCTION ENGINEERING TO ENABLE MULTIPLE THRESHOLD VOLTAGE FINFET DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/2015
|
Application #:
|
13611335
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
07/11/2013
| | | | |
Title:
|
RECESSED SOURCE AND DRAIN REGIONS FOR FINFETS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2013
|
Application #:
|
13611606
|
Filing Dt:
|
09/12/2012
|
Title:
|
GERMANIUM LATERAL BIPOLAR JUNCTION TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/18/2013
|
Application #:
|
13611636
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
EMBEDDED NANOPARTICLE FILMS AND METHOD FOR THEIR FORMATION IN SELECTIVE AREAS ON A SURFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2014
|
Application #:
|
13611652
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
03/13/2014
| | | | |
Title:
|
METHODS OF FORMING SEMICONDUCTOR DEVICES WITH SELF-ALIGNED CONTACTS AND THE RESULTING DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2014
|
Application #:
|
13611662
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
03/21/2013
| | | | |
Title:
|
CHARGED ENTITIES AS LOCOMOTIVE TO CONTROL MOTION OF POLYMERS THROUGH A NANOCHANNEL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2013
|
Application #:
|
13611701
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
03/14/2013
| | | | |
Title:
|
EMBEDDING A NANOTUBE INSIDE A NANOPORE FOR DNA TRANSLOCATION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2014
|
Application #:
|
13611736
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
09/19/2013
| | | | |
Title:
|
USE OF BAND EDGE GATE METALS AS SOURCE DRAIN CONTACTS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2014
|
Application #:
|
13611776
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
03/07/2013
| | | | |
Title:
|
NAVIGATING ANALYTICAL TOOLS USING LAYOUT SOFTWARE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2016
|
Application #:
|
13611923
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
01/03/2013
| | | | |
Title:
|
FABRICATION OF GRAPHENE NANOELECTRONIC DEVICES ON SOI STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/10/2015
|
Application #:
|
13612157
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
08/22/2013
| | | | |
Title:
|
OPTICAL RECEIVER USING INFINITE IMPULSE RESPONSE DECISION FEEDBACK EQUALIZATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/24/2013
|
Application #:
|
13612396
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
01/03/2013
| | | | |
Title:
|
CORRECTING ERRORS IN LONGITUDINAL POSITION (LPOS) WORDS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2014
|
Application #:
|
13612552
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
01/03/2013
| | | | |
Title:
|
PORE PHASE CHANGE MATERIAL CELL FABRICATED FROM RECESSED PILLAR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2014
|
Application #:
|
13612675
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
03/13/2014
| | | | |
Title:
|
DEFECT FREE STRAINED SILICON ON INSULATOR (SSOI) SUBSTRATES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2014
|
Application #:
|
13612790
|
Filing Dt:
|
09/12/2012
|
Publication #:
|
|
Pub Dt:
|
03/13/2014
| | | | |
Title:
|
PITCH-AWARE MULTI-PATTERNING LITHOGRAPHY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
13613313
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
01/03/2013
| | | | |
Title:
|
MAGNETIC SPIN SHIFT REGISTER MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/2015
|
Application #:
|
13613436
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
03/13/2014
| | | | |
Title:
|
SELF ALIGNED CONTACT WITH IMPROVED ROBUSTNESS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2017
|
Application #:
|
13613508
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
03/13/2014
| | | | |
Title:
|
METHODS OF FORMING DIFFERENT FINFET DEVICES WITH DIFFERENT THRESHOLD VOLTAGES AND INTEGRATED CIRCUIT PRODUCTS CONTAINING SUCH DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/30/2014
|
Application #:
|
13613534
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
FINFET DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/02/2013
|
Application #:
|
13614132
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
01/03/2013
| | | | |
Title:
|
BAND EDGE ENGINEERED VT OFFSET DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/2014
|
Application #:
|
13614456
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
FLUORINE-FREE FUSED RING HETEROAROMATIC PHOTOACID GENERATORS AND RESIST COMPOSITIONS CONTAINING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
07/02/2013
|
Application #:
|
13614476
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
HIGH PERFORMANCE MOSFET
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
13614521
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
01/17/2013
| | | | |
Title:
|
FLUORINE-FREE FUSED RING HETEROAROMATIC PHOTOACID GENERATORS AND RESIST COMPOSITIONS CONTAINING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2015
|
Application #:
|
13614524
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
MICROELECTRONIC STRUCTURE INCLUDING AIR GAP
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2014
|
Application #:
|
13614530
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
A GRAPHENE TRANSISTOR WITH A SELF-ALIGNED GATE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2014
|
Application #:
|
13614531
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
FLUORINE-FREE FUSED RING HETEROAROMATIC PHOTOACID GENERATORS AND RESIST COMPOSITIONS CONTAINING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2013
|
Application #:
|
13614561
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
FLUORINE-FREE FUSED RING HETEROAROMATIC PHOTOACID GENERATORS AND RESIST COMPOSITIONS CONTAINING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/2015
|
Application #:
|
13614563
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
MICROELECTRONIC STRUCTURE INCLUDING AIR GAP
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2014
|
Application #:
|
13614575
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
FLUORINE-FREE FUSED RING HETEROAROMATIC PHOTOACID GENERATORS AND RESIST COMPOSITIONS CONTAINING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2013
|
Application #:
|
13614662
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
07/11/2013
| | | | |
Title:
|
FINFET WITH FULLY SILICIDED GATE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2013
|
Application #:
|
13614885
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
04/25/2013
| | | | |
Title:
|
BULK FIN-FIELD EFFECT TRANSISTORS WITH WELL DEFINED ISOLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/2015
|
Application #:
|
13614925
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
01/03/2013
| | | | |
Title:
|
DYNAMIC RECONFIGURATION-SWITCHING OF WINDINGS IN AN ELECTRIC MOTOR IN AN ELECTRIC VEHICLE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2014
|
Application #:
|
13614953
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
01/03/2013
| | | | |
Title:
|
MULTIJUNCTION PHOTOVOLTAIC CELL FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/24/2013
|
Application #:
|
13615804
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/17/2013
| | | | |
Title:
|
SOLDER BALL CONTACT SUSCEPTIBLE TO LOWER STRESS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2013
|
Application #:
|
13615940
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
FIELD EFFECT TRANSISTOR WITH CHANNEL REGION HAVING PORTIONS WITH DIFFERENT BAND STRUCTURES FOR SUPPRESSED CORNER LEAKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2014
|
Application #:
|
13615960
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
03/20/2014
| | | | |
Title:
|
STRUCTURE AND METHOD OF MAKING AN OFFSET-TRENCH CRACKSTOP THAT FORMS AN AIR GAP ADJACENT TO A PASSIVATED METAL CRACKSTOP
|
|
|
Patent #:
|
|
Issue Dt:
|
01/20/2015
|
Application #:
|
13616337
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
03/20/2014
| | | | |
Title:
|
ELECTRONIC ASSEMBLY WITH DETACHABLE COOLANT MANIFOLD AND COOLANT-COOLED ELECTRONIC MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2014
|
Application #:
|
13616418
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
DOPED GRAPHENE FILMS WITH REDUCED SHEET RESISTANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/2014
|
Application #:
|
13617283
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
02/20/2014
| | | | |
Title:
|
TECHNIQUES FOR GATE WORKFUNCTION ENGINEERING TO REDUCE SHORT CHANNEL EFFECTS IN PLANAR CMOS DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2014
|
Application #:
|
13617426
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
04/18/2013
| | | | |
Title:
|
FINFET PARASITIC CAPACITANCE REDUCTION USING AIR GAP
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2014
|
Application #:
|
13617464
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/17/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2014
|
Application #:
|
13617576
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
STRUCTURE AND METHOD FOR FORMING ISOLATION AND BURIED PLATE FOR TRENCH CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2014
|
Application #:
|
13617623
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/17/2013
| | | | |
Title:
|
FLUORINE-FREE FUSED RING HETEROAROMATIC PHOTOACID GENERATORS AND RESIST COMPOSITIONS CONTAINING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2013
|
Application #:
|
13617634
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/17/2013
| | | | |
Title:
|
PROCESS OF MAKING A LITHOGRAPHIC STRUCTURE USING ANTIREFLECTIVE MATERIALS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/2013
|
Application #:
|
13617709
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
06/27/2013
| | | | |
Title:
|
METHOD FOR FABRICATING FINFET WITH MERGED FINS AND VERTICAL SILICIDE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2014
|
Application #:
|
13617716
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
03/20/2014
| | | | |
Title:
|
INTEGRATED CIRCUITS WITH SRAM CELLS HAVING ADDITIONAL READ STACKS AND METHODS FOR THEIR FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2014
|
Application #:
|
13617743
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
FLUORINE-FREE FUSED RING HETEROAROMATIC PHOTOACID GENERATORS AND RESIST COMPOSITIONS CONTAINING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2013
|
Application #:
|
13617749
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
DESIGN-DEPENDENT INTEGRATED CIRCUIT DISPOSITION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2014
|
Application #:
|
13617781
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
FLUORINE-FREE FUSED RING HETEROAROMATIC PHOTOACID GENERATORS AND RESIST COMPOSITIONS CONTAINING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2014
|
Application #:
|
13617819
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
FLUORINE-FREE FUSED RING HETEROAROMATIC PHOTOACID GENERATORS AND RESIST COMPOSITIONS CONTAINING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/2014
|
Application #:
|
13617847
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
FLUORINE-FREE FUSED RING HETEROAROMATIC PHOTOACID GENERATORS AND RESIST COMPOSITIONS CONTAINING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2014
|
Application #:
|
13617853
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
03/20/2014
| | | | |
Title:
|
BIT CELL WITH DOUBLE PATTERNED METAL LAYER STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2014
|
Application #:
|
13617875
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/17/2013
| | | | |
Title:
|
FLUORINE-FREE FUSED RING HETEROAROMATIC PHOTOACID GENERATORS AND RESIST COMPOSITIONS CONTAINING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2014
|
Application #:
|
13617919
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
FLUORINE-FREE FUSED RING HETEROAROMATIC PHOTOACID GENERATORS AND RESIST COMPOSITIONS CONTAINING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
07/29/2014
|
Application #:
|
13617952
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
03/20/2014
| | | | |
Title:
|
BIT CELL WITH TRIPLE PATTERNED METAL LAYER STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2013
|
Application #:
|
13617996
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR ANALYZING MONITOR DATA INFORMATION FROM A PLURALITY OF MEMORY DEVICES HAVING FINITE ENDURANCE AND/OR RETENTION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2014
|
Application #:
|
13618035
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
03/20/2014
| | | | |
Title:
|
INTEGRATED CIRCUITS WITH IMPROVED GATE UNIFORMITY AND METHODS FOR FABRICATING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2014
|
Application #:
|
13618240
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/30/2014
| | | | |
Title:
|
BODY CONTACTS FOR FET IN SOI SRAM ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2016
|
Application #:
|
13618600
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
UNIVERSAL INTER-LAYER INTERCONNECT FOR MULTI-LAYER SEMICONDUCTOR STACKS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2014
|
Application #:
|
13619473
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/17/2013
| | | | |
Title:
|
PLANAR PHASE- CHANGE MEMORY CELL WITH PARALLEL ELECTRICAL PATHS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2014
|
Application #:
|
13619493
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
PLANAR PHASE- CHANGE MEMORY CELL WITH PARALLEL ELECTRICAL PATHS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2014
|
Application #:
|
13619588
|
Filing Dt:
|
09/14/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
SPIN-CURRENT SWITCHABLE MAGNETIC MEMORY ELEMENT AND METHOD OF FABRICATING THE MEMORY ELEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/26/2014
|
Application #:
|
13622614
|
Filing Dt:
|
09/19/2012
|
Publication #:
|
|
Pub Dt:
|
03/20/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD WITH GREATER EPITAXIAL GROWTH ON 110 CRYSTAL PLANE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2013
|
Application #:
|
13622712
|
Filing Dt:
|
09/19/2012
|
Publication #:
|
|
Pub Dt:
|
07/11/2013
| | | | |
Title:
|
LOW SERIES RESISTANCE TRANSISTOR STRUCTURE ON SILICON ON INSULATOR LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2015
|
Application #:
|
13623129
|
Filing Dt:
|
09/20/2012
|
Publication #:
|
|
Pub Dt:
|
03/20/2014
| | | | |
Title:
|
MULTIGATE FINFETS WITH EPITAXIALLY-GROWN MERGED SOURCE/DRAINS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2013
|
Application #:
|
13623292
|
Filing Dt:
|
09/20/2012
|
Title:
|
RAISED TRENCH METAL SEMICONDUCTOR ALLOY FORMATION
|
|