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Reel/Frame:	054633/0001			Pages:	1245
		Recorded:	11/02/2020
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 8468
Page 46 of 85
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Patent #:	8609510	Issue Dt:	12/17/2013	Application #:	13623893	Filing Dt:	09/21/2012
Title:	REPLACEMENT METAL GATE DIFFUSION BREAK FORMATION

Patent #:	8440559	Issue Dt:	05/14/2013	Application #:	13624235	Filing Dt:	09/21/2012
Publication #:	US20130017679	Pub Dt:	01/17/2013
Title:	WORK FUNCTION ADJUSTMENT IN HIGH-K METAL GATE ELECTRODE STRUCTURES BY SELECTIVELY REMOVING A BARRIER LAYER

Patent #:	8610181	Issue Dt:	12/17/2013	Application #:	13624251	Filing Dt:	09/21/2012
Publication #:	US20130153972	Pub Dt:	06/20/2013
Title:	V-GROOVE SOURCE/DRAIN MOSFET AND PROCESS FOR FABRICATING SAME

Patent #:	8993907	Issue Dt:	03/31/2015	Application #:	13625294	Filing Dt:	09/24/2012
Publication #:	US20130020183	Pub Dt:	01/24/2013
Title:	SILICIDE MICROMECHANICAL DEVICE AND METHODS TO FABRICATE SAME

Patent #:	8895995	Issue Dt:	11/25/2014	Application #:	13625440	Filing Dt:	09/24/2012
Publication #:	US20140084301	Pub Dt:	03/27/2014
Title:	LATERAL SILICON-ON-INSULATOR BIPOLAR JUNCTION TRANSISTOR RADIATION DOSIMETER

Patent #:	8791016	Issue Dt:	07/29/2014	Application #:	13626025	Filing Dt:	09/25/2012
Publication #:	US20140087557	Pub Dt:	03/27/2014
Title:	THROUGH SILICON VIA WAFER, CONTACTS AND DESIGN STRUCTURES

Patent #:	8927334	Issue Dt:	01/06/2015	Application #:	13626032	Filing Dt:	08/13/2008
Publication #:	US20140084453	Pub Dt:	03/27/2014
Title:	OVERCOMING CHIP WARPING TO ENHANCE WETTING OF SOLDER BUMPS AND FLIP CHIP ATTACHES IN A FLIP CHIP PACKAGE

Patent #:	8492854	Issue Dt:	07/23/2013	Application #:	13626242	Filing Dt:	09/25/2012
Publication #:	US20130175626	Pub Dt:	07/11/2013
Title:	INTEGRATED CIRCUIT HAVING RAISED SOURCE DRAINS DEVICES WITH REDUCED SILICIDE CONTACT RESISTANCE AND METHODS TO FABRICATE SAME

Patent #:	8742513	Issue Dt:	06/03/2014	Application #:	13628468	Filing Dt:	09/27/2012
Publication #:	US20130026581	Pub Dt:	01/31/2013
Title:	SEMICONDUCTOR DEVICE COMPRISING METAL GATES AND A SILICON CONTAINING RESISTOR FORMED ON AN ISOLATION STRUCTURE

Patent #:	8679902	Issue Dt:	03/25/2014	Application #:	13628726	Filing Dt:	09/27/2012
Publication #:	US20140087523	Pub Dt:	03/27/2014
Title:	STACKED NANOWIRE FIELD EFFECT TRANSISTOR

Patent #:	8846477	Issue Dt:	09/30/2014	Application #:	13628914	Filing Dt:	09/27/2012
Publication #:	US20140084383	Pub Dt:	03/27/2014
Title:	METHODS OF FORMING 3-D SEMICONDUCTOR DEVICES USING A REPLACEMENT GATE TECHNIQUE AND A NOVEL 3-D DEVICE

Patent #:	8765536	Issue Dt:	07/01/2014	Application #:	13629910	Filing Dt:	09/28/2012
Publication #:	US20140091374	Pub Dt:	04/03/2014
Title:	STRESS ENGINEERED MULTI-LAYERS FOR INTEGRATION OF CMOS AND SI NANOPHOTONICS

Patent #:	8610281	Issue Dt:	12/17/2013	Application #:	13633234	Filing Dt:	10/02/2012
Title:	DOUBLE-SIDED SEMICONDUCTOR STRUCTURE USING THROUGH-SILICON VIAS

Patent #:	8731883	Issue Dt:	05/20/2014	Application #:	13644234	Filing Dt:	10/03/2012
Publication #:	US20130166258	Pub Dt:	06/27/2013
Title:	Techniques for Thermal Modeling of Data Centers to Improve Energy Efficiency

Patent #:	8715917	Issue Dt:	05/06/2014	Application #:	13644683	Filing Dt:	10/04/2012
Publication #:	US20140099583	Pub Dt:	04/10/2014
Title:	SIMULTANEOUS PHOTORESIST DEVELOPMENT AND NEUTRAL POLYMER LAYER FORMATION

Patent #:	8889495	Issue Dt:	11/18/2014	Application #:	13644742	Filing Dt:	10/04/2012
Publication #:	US20140097518	Pub Dt:	04/10/2014
Title:	SEMICONDUCTOR ALLOY FIN FIELD EFFECT TRANSISTOR

Patent #:	NONE	Issue Dt:		Application #:	13644788	Filing Dt:	10/04/2012
Publication #:	US20140100806	Pub Dt:	04/10/2014
Title:	METHOD AND APPARATUS FOR MATCHING TOOLS BASED ON TIME TRACE DATA

Patent #:	8809155	Issue Dt:	08/19/2014	Application #:	13644918	Filing Dt:	10/04/2012
Publication #:	US20140097434	Pub Dt:	04/10/2014
Title:	BACK-END-OF-LINE METAL-OXIDE-SEMICONDUCTOR VARACTORS

Patent #:	8677291	Issue Dt:	03/18/2014	Application #:	13646760	Filing Dt:	10/08/2012
Publication #:	US20140097892	Pub Dt:	04/10/2014
Title:	DOUBLE PATTERNING COMPATIBLE COLORLESS M1 ROUTE

Patent #:	9082875	Issue Dt:	07/14/2015	Application #:	13647538	Filing Dt:	10/09/2012
Publication #:	US20130032894	Pub Dt:	02/07/2013
Title:	METHODS FOR NORMALIZING STRAIN IN SEMICONDCUTOR DEVICES AND STRAIN NORMALIZED SEMICONDUCTOR DEVICES

Patent #:	8912030	Issue Dt:	12/16/2014	Application #:	13647547	Filing Dt:	10/09/2012
Publication #:	US20140088401	Pub Dt:	03/27/2014
Title:	METHOD FOR RADIATION MONITORING

Patent #:	8906807	Issue Dt:	12/09/2014	Application #:	13648321	Filing Dt:	10/10/2012
Publication #:	US20140099792	Pub Dt:	04/10/2014
Title:	SINGLE FIN CUT EMPLOYING ANGLED PROCESSING METHODS

Patent #:	8907483	Issue Dt:	12/09/2014	Application #:	13648433	Filing Dt:	10/10/2012
Publication #:	US20140097538	Pub Dt:	04/10/2014
Title:	SEMICONDUCTOR DEVICE HAVING A SELF-FORMING BARRIER LAYER AT VIA BOTTOM

Patent #:	8423875	Issue Dt:	04/16/2013	Application #:	13648555	Filing Dt:	10/10/2012
Publication #:	US20130036341	Pub Dt:	02/07/2013
Title:	COLLECTING FAILURE INFORMATION ON ERROR CORRECTION CODE (ECC) PROTECTED DATA

Patent #:	8871626	Issue Dt:	10/28/2014	Application #:	13649284	Filing Dt:	10/11/2012
Publication #:	US20130154006	Pub Dt:	06/20/2013
Title:	FINFET WITH VERTICAL SILICIDE STRUCTURE

Patent #:	9575115	Issue Dt:	02/21/2017	Application #:	13649699	Filing Dt:	10/11/2012
Publication #:	US20140107822	Pub Dt:	04/17/2014
Title:	METHODOLOGY OF GRADING RELIABILITY AND PERFORMANCE OF CHIPS ACROSS WAFER

Patent #:	8846191	Issue Dt:	09/30/2014	Application #:	13649760	Filing Dt:	10/11/2012
Publication #:	US20130035411	Pub Dt:	02/07/2013
Title:	THERMAL EXPANSION CONTROL EMPLOYING PLATELET FILLERS

Patent #:	8869085	Issue Dt:	10/21/2014	Application #:	13649769	Filing Dt:	10/11/2012
Publication #:	US20140103434	Pub Dt:	04/17/2014
Title:	MULTI-FINGER TRANSISTOR LAYOUT FOR REDUCING CROSS-FINGER ELECTRIC VARIATIONS AND FOR FULLY UTILIZING AVAILABLE BREAKDOWN VOLTAGES

Patent #:	9064868	Issue Dt:	06/23/2015	Application #:	13650233	Filing Dt:	10/12/2012
Publication #:	US20140103420	Pub Dt:	04/17/2014
Title:	ADVANCED FARADAY SHIELD FOR A SEMICONDUCTOR DEVICE

Patent #:	8890247	Issue Dt:	11/18/2014	Application #:	13651874	Filing Dt:	10/15/2012
Publication #:	US20140103436	Pub Dt:	04/17/2014
Title:	EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR WITH BACK GATE CONTACT

Patent #:	8546920	Issue Dt:	10/01/2013	Application #:	13651918	Filing Dt:	10/15/2012
Publication #:	US20130037885	Pub Dt:	02/14/2013
Title:	SEMICONDUCTOR-ON-INSULATOR (SOI) STRUCTURES INCLUDING GRADIENT NITRIDED BURIED OXIDE (BOX)

Patent #:	8441039	Issue Dt:	05/14/2013	Application #:	13652804	Filing Dt:	10/16/2012
Publication #:	US20130048988	Pub Dt:	02/28/2013
Title:	NANOPILLAR E-FUSE STRUCTURE AND PROCESS

Patent #:	8910012	Issue Dt:	12/09/2014	Application #:	13653291	Filing Dt:	10/16/2012
Publication #:	US20140108881	Pub Dt:	04/17/2014
Title:	BLOCK-INTERLEAVED AND ERROR CORRECTION CODE (ECC)-ENCODED SUB DATA SET (SDS) FORMAT

Patent #:	8877658	Issue Dt:	11/04/2014	Application #:	13653606	Filing Dt:	10/17/2012
Publication #:	US20140106575	Pub Dt:	04/17/2014
Title:	DIRECTED SELF-ASSEMBLY OF BLOCK COPOLYMERS USING LASER ANNEALING

Patent #:	8492274	Issue Dt:	07/23/2013	Application #:	13653665	Filing Dt:	10/17/2012
Publication #:	US20130115767	Pub Dt:	05/09/2013
Title:	METAL ALLOY CAP INTEGRATION

Patent #:	8816717	Issue Dt:	08/26/2014	Application #:	13653996	Filing Dt:	10/17/2012
Publication #:	US20140103957	Pub Dt:	04/17/2014
Title:	REACTIVE MATERIAL FOR INTEGRATED CIRCUIT TAMPER DETECTION AND RESPONSE

Patent #:	8772100	Issue Dt:	07/08/2014	Application #:	13654987	Filing Dt:	10/18/2012
Publication #:	US20140110790	Pub Dt:	04/24/2014
Title:	STRUCTURE AND METHOD FOR FORMING A LOW GATE RESISTANCE HIGH-K METAL GATE TRANSISTOR DEVICE

Patent #:	8523046	Issue Dt:	09/03/2013	Application #:	13655426	Filing Dt:	10/18/2012
Title:	FORMING AN ARRAY OF METAL BALLS OR SHAPES ON A SUBSTRATE

Patent #:	9043652	Issue Dt:	05/26/2015	Application #:	13655520	Filing Dt:	10/19/2012
Publication #:	US20130091385	Pub Dt:	04/11/2013
Title:	USER-COORDINATED RESOURCE RECOVERY

Patent #:	8716136	Issue Dt:	05/06/2014	Application #:	13655844	Filing Dt:	10/19/2012
Publication #:	US20140113455	Pub Dt:	04/24/2014
Title:	METHOD OF FORMING A SEMICONDUCTOR STRUCTURE INCLUDING A WET ETCH PROCESS FOR REMOVING SILICON NITRIDE

Patent #:	8826210	Issue Dt:	09/02/2014	Application #:	13655980	Filing Dt:	10/19/2012
Publication #:	US20130046538	Pub Dt:	02/21/2013
Title:	VISUALIZATION INTERFACE OF CONTINUOUS WAVEFORM MULTI-SPEAKER IDENTIFICATION

Patent #:	9064948	Issue Dt:	06/23/2015	Application #:	13656794	Filing Dt:	10/22/2012
Publication #:	US20140110798	Pub Dt:	04/24/2014
Title:	METHODS OF FORMING A SEMICONDUCTOR DEVICE WITH LOW-K SPACERS AND THE RESULTING DEVICE

Patent #:	8896035	Issue Dt:	11/25/2014	Application #:	13656819	Filing Dt:	10/22/2012
Publication #:	US20140110765	Pub Dt:	04/24/2014
Title:	FIELD EFFECT TRANSISTOR HAVING PHASE TRANSITION MATERIAL INCORPORATED INTO ONE OR MORE COMPONENTS FOR REDUCED LEAKAGE CURRENT

Patent #:	8848414	Issue Dt:	09/30/2014	Application #:	13656829	Filing Dt:	10/22/2012
Publication #:	US20140112045	Pub Dt:	04/24/2014
Title:	MEMORY SYSTEM INCORPORATING A CIRCUIT TO GENERATE A DELAY SIGNAL AND AN ASSOCIATED METHOD OF OPERATING A MEMORY SYSTEM

Patent #:	8623758	Issue Dt:	01/07/2014	Application #:	13657182	Filing Dt:	10/22/2012
Title:	SUBTRACTIVE METAL MULTI-LAYER BARRIER LAYER FOR INTERCONNECT STRUCTURE

Patent #:	NONE	Issue Dt:		Application #:	13658928	Filing Dt:	10/24/2012
Publication #:	US20140113420	Pub Dt:	04/24/2014
Title:	METHODS OF AVOIDING SHADOWING WHEN FORMING SOURCE/DRAIN IMPLANT REGIONS ON 3D SEMICONDUCTOR DEVICES

Patent #:	9177820	Issue Dt:	11/03/2015	Application #:	13659318	Filing Dt:	10/24/2012
Publication #:	US20140110817	Pub Dt:	04/24/2014
Title:	SUB-LITHOGRAPHIC SEMICONDUCTOR STRUCTURES WITH NON-CONSTANT PITCH

Patent #:	8667428	Issue Dt:	03/04/2014	Application #:	13659453	Filing Dt:	10/24/2012
Title:	METHODS FOR DIRECTED SELF-ASSEMBLY PROCESS/PROXIMITY CORRECTION

Patent #:	8741678	Issue Dt:	06/03/2014	Application #:	13660604	Filing Dt:	10/25/2012
Publication #:	US20140087500	Pub Dt:	03/27/2014
Title:	TRANSPARENT CONDUCTIVE ELECTRODE STACK CONTAINING CARBON-CONTAINING MATERIAL

Patent #:	8853752	Issue Dt:	10/07/2014	Application #:	13661188	Filing Dt:	10/26/2012
Publication #:	US20140117417	Pub Dt:	05/01/2014
Title:	PERFORMANCE ENHANCEMENT IN TRANSISTORS BY PROVIDING A GRADED EMBEDDED STRAIN-INDUCING SEMICONDUCTOR REGION WITH ADAPTED ANGLES WITH RESPECT TO THE SUBSTRATE SURFACE

Patent #:	8921195	Issue Dt:	12/30/2014	Application #:	13661359	Filing Dt:	10/26/2012
Publication #:	US20140117493	Pub Dt:	05/01/2014
Title:	ISOLATION SCHEME FOR BIPOLAR TRANSISTORS IN BICMOS TECHNOLOGY

Patent #:	8674416	Issue Dt:	03/18/2014	Application #:	13663589	Filing Dt:	10/30/2012
Publication #:	US20130113019	Pub Dt:	05/09/2013
Title:	SEMICONDUCTOR DEVICE WITH REDUCED THRESHOLD VARIABILITY HAVING A THRESHOLD ADJUSTING SEMICONDUCTOR ALLOY IN THE DEVICE ACTIVE REGION

Patent #:	8751980	Issue Dt:	06/10/2014	Application #:	13663816	Filing Dt:	10/30/2012
Publication #:	US20140123083	Pub Dt:	05/01/2014
Title:	AUTOMATIC WAFER DATA SAMPLE PLANNING AND REVIEW

Patent #:	9263585	Issue Dt:	02/16/2016	Application #:	13663854	Filing Dt:	10/30/2012
Publication #:	US20140120677	Pub Dt:	05/01/2014
Title:	METHODS OF FORMING ENHANCED MOBILITY CHANNEL REGIONS ON 3D SEMICONDUCTOR DEVICES, AND DEVICES COMPRISING SAME

Patent #:	9054212	Issue Dt:	06/09/2015	Application #:	13664062	Filing Dt:	10/30/2012
Publication #:	US20140117419	Pub Dt:	05/01/2014
Title:	FIN ETCH AND FIN REPLACEMENT FOR FINFET INTEGRATION

Patent #:	8835292	Issue Dt:	09/16/2014	Application #:	13664744	Filing Dt:	10/31/2012
Publication #:	US20140120708	Pub Dt:	05/01/2014
Title:	METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES INCLUDING REPLACEMENT METAL GATE PROCESS INCORPORATING A CONDUCTIVE DUMMY GATE LAYER

Patent #:	8928090	Issue Dt:	01/06/2015	Application #:	13664869	Filing Dt:	10/31/2012
Publication #:	US20140117421	Pub Dt:	05/01/2014
Title:	SELF-ALIGNED CONTACT STRUCTURE FOR REPLACEMENT METAL GATE

Patent #:	9082853	Issue Dt:	07/14/2015	Application #:	13664873	Filing Dt:	10/31/2012
Publication #:	US20140117462	Pub Dt:	05/01/2014
Title:	BULK FINFET WITH PUNCHTHROUGH STOPPER REGION AND METHOD OF FABRICATION

Patent #:	8850378	Issue Dt:	09/30/2014	Application #:	13665276	Filing Dt:	10/31/2012
Publication #:	US20140123091	Pub Dt:	05/01/2014
Title:	HIERARCHICAL DESIGN OF INTEGRATED CIRCUITS WITH MULTI-PATTERNING REQUIREMENTS

Patent #:	8769452	Issue Dt:	07/01/2014	Application #:	13665315	Filing Dt:	10/31/2012
Publication #:	US20140123086	Pub Dt:	05/01/2014
Title:	PARASITIC EXTRACTION IN AN INTEGRATED CIRCUIT WITH MULTI-PATTERNING REQUIREMENTS

Patent #:	8614136	Issue Dt:	12/24/2013	Application #:	13665334	Filing Dt:	10/31/2012
Title:	Techniques for Fabricating Janus MEMS Transistors

Patent #:	8722494	Issue Dt:	05/13/2014	Application #:	13666031	Filing Dt:	11/01/2012
Publication #:	US20140120701	Pub Dt:	05/01/2014
Title:	DUAL GATE FINFET DEVICES

Patent #:	8987789	Issue Dt:	03/24/2015	Application #:	13666214	Filing Dt:	11/01/2012
Publication #:	US20130056805	Pub Dt:	03/07/2013
Title:	TRANSISTORS HAVING STRESSED CHANNEL REGIONS AND METHODS OF FORMING TRANSISTORS HAVING STRESSED CHANNEL REGIONS

Patent #:	9105686	Issue Dt:	08/11/2015	Application #:	13667384	Filing Dt:	11/02/2012
Publication #:	US20140127878	Pub Dt:	05/08/2014
Title:	FABRICATION OF LOCALIZED SOI ON LOCALIZED THICK BOX USING SELECTIVE EPITAXY ON BULK SEMICONDUCTOR SUBSTRATES FOR PHOTONICS DEVICE INTEGRATION

Patent #:	8673728	Issue Dt:	03/18/2014	Application #:	13667657	Filing Dt:	11/02/2012
Publication #:	US20130056854	Pub Dt:	03/07/2013
Title:	COMPLEMENTARY STRESS LINER TO IMPROVE DGO/AVT DEVICES AND POLY AND DIFFUSION RESISTORS

Patent #:	8624223	Issue Dt:	01/07/2014	Application #:	13668401	Filing Dt:	11/05/2012
Publication #:	US20130328017	Pub Dt:	12/12/2013
Title:	SIDE-GATE DEFINED TUNABLE NANOCONSTRICTION IN DOUBLE-GATED GRAPHENE MULTILAYERS

Patent #:	8767448	Issue Dt:	07/01/2014	Application #:	13668869	Filing Dt:	11/05/2012
Publication #:	US20140126279	Pub Dt:	05/08/2014
Title:	MAGNETORESISTIVE RANDOM ACCESS MEMORY

Patent #:	8647445	Issue Dt:	02/11/2014	Application #:	13669651	Filing Dt:	11/06/2012
Title:	PROCESS FOR CLEANING SEMICONDUCTOR DEVICES AND/OR TOOLING DURING MANUFACTURING THEREOF

Patent #:	8815699	Issue Dt:	08/26/2014	Application #:	13670566	Filing Dt:	11/07/2012
Publication #:	US20140124794	Pub Dt:	05/08/2014
Title:	FABRICATION OF REVERSE SHALLOW TRENCH ISOLATION STRUCTURES WITH SUPER-STEEP RETROGRADE WELLS

Patent #:	8674413	Issue Dt:	03/18/2014	Application #:	13670605	Filing Dt:	11/07/2012
Title:	METHODS OF FORMING FINS AND ISOLATION REGIONS ON A FINFET SEMICONDUCTOR DEVICE

Patent #:	8809920	Issue Dt:	08/19/2014	Application #:	13670674	Filing Dt:	11/07/2012
Publication #:	US20140124840	Pub Dt:	05/08/2014
Title:	PREVENTION OF FIN EROSION FOR SEMICONDUCTOR DEVICES

Patent #:	8772949	Issue Dt:	07/08/2014	Application #:	13670694	Filing Dt:	11/07/2012
Publication #:	US20140124946	Pub Dt:	05/08/2014
Title:	ENHANCED CAPTURE PADS FOR THROUGH SEMICONDUCTOR VIAS

Patent #:	8802558	Issue Dt:	08/12/2014	Application #:	13670711	Filing Dt:	11/07/2012
Publication #:	US20140124933	Pub Dt:	05/08/2014
Title:	COPPER INTERCONNECT STRUCTURES AND METHODS OF MAKING SAME

Patent #:	8835237	Issue Dt:	09/16/2014	Application #:	13670748	Filing Dt:	11/07/2012
Publication #:	US20140124873	Pub Dt:	05/08/2014
Title:	ROBUST REPLACEMENT GATE INTEGRATION

Patent #:	8766363	Issue Dt:	07/01/2014	Application #:	13670768	Filing Dt:	11/07/2012
Publication #:	US20140124860	Pub Dt:	05/08/2014
Title:	METHOD AND STRUCTURE FOR FORMING A LOCALIZED SOI FINFET

Patent #:	8501607	Issue Dt:	08/06/2013	Application #:	13670880	Filing Dt:	11/07/2012
Title:	FINFET ALIGNMENT STRUCTURES USING A DOUBLE TRENCH FLOW

Patent #:	8679947	Issue Dt:	03/25/2014	Application #:	13670921	Filing Dt:	11/07/2012
Title:	SELF-FORMATION OF HIGH-DENSITY DEFECT-FREE AND ALIGNED NANOSTRUCTURES

Patent #:	8518741	Issue Dt:	08/27/2013	Application #:	13671098	Filing Dt:	11/07/2012
Title:	WAFER-TO-WAFER PROCESS FOR MANUFACTURING A STACKED STRUCTURE

Patent #:	8772101	Issue Dt:	07/08/2014	Application #:	13671940	Filing Dt:	11/08/2012
Publication #:	US20140124841	Pub Dt:	05/08/2014
Title:	METHODS OF FORMING REPLACEMENT GATE STRUCTURES ON SEMICONDUCTOR DEVICES AND THE RESULTING DEVICE

Patent #:	8513706	Issue Dt:	08/20/2013	Application #:	13672040	Filing Dt:	11/08/2012
Publication #:	US20130062668	Pub Dt:	03/14/2013
Title:	HETEROJUNCTION BIPOLAR TRANSISTORS WITH REDUCED BASE RESISTANCE

Patent #:	9496006	Issue Dt:	11/15/2016	Application #:	13672751	Filing Dt:	11/09/2012
Publication #:	US20130124786	Pub Dt:	05/16/2013
Title:	MEMORY MODULE AND MEMORY CONTROLLER FOR CONTROLLING A MEMORY MODULE

Patent #:	9123783	Issue Dt:	09/01/2015	Application #:	13673549	Filing Dt:	11/09/2012
Publication #:	US20140131881	Pub Dt:	05/15/2014
Title:	INTEGRATED CIRCUITS AND METHODS OF FORMING INTEGRATED CIRCUITS WITH INTERLAYER DIELECTRIC PROTECTION

Patent #:	8946029	Issue Dt:	02/03/2015	Application #:	13674142	Filing Dt:	11/12/2012
Publication #:	US20140134814	Pub Dt:	05/15/2014
Title:	METHODS OF MANUFACTURING INTEGRATED CIRCUITS HAVING FINFET STRUCTURES WITH EPITAXIALLY FORMED SOURCE/DRAIN REGIONS

Patent #:	9040404	Issue Dt:	05/26/2015	Application #:	13676483	Filing Dt:	11/14/2012
Publication #:	US20140131808	Pub Dt:	05/15/2014
Title:	REPLACEMENT METAL GATE STRUCTURE FOR CMOS DEVICE

Patent #:	8828746	Issue Dt:	09/09/2014	Application #:	13676817	Filing Dt:	11/14/2012
Publication #:	US20140131800	Pub Dt:	05/15/2014
Title:	COMPENSATION FOR A CHARGE IN A SILICON SUBSTRATE

Patent #:	8650512	Issue Dt:	02/11/2014	Application #:	13677373	Filing Dt:	11/15/2012
Title:	ELASTIC MODULUS MAPPING OF AN INTEGRATED CIRCUIT CHIP IN A CHIP/DEVICE PACKAGE

Patent #:	8841177	Issue Dt:	09/23/2014	Application #:	13677647	Filing Dt:	11/15/2012
Publication #:	US20140134811	Pub Dt:	05/15/2014
Title:	CO-INTEGRATION OF ELEMENTAL SEMICONDUCTOR DEVICES AND COMPOUND SEMICONDUCTOR DEVICES

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Title:	SEMICONDUCTOR STRUCTURE INCLUDING A SEMICONDUCTOR-ON-INSULATOR REGION AND A BULK REGION, AND METHOD FOR THE FORMATION THEREOF

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Patent #:	8653599	Issue Dt:	02/18/2014	Application #:	13679222	Filing Dt:	11/16/2012
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Title:	POLYGON RECOVERY FOR VLSI MASK CORRECTION

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100

Patent #:	9059242	Issue Dt:	06/16/2015	Application #:	13685733	Filing Dt:	11/27/2012
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Title:	Finfet Semiconductor Device Having Increased Gate Height Control

Assignor

GLOBALFOUNDRIES INC.

Exec Dt:

10/22/2020

Assignee

GLOBALFOUNDRIES U.S. INC.

2600 GREAT AMERICA WAY

SANTA CLARA, CALIFORNIA 95054

Correspondence name and address
	GLOBALFOUNDRIES SINGAPORE PTE. LTD.
	60 WOODLANDS INDUSTRIAL PARK D STREET 2,
	SINGAPORE, 738406 SINGAPORE

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