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Reel/Frame:050937/0001   Pages: 964
Recorded: 10/09/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 18018
Page 49 of 181
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1
Patent #:
7088710
Issue Dt:
08/08/2006
Application #:
09869091
Filing Dt:
10/23/2001
Title:
METHOD OF TRANSMITTING INFORMATION THROUGH DATA SWITCHING APPARATUS AND APPARATUS THEREFOR
2
Patent #:
6462989
Issue Dt:
10/08/2002
Application #:
09870088
Filing Dt:
05/30/2001
Title:
TECHNIQUE FOR LOCALLY REDUCING EFFECTS ON AN ANALOG SIGNAL DUE TO CHANGES ON A REFERENCE BUS IN AN INTEGRATED CIRCUIT
3
Patent #:
6461950
Issue Dt:
10/08/2002
Application #:
09870850
Filing Dt:
05/30/2001
Publication #:
US20010028095
Pub Dt:
10/11/2001
Title:
SEMICONDUCTOR PROCESSING METHODS, SEMICONDUCTOR CIRCUITRY, AND GATE STACKS
4
Patent #:
6452868
Issue Dt:
09/17/2002
Application #:
09870982
Filing Dt:
05/30/2001
Title:
METHOD FOR GENERATING MEMORY ADDRESSES FOR ACCESSING MEMORY-CELL ARRAYS IN MEMORY DEVICES
5
Patent #:
6446327
Issue Dt:
09/10/2002
Application #:
09871062
Filing Dt:
05/31/2001
Publication #:
US20010022019
Pub Dt:
09/20/2001
Title:
INTEGRATED CIRCUIT INDUCTORS
6
Patent #:
6549473
Issue Dt:
04/15/2003
Application #:
09871234
Filing Dt:
05/30/2001
Publication #:
US20020015332
Pub Dt:
02/07/2002
Title:
CIRCUITAL STRUCTURE FOR READING DATA IN A NON-VOLATILE MEMORY DEVICE
7
Patent #:
6507517
Issue Dt:
01/14/2003
Application #:
09871235
Filing Dt:
05/30/2001
Publication #:
US20020015326
Pub Dt:
02/07/2002
Title:
CIRCUITAL STRUCTURE FOR PROGRAMMING DATA IN A NON-VOLATILE MEMORY DEVICE
8
Patent #:
6612019
Issue Dt:
09/02/2003
Application #:
09871454
Filing Dt:
05/31/2001
Publication #:
US20010023530
Pub Dt:
09/27/2001
Title:
INTEGRATED CIRCUIT INDUCTORS
9
Patent #:
6447962
Issue Dt:
09/10/2002
Application #:
09871684
Filing Dt:
06/04/2001
Publication #:
US20010028045
Pub Dt:
10/11/2001
Title:
METHOD FOR REPAIRING MOSI ATTENUATED PHASE SHIFT MASKS
10
Patent #:
6380631
Issue Dt:
04/30/2002
Application #:
09872221
Filing Dt:
05/31/2001
Publication #:
US20010026013
Pub Dt:
10/04/2001
Title:
APPARATUS AND METHODS OF PACKAGING AND TESTING DIE
11
Patent #:
6449207
Issue Dt:
09/10/2002
Application #:
09872804
Filing Dt:
06/01/2001
Publication #:
US20010046170
Pub Dt:
11/29/2001
Title:
VOLTAGE INDEPENDENT FUSE CIRCUIT AND METHOD
12
Patent #:
6385709
Issue Dt:
05/07/2002
Application #:
09873463
Filing Dt:
06/04/2001
Publication #:
US20010027507
Pub Dt:
10/04/2001
Title:
MULTIPLEXED DATA TRANSFER ARRANGEMENT INCLUDING A MULTI-PHASE SIGNAL GENERATOR FOR LATENCY CONTROL
13
Patent #:
6476441
Issue Dt:
11/05/2002
Application #:
09873701
Filing Dt:
06/04/2001
Publication #:
US20010045596
Pub Dt:
11/29/2001
Title:
METHOD AND STRUCTURE FOR TEXTURED SURFACES IN FLOATING GATE TUNNELING OXIDE DEVICES
14
Patent #:
6452842
Issue Dt:
09/17/2002
Application #:
09873823
Filing Dt:
06/04/2001
Publication #:
US20010028580
Pub Dt:
10/11/2001
Title:
DEVICE AND METHOD FOR SUPPLYING CURRENT TO A SEMICONDUCTOR MEMORY TO SUPPORT A BOOSTED VOLTAGE WITHIN THE MEMORY DURING TESTING
15
Patent #:
6541856
Issue Dt:
04/01/2003
Application #:
09874011
Filing Dt:
06/06/2001
Publication #:
US20020185729
Pub Dt:
12/12/2002
Title:
THERMALLY ENHANCED HIGH DENSITY SEMICONDUCTOR PACKAGE
16
Patent #:
6981012
Issue Dt:
12/27/2005
Application #:
09874044
Filing Dt:
06/06/2001
Publication #:
US20020198916
Pub Dt:
12/26/2002
Title:
METHOD AND CIRCUIT FOR NORMALIZATION OF FLOATING POINT SIGNIFICANTS IN A SIMD ARRAY MPP
17
Patent #:
6895424
Issue Dt:
05/17/2005
Application #:
09874307
Filing Dt:
06/06/2001
Publication #:
US20020194238
Pub Dt:
12/19/2002
Title:
METHOD AND CIRCUIT FOR ALIGNMENT OF FLOATING POINT SIGNIFICANTS IN A SIMD ARRAY MPP
18
Patent #:
6876663
Issue Dt:
04/05/2005
Application #:
09874500
Filing Dt:
06/05/2001
Publication #:
US20020012344
Pub Dt:
01/31/2002
Title:
SWITCHING SYSTEM
19
Patent #:
7141448
Issue Dt:
11/28/2006
Application #:
09874666
Filing Dt:
06/05/2001
Publication #:
US20020017728
Pub Dt:
02/14/2002
Title:
CONTROLLED COLLAPSE CHIP CONNECTION (C4) INTEGRATED CIRCUIT PACKAGE WHICH HAS TWO DISSIMILAR UNDERFILL MATERIALS
20
Patent #:
6583502
Issue Dt:
06/24/2003
Application #:
09874671
Filing Dt:
06/05/2001
Publication #:
US20020149097
Pub Dt:
10/17/2002
Title:
APPARATUS FOR PACKAGE REDUCTION IN STACKED CHIP AND BOARD ASSEMBLIES
21
Patent #:
6381183
Issue Dt:
04/30/2002
Application #:
09875181
Filing Dt:
06/07/2001
Publication #:
US20020024855
Pub Dt:
02/28/2002
Title:
Column redundancy for prefetch
22
Patent #:
6987866
Issue Dt:
01/17/2006
Application #:
09875375
Filing Dt:
06/05/2001
Publication #:
US20020181745
Pub Dt:
12/05/2002
Title:
MULTI-MODAL MOTION ESTIMATION FOR VIDEO SEQUENCES
23
Patent #:
6479377
Issue Dt:
11/12/2002
Application #:
09875421
Filing Dt:
06/05/2001
Publication #:
US20020182803
Pub Dt:
12/05/2002
Title:
SEMICONDUCTOR DEVICES HAVING CONTACT PLUGS AND LOCAL INTERCONNECTS AND METHODS FOR MAKING THE SAME
24
Patent #:
6721221
Issue Dt:
04/13/2004
Application #:
09876095
Filing Dt:
06/08/2001
Publication #:
US20020186607
Pub Dt:
12/12/2002
Title:
SENSE AMPLIFIER AND ARCHITECTURE FOR OPEN DIGIT ARRAYS
25
Patent #:
6434045
Issue Dt:
08/13/2002
Application #:
09876674
Filing Dt:
06/07/2001
Publication #:
US20010043490
Pub Dt:
11/22/2001
Title:
FLASH MEMORY CELL FOR HIGH EFFICIENCY PROGRAMMING
26
Patent #:
6937278
Issue Dt:
08/30/2005
Application #:
09876848
Filing Dt:
06/05/2001
Publication #:
US20020140689
Pub Dt:
10/03/2002
Title:
ROW DRIVER CIRCUIT FOR A SENSOR INCLUDING A SHARED ROW-RESET BUS AND A CHARGE PUMP BOOSTING CIRCUIT
27
Patent #:
6605533
Issue Dt:
08/12/2003
Application #:
09877280
Filing Dt:
06/08/2001
Publication #:
US20010026960
Pub Dt:
10/04/2001
Title:
PROCESS FOR FORMING LOW RESISTANCE METAL SILICIDE LOCAL INTERCONNECTS
28
Patent #:
6665826
Issue Dt:
12/16/2003
Application #:
09877897
Filing Dt:
06/08/2001
Publication #:
US20010027549
Pub Dt:
10/04/2001
Title:
METHOD AND APPARATUS FOR TESTING THE TIMING OF INTEGRATED CIRCUITS
29
Patent #:
6633972
Issue Dt:
10/14/2003
Application #:
09878062
Filing Dt:
06/07/2001
Publication #:
US20020188775
Pub Dt:
12/12/2002
Title:
METHOD AND APPARATUS FOR UTILIZING STATIC QUEUES IN PROCESSOR STAGING
30
Patent #:
7220615
Issue Dt:
05/22/2007
Application #:
09878302
Filing Dt:
06/11/2001
Publication #:
US20020186549
Pub Dt:
12/12/2002
Title:
ALTERNATIVE METHOD USED TO PACKAGE MULTIMEDIA CARD BY TRANSFER MOLDING
31
Patent #:
6462582
Issue Dt:
10/08/2002
Application #:
09878432
Filing Dt:
06/12/2001
Title:
CLOCKED PASS TRANSISTOR AND COMPLEMENTARY PASS TRANSISTOR LOGIC CIRCUITS
32
Patent #:
6417721
Issue Dt:
07/09/2002
Application #:
09878576
Filing Dt:
06/11/2001
Publication #:
US20010026185
Pub Dt:
10/04/2001
Title:
DEVICE AND METHOD FOR LIMITING THE EXTENT TO WHICH CIRCUITS IN INTEGRATED CIRCUIT DICE ELECTRICALLY LOAD BOND PADS AND OTHER CIRCUIT NODES IN THE DICE
33
Patent #:
6901466
Issue Dt:
05/31/2005
Application #:
09878616
Filing Dt:
06/12/2001
Publication #:
US20010029561
Pub Dt:
10/11/2001
Title:
APPARATUS FOR EXTENDING THE AVAILABLE NUMBER OF CONFIGURATION REGISTERS
34
Patent #:
7109542
Issue Dt:
09/19/2006
Application #:
09879231
Filing Dt:
06/11/2001
Publication #:
US20020024080
Pub Dt:
02/28/2002
Title:
CAPACITOR CONSTRUCTIONS HAVING A CONDUCTIVE LAYER
35
Patent #:
6447162
Issue Dt:
09/10/2002
Application #:
09879244
Filing Dt:
06/11/2001
Publication #:
US20010033598
Pub Dt:
10/25/2001
Title:
SEMICONDUCTOR WIREBOND MACHINE LEADFRAME THERMAL MAP SYSTEM
36
Patent #:
6351411
Issue Dt:
02/26/2002
Application #:
09879453
Filing Dt:
06/12/2001
Publication #:
US20010040820
Pub Dt:
11/15/2001
Title:
Memory using insulator traps
37
Patent #:
6680864
Issue Dt:
01/20/2004
Application #:
09879602
Filing Dt:
06/12/2001
Publication #:
US20010030338
Pub Dt:
10/18/2001
Title:
METHOD FOR READING A VERTICAL GAIN CELL AND ARRAY FOR A DYNAMIC RANDOM ACCESS MEMORY
38
Patent #:
6500738
Issue Dt:
12/31/2002
Application #:
09879741
Filing Dt:
06/11/2001
Publication #:
US20010027000
Pub Dt:
10/04/2001
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY AND SEMICONDUCTOR PROCESSING METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMORY (DRAM) CIRCUITRY
39
Patent #:
6611032
Issue Dt:
08/26/2003
Application #:
09879742
Filing Dt:
06/11/2001
Publication #:
US20010035541
Pub Dt:
11/01/2001
Title:
METHODS FOR FORMING WORDLINES, TRANSISTOR GATES, AND CONDUCTIVE INTERCONNECTS, AND WORDLINE, TRANSISTOR GATE, AND CONDUCTIVE INTERCONNECT STRUCTURES
40
Patent #:
6522160
Issue Dt:
02/18/2003
Application #:
09880617
Filing Dt:
06/13/2001
Title:
INPUT BUFFER WITH AUTOMATIC SWITCHING POINT ADJUSTMENT CIRCUITRY, AND SYNCHRONOUS DRAM DEVICE INCLUDING SAME
41
Patent #:
6756678
Issue Dt:
06/29/2004
Application #:
09881299
Filing Dt:
06/13/2001
Publication #:
US20010030363
Pub Dt:
10/18/2001
Title:
CONDUCTIVE CONNECTION FORMING METHODS, OXIDATION REDUCING METHODS, AND INTEGRATED CIRCUITS FORMED THEREBY
42
Patent #:
6440799
Issue Dt:
08/27/2002
Application #:
09881308
Filing Dt:
06/13/2001
Title:
SEMICONDUCTOR STRUCTURES, METHODS OF IMPLANTING DOPANTS INTO SEMICONDUCTOR STRUCTURES AND METHODS OF FORMING CMOS CONSTRUCTIONS
43
Patent #:
6949479
Issue Dt:
09/27/2005
Application #:
09881407
Filing Dt:
06/13/2001
Publication #:
US20020190268
Pub Dt:
12/19/2002
Title:
METHODS OF FORMING TRANSISTOR DEVICES
44
Patent #:
7037862
Issue Dt:
05/02/2006
Application #:
09881408
Filing Dt:
06/13/2001
Publication #:
US20020192974
Pub Dt:
12/19/2002
Title:
DIELECTRIC LAYER FORMING METHOD AND DEVICES FORMED THEREWITH
45
Patent #:
6788614
Issue Dt:
09/07/2004
Application #:
09881472
Filing Dt:
06/14/2001
Publication #:
US20020191478
Pub Dt:
12/19/2002
Title:
SEMICONDUCTOR MEMORY WITH WORDLINE TIMING
46
Patent #:
6538334
Issue Dt:
03/25/2003
Application #:
09881792
Filing Dt:
06/15/2001
Publication #:
US20010030371
Pub Dt:
10/18/2001
Title:
HIGH DENSITY FLIP CHIP MEMORY ARRAYS
47
Patent #:
6563192
Issue Dt:
05/13/2003
Application #:
09882469
Filing Dt:
06/14/2001
Title:
SEMICONDUCTOR DIE WITH INTEGRAL DECOUPLING CAPACITOR
48
Patent #:
6535428
Issue Dt:
03/18/2003
Application #:
09882535
Filing Dt:
06/14/2001
Publication #:
US20020196664
Pub Dt:
12/26/2002
Title:
BIASING CIRCUIT FOR MULTI-LEVEL MEMORY CELLS
49
Patent #:
6456535
Issue Dt:
09/24/2002
Application #:
09882920
Filing Dt:
06/15/2001
Publication #:
US20010053096
Pub Dt:
12/20/2001
Title:
DYNAMIC FLASH MEMORY CELLS WITH ULTRA THIN TUNNEL OXIDES
50
Patent #:
6448640
Issue Dt:
09/10/2002
Application #:
09883609
Filing Dt:
06/18/2001
Publication #:
US20010033015
Pub Dt:
10/25/2001
Title:
BALL ARRAY LAYOUT IN CHIP ASSEMBLY
51
Patent #:
7005344
Issue Dt:
02/28/2006
Application #:
09883795
Filing Dt:
06/18/2001
Publication #:
US20010032997
Pub Dt:
10/25/2001
Title:
METHOD OF FORMING A DEVICE WITH A GALLIUM NITRIDE OR GALLIUM ALUMINUM NITRIDE GATE
52
Patent #:
6392453
Issue Dt:
05/21/2002
Application #:
09884081
Filing Dt:
06/20/2001
Title:
DIFFERENTIAL INPUT BUFFER BIAS PULSER CIRCUIT
53
Patent #:
7058799
Issue Dt:
06/06/2006
Application #:
09884174
Filing Dt:
06/19/2001
Publication #:
US20020194520
Pub Dt:
12/19/2002
Title:
APPARATUS AND METHOD FOR CLOCK DOMAIN CROSSING WITH INTEGRATED DECODE
54
Patent #:
6434046
Issue Dt:
08/13/2002
Application #:
09884234
Filing Dt:
06/19/2001
Publication #:
US20010040823
Pub Dt:
11/15/2001
Title:
APPARATUS AND METHOD FOR PROGRAMMING VOLTAGE PROTECTION IN A NON-VOLATILE MEMORY SYSTEM
55
Patent #:
6692876
Issue Dt:
02/17/2004
Application #:
09884290
Filing Dt:
06/18/2001
Publication #:
US20010033979
Pub Dt:
10/25/2001
Title:
METHODS OF PATTERNING RADIATION, METHODS OF FORMING RADIATION-PATTERNING TOOLS, AND RADIATION-PATTERNING TOOLS
56
Patent #:
6479332
Issue Dt:
11/12/2002
Application #:
09884293
Filing Dt:
06/18/2001
Publication #:
US20010031520
Pub Dt:
10/18/2001
Title:
METHODS OF FORMING INTEGRATED CIRCUITRY
57
Patent #:
6570258
Issue Dt:
05/27/2003
Application #:
09884630
Filing Dt:
06/18/2001
Publication #:
US20010028112
Pub Dt:
10/11/2001
Title:
METHOD FOR REDUCING CAPACITIVE COUPLING BETWEEN CONDUCTIVE LINES
58
Patent #:
6438033
Issue Dt:
08/20/2002
Application #:
09884785
Filing Dt:
06/19/2001
Publication #:
US20010043491
Pub Dt:
11/22/2001
Title:
APPARATUS AND METHOD FOR PROGRAMMING VOLTAGE PROTECTION IN A NON-VOLATILE MEMORY SYSTEM
59
Patent #:
6469936
Issue Dt:
10/22/2002
Application #:
09884793
Filing Dt:
06/19/2001
Publication #:
US20010046159
Pub Dt:
11/29/2001
Title:
APPARATUS AND METHOD FOR PROGRAMMING VOLTAGE PROTECTION IN A NON-VOLATILE MEMORY SYSTEM
60
Patent #:
6583002
Issue Dt:
06/24/2003
Application #:
09884950
Filing Dt:
06/19/2001
Publication #:
US20010036698
Pub Dt:
11/01/2001
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY MEMORY DEVICES, METHODS OF FORMING CAPACITOR CONTAINERS, METHODS OF MAKING ELECTRICAL CONNECTION TO CIRCUIT NODES AND RELATED INTEGRATED CIRCUITRY
61
Patent #:
6878507
Issue Dt:
04/12/2005
Application #:
09885393
Filing Dt:
06/19/2001
Publication #:
US20010033997
Pub Dt:
10/25/2001
Title:
SEMICONDUCTOR PROCESSING METHODS
62
Patent #:
6541303
Issue Dt:
04/01/2003
Application #:
09885615
Filing Dt:
06/20/2001
Publication #:
US20020197766
Pub Dt:
12/26/2002
Title:
METHOD AND APPARATUS FOR CONDUCTING HEAT IN A FLIP-CHIP ASSEMBLY
63
Patent #:
6630781
Issue Dt:
10/07/2003
Application #:
09885624
Filing Dt:
06/20/2001
Publication #:
US20020014832
Pub Dt:
02/07/2002
Title:
INSULATED ELECTRODE STRUCTURES FOR A DISPLAY DEVICE
64
Patent #:
6455423
Issue Dt:
09/24/2002
Application #:
09886332
Filing Dt:
06/21/2001
Publication #:
US20010044207
Pub Dt:
11/22/2001
Title:
DIRECT WRITING OF LOW CARBON CONDUCTIVE MATERIAL
65
Patent #:
6370070
Issue Dt:
04/09/2002
Application #:
09886543
Filing Dt:
06/21/2001
Publication #:
US20020024861
Pub Dt:
02/28/2002
Title:
Methods for alternate bitline stress testing
66
Patent #:
6442094
Issue Dt:
08/27/2002
Application #:
09886762
Filing Dt:
06/21/2001
Publication #:
US20010033520
Pub Dt:
10/25/2001
Title:
DEVICE AND METHOD FOR REPAIRING A MEMORY ARRAY BY STORING EACH BIT IN MULTIPLE MEMORY CELLS IN THE ARRAY
67
Patent #:
6524960
Issue Dt:
02/25/2003
Application #:
09886782
Filing Dt:
06/21/2001
Publication #:
US20010039120
Pub Dt:
11/08/2001
Title:
USE OF RESIDUAL ORGANIC COMPOUNDS TO FACILITATE GATE BREAK ON A CARRIER SUBSTRATE FOR A SEMICONDUCTOR DEVICE
68
Patent #:
6576542
Issue Dt:
06/10/2003
Application #:
09887085
Filing Dt:
06/21/2001
Publication #:
US20010036724
Pub Dt:
11/01/2001
Title:
CONDUCTIVE LINES, COAXIAL LINES, INTEGRATED CIRCUITRY, AND METHODS OF FORMING CONDUCTIVE LINES, COAXIAL LINES, AND INTEGRATED CIRCUITRY
69
Patent #:
6455439
Issue Dt:
09/24/2002
Application #:
09887214
Filing Dt:
06/22/2001
Publication #:
US20010036745
Pub Dt:
11/01/2001
Title:
METHOD OF FORMING A MASK
70
Patent #:
6475921
Issue Dt:
11/05/2002
Application #:
09887603
Filing Dt:
06/22/2001
Publication #:
US20010036743
Pub Dt:
11/01/2001
Title:
MASK FOR PRODUCING RECTANGULAR OPENINGS IN A SUBSTRATE
71
Patent #:
6640816
Issue Dt:
11/04/2003
Application #:
09888050
Filing Dt:
06/22/2001
Publication #:
US20020011255
Pub Dt:
01/31/2002
Title:
METHOD FOR POST CHEMICAL-MECHANICAL PLANARIZATION CLEANING OF SEMICONDUCTOR WAFERS
72
Patent #:
7112121
Issue Dt:
09/26/2006
Application #:
09888084
Filing Dt:
06/21/2001
Publication #:
US20020025763
Pub Dt:
02/28/2002
Title:
METHODS AND APPARATUS FOR ELECTRICAL, MECHANICAL AND/OR CHEMICAL REMOVAL OF CONDUCTIVE MATERIAL FROM A MICROELECTRONIC SUBSTRATE
73
Patent #:
6504760
Issue Dt:
01/07/2003
Application #:
09888252
Filing Dt:
06/22/2001
Publication #:
US20030002341
Pub Dt:
01/02/2003
Title:
CHARGING A CAPACITANCE OF A MEMORY CELL AND CHARGER
74
Patent #:
6668449
Issue Dt:
12/30/2003
Application #:
09888674
Filing Dt:
06/25/2001
Publication #:
US20030000738
Pub Dt:
01/02/2003
Title:
METHOD OF MAKING A SEMICONDUCTOR DEVICE HAVING AN OPENING IN A SOLDER MASK
75
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6469591
Issue Dt:
10/22/2002
Application #:
09888725
Filing Dt:
06/25/2001
Publication #:
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Pub Dt:
01/03/2002
Title:
METHOD TO FIND A VALUE WITHIN A RANGE USING WEIGHTED SUBRANGES
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6579803
Issue Dt:
06/17/2003
Application #:
09888845
Filing Dt:
06/25/2001
Publication #:
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Pub Dt:
11/22/2001
Title:
REMOVAL OF COPPER OXIDES FROM INTEGRATED INTERCONNECTS
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6576987
Issue Dt:
06/10/2003
Application #:
09888885
Filing Dt:
06/25/2001
Publication #:
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Pub Dt:
11/08/2001
Title:
INTERDIGITATED LEADS-OVER-CHIP LEAD FRAME, AND DEVICE, FOR SUPPORTING AN INTEGRATED CIRCUIT DIE
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Patent #:
6551892
Issue Dt:
04/22/2003
Application #:
09891438
Filing Dt:
06/25/2001
Publication #:
US20010036707
Pub Dt:
11/01/2001
Title:
PROCESS FOR THE MANUFACTURE OF INTEGRATED DEVICES WITH GATE OXIDE PROTECTION FROM MANUFACTURING PROCESS DAMAGE, AND PROTECTION STRUCTURE THEREFOR
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Patent #:
7424576
Issue Dt:
09/09/2008
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Filing Dt:
06/27/2001
Publication #:
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Pub Dt:
12/12/2002
Title:
PARALLEL CACHELETS
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6516382
Issue Dt:
02/04/2003
Application #:
09891567
Filing Dt:
06/25/2001
Publication #:
US20010037429
Pub Dt:
11/01/2001
Title:
MEMORY DEVICE BALANCED SWITCHING CIRCUIT AND METHOD OF CONTROLLING AN ARRAY OF TRANSFER GATES FOR FAST SWITCHING TIMES
81
Patent #:
6727173
Issue Dt:
04/27/2004
Application #:
09891570
Filing Dt:
06/25/2001
Publication #:
US20010044221
Pub Dt:
11/22/2001
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING AND UTILIZING ANTIREFLECTIVE MATERIAL LAYERS, AND METHODS OF FORMING TRANSISTOR GATE STACKS
82
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6617246
Issue Dt:
09/09/2003
Application #:
09891575
Filing Dt:
06/25/2001
Publication #:
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Pub Dt:
11/01/2001
Title:
SEMICONDUCTOR PROCESSING METHODS AND INTEGRATED CIRCUITRY
83
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6491526
Issue Dt:
12/10/2002
Application #:
09891623
Filing Dt:
06/25/2001
Publication #:
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Pub Dt:
06/13/2002
Title:
RISER CARD ASSEMBLY AND METHOD FOR ITS INSTALLATION
84
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6456562
Issue Dt:
09/24/2002
Application #:
09892099
Filing Dt:
06/26/2001
Publication #:
US20020024880
Pub Dt:
02/28/2002
Title:
CLOCK GENERATION CIRCUITS
85
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6420681
Issue Dt:
07/16/2002
Application #:
09892156
Filing Dt:
06/26/2001
Title:
METHOD AND PROCESS OF CONTACT TO A HEAT SOFTENED SOLDER BALL ARRAY
86
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6512861
Issue Dt:
01/28/2003
Application #:
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Filing Dt:
06/26/2001
Publication #:
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Pub Dt:
12/26/2002
Title:
PACKAGING AND ASSEMBLY METHOD FOR OPTICAL COUPLING
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6482689
Issue Dt:
11/19/2002
Application #:
09892956
Filing Dt:
06/27/2001
Publication #:
US20020055214
Pub Dt:
05/09/2002
Title:
STACKED LOCAL INTERCONNECT STRUCTURE AND METHOD OF FABRICATING SAME
88
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6871253
Issue Dt:
03/22/2005
Application #:
09893616
Filing Dt:
06/29/2001
Publication #:
US20020083255
Pub Dt:
06/27/2002
Title:
Data transmission circuit for memory subsystem, has switching circuit that selectively connects or disconnects two data bus segments to respectively enable data transmission or I/O circuit connection
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6647455
Issue Dt:
11/11/2003
Application #:
09893779
Filing Dt:
06/27/2001
Publication #:
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Pub Dt:
01/02/2003
Title:
ON-DIE CACHE MEMORY WITH REPEATERS
90
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7392277
Issue Dt:
06/24/2008
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09893868
Filing Dt:
06/29/2001
Publication #:
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Pub Dt:
01/16/2003
Title:
CASCADED DOMINO FOUR-TO-TWO REDUCER CIRCUIT AND METHOD
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6562730
Issue Dt:
05/13/2003
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09894070
Filing Dt:
06/28/2001
Publication #:
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Pub Dt:
11/29/2001
Title:
BARRIER IN GATE STACK FOR IMPROVED GATE DIELECTRIC INTEGRITY
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02/03/2009
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09894136
Filing Dt:
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Publication #:
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Pub Dt:
01/02/2003
Title:
SYSTEM FOR SHARING CHANNELS BY INTERLEAVING FLITS
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6645703
Issue Dt:
11/11/2003
Application #:
09894194
Filing Dt:
06/27/2001
Publication #:
US20010038955
Pub Dt:
11/08/2001
Title:
METHODS OF PHOTO-PROCESSING PHOTORESIST
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07/26/2005
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09894460
Filing Dt:
06/28/2001
Publication #:
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Pub Dt:
01/02/2003
Title:
ETCHING OF HIGH ASPECT RATIO STRUCTURES
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6631444
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10/07/2003
Application #:
09894513
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Publication #:
US20030005224
Pub Dt:
01/02/2003
Title:
CACHE ARCHITECTURE FOR PIPELINED OPERATION WITH ON-DIE PROCESSOR
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12/09/2003
Application #:
09894638
Filing Dt:
06/27/2001
Publication #:
US20030005225
Pub Dt:
01/02/2003
Title:
CACHE ARCHITECTURE WITH REDUNDANT SUB ARRAY
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6598133
Issue Dt:
07/22/2003
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09894755
Filing Dt:
06/28/2001
Publication #:
US20030005240
Pub Dt:
01/02/2003
Title:
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98
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6427587
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08/06/2002
Application #:
09894935
Filing Dt:
06/28/2001
Publication #:
US20020023554
Pub Dt:
02/28/2002
Title:
METHOD AND STENCIL FOR EXTRUDING MATERIAL ON A SUBSTRATE
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6710462
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03/23/2004
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09895662
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06/29/2001
Publication #:
US20020031866
Pub Dt:
03/14/2002
Title:
METHOD OF PRESSURE CURING FOR REDUCING VOIDS IN A DIE ATTACH BONDLINE AND APPLICATIONS THEREOF
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7073070
Issue Dt:
07/04/2006
Application #:
09895738
Filing Dt:
06/29/2001
Publication #:
US20030005295
Pub Dt:
01/02/2003
Title:
METHOD AND APPARATUS TO IMPROVE THE PROTECTION OF INFORMATION PRESENTED BY A COMPUTER
Assignor
1
MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Exec Dt:
07/31/2019
Assignee
1
MICRON TECHNOLOGY, INC.
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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