|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2005
|
Application #:
|
10407627
|
Filing Dt:
|
04/04/2003
|
|
Publication #:
|
|
Pub Dt:
|
02/19/2004
| | | | |
|
Title:
|
VERTICAL NROM AND METHODS FOR MAKING THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/11/2005
|
Application #:
|
10407640
|
Filing Dt:
|
04/03/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/18/2004
| | | | |
|
Title:
|
FAST DYNAMIC MIRROR SENSE AMPLIFIER WITH SEPARATE COMPARISON EQUALIZATION AND EVALUATION PATHS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/2004
|
Application #:
|
10407646
|
Filing Dt:
|
04/03/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/18/2004
| | | | |
|
Title:
|
SYSTEM FOR CONTROLLING THE STAND-BY TO ACTIVE AND ACTIVE TO STAND-BY TRANSITIONS OF A VCC REGULATOR FOR A FLASH MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2004
|
Application #:
|
10407647
|
Filing Dt:
|
04/03/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/11/2004
| | | | |
|
Title:
|
DAC-BASED VOLTAGE REGULATOR FOR FLASH MEMORY ARRAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2004
|
Application #:
|
10409248
|
Filing Dt:
|
04/07/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/07/2004
| | | | |
|
Title:
|
A NON-VOLATILE FLOATING GATE MEMORY CELL WITH FLOATING GATES FORMED IN CAVITIES, AND ARRAY THEREOF, AND METHOD OF FORMATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2005
|
Application #:
|
10409333
|
Filing Dt:
|
04/07/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/07/2004
| | | | |
|
Title:
|
BI-DIRECTIONAL READ/PROGRAM NON-VOLATILE FLOATING GATE MEMORY CELL AND ARRAY THEREOF, AND METHOD OF FORMATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2007
|
Application #:
|
10409407
|
Filing Dt:
|
04/07/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/07/2004
| | | | |
|
Title:
|
BI-DIRECTIONAL READ/PROGRAM NON-VOLATILE FLOATING GATE MEMORY CELL WITH INDEPENDENT CONTROLLABLE CONTROL GATES, AND ARRAY THEREOF, AND METHOD OF FORMATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/18/2007
|
Application #:
|
10410088
|
Filing Dt:
|
04/09/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/14/2004
| | | | |
|
Title:
|
COMMUNICATION PROTOCOL FOR PERSONAL COMPUTER SYSTEM HUMAN INTERFACE DEVICES OVER A LOW BANDWIDTH, BI-DIRECTIONAL RADIO FREQUENCY LINK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/30/2006
|
Application #:
|
10410089
|
Filing Dt:
|
04/09/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/14/2004
| | | | |
|
Title:
|
SELECTIVE IMPLEMENTATION OF POWER MANAGEMENT SCHEMES BASED ON DETECTED COMPUTER OPERATING ENVIRONMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2006
|
Application #:
|
10411993
|
Filing Dt:
|
04/11/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/14/2004
| | | | |
|
Title:
|
ON-CHIP CALIBRATED SOURCE TERMINATION FOR VOLTAGE MODE DRIVER AND METHOD OF CALIBRATION THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2006
|
Application #:
|
10412433
|
Filing Dt:
|
04/11/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/14/2004
| | | | |
|
Title:
|
RESISTANCE MULTIPLIER CIRCUIT AND COMPACT GAIN ATTENUATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2006
|
Application #:
|
10419600
|
Filing Dt:
|
04/21/2003
|
|
Publication #:
|
|
Pub Dt:
|
01/22/2004
| | | | |
|
Title:
|
BATTERY COVER ASSEMBLY HAVING INTEGRATED BATTERY CONDITION MONITORING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2004
|
Application #:
|
10422165
|
Filing Dt:
|
04/23/2003
|
|
Publication #:
|
|
Pub Dt:
|
11/13/2003
| | | | |
|
Title:
|
ELECTRICAL PRINT RESOLUTION TEST DIE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2006
|
Application #:
|
10422183
|
Filing Dt:
|
04/23/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/28/2004
| | | | |
|
Title:
|
NON-VOLATILE FLOATING GATE MEMORY CELL WITH FLOATING GATES FORMED AS SPACERS, AND AN ARRAY THEREOF, AND A METHOD OF MANUFACTURING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2005
|
Application #:
|
10423637
|
Filing Dt:
|
04/25/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/28/2004
| | | | |
|
Title:
|
MIRROR IMAGE MEMORY CELL TRANSISTOR PAIRS FEATURING POLY FLOATING SPACERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2006
|
Application #:
|
10424556
|
Filing Dt:
|
04/25/2003
|
|
Publication #:
|
|
Pub Dt:
|
02/26/2004
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR LOAD SHARING IN A MULTIPHASE SWITCHING POWER CONVERTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2005
|
Application #:
|
10424817
|
Filing Dt:
|
04/29/2003
|
|
Publication #:
|
|
Pub Dt:
|
02/12/2004
| | | | |
|
Title:
|
HIGH SPEED I/O PAD AND PAD/CELL INTERCONNECTION FOR FLIP CHIPS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2005
|
Application #:
|
10428742
|
Filing Dt:
|
05/02/2003
|
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
|
Title:
|
CIRCUIT FOR COMPENSATING PROGRAMMING CURRENT REQUIRED, DEPENDING UPON PROGRAMMING STATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/21/2015
|
Application #:
|
10429267
|
Filing Dt:
|
05/02/2003
|
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
|
Title:
|
Packet forwarding method and system
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2006
|
Application #:
|
10435176
|
Filing Dt:
|
05/10/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/14/2004
| | | | |
|
Title:
|
LOW COMPLEXITY ERROR CONCEALMENT FOR WIRELESS TRANSMISSION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/2004
|
Application #:
|
10437862
|
Filing Dt:
|
05/13/2003
|
|
Title:
|
TEST CIRCUIT FOR INPUT-TO-OUTPUT SPEED MEASUREMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/2005
|
Application #:
|
10440606
|
Filing Dt:
|
05/19/2003
|
|
Publication #:
|
|
Pub Dt:
|
11/25/2004
| | | | |
|
Title:
|
PARABOLIC CONTROL OF THE DUTY CYCLE OF A PULSE WIDTH MODULATED SIGNAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/18/2006
|
Application #:
|
10440745
|
Filing Dt:
|
05/19/2003
|
|
Publication #:
|
|
Pub Dt:
|
11/25/2004
| | | | |
|
Title:
|
PIECEWISE LINEAR CONTROL OF THE DUTY CYCLE OF A PULSE WIDTH MODULATED SIGNAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/05/2005
|
Application #:
|
10441763
|
Filing Dt:
|
05/19/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
|
Title:
|
METHOD OF FABRICATING A BIPOLAR TRANSISTOR USING SELECTIVE EPITAXIALLY GROWN SIGE BASE LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/29/2008
|
Application #:
|
10443153
|
Filing Dt:
|
05/21/2003
|
|
Publication #:
|
|
Pub Dt:
|
11/25/2004
| | | | |
|
Title:
|
BI-DIRECTIONAL SINGLE WIRE INTERFACE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2004
|
Application #:
|
10443241
|
Filing Dt:
|
05/21/2003
|
|
Title:
|
DEQUEUING FROM A HOST ADAPTER TWO-DIMENSIONAL QUEUE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2004
|
Application #:
|
10444670
|
Filing Dt:
|
05/23/2003
|
|
Title:
|
PHASE DETECTOR FOR LOW POWER APPLICATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2007
|
Application #:
|
10445110
|
Filing Dt:
|
05/23/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/04/2003
| | | | |
|
Title:
|
ADVANCED ENCRYPTION STANDARD (AES) HARDWARE CRYPTOGRAPHIC ENGINE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2005
|
Application #:
|
10447569
|
Filing Dt:
|
05/29/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/02/2004
| | | | |
|
Title:
|
DELTA VGS CURVATURE CORRECTION FOR BANDGAP REFERENCE VOLTAGE GENERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/2004
|
Application #:
|
10452027
|
Filing Dt:
|
05/30/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/02/2004
| | | | |
|
Title:
|
ARRAY OF INTEGRATED CIRCUIT UNITS WITH STRAPPING LINES TO PREVENT PUNCH THROUGH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2005
|
Application #:
|
10452562
|
Filing Dt:
|
05/30/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/02/2004
| | | | |
|
Title:
|
SIGNAL INTEGRITY CHECKING CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2005
|
Application #:
|
10452697
|
Filing Dt:
|
06/02/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/02/2004
| | | | |
|
Title:
|
DYNAMIC, DIGITALLY CONTROLLED, TEMPERATURE COMPENSATED VOLTAGE REFERENCE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
|
Application #:
|
10453160
|
Filing Dt:
|
06/02/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/16/2004
| | | | |
|
Title:
|
FAULT TOLERANT DATA STORAGE CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/2004
|
Application #:
|
10453233
|
Filing Dt:
|
06/02/2003
|
|
Publication #:
|
|
Pub Dt:
|
11/06/2003
| | | | |
|
Title:
|
OSCILLATING CIRCUIT WITH REDUCED DECAY AND TRANSIENT TIMES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2006
|
Application #:
|
10457975
|
Filing Dt:
|
06/09/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/09/2004
| | | | |
|
Title:
|
HIGH VOLTAGE SHUNT REGULATOR FOR FLASH MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2005
|
Application #:
|
10458006
|
Filing Dt:
|
06/09/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/09/2004
| | | | |
|
Title:
|
CURVED FRACTIONAL CMOS BANDGAP REFERENCE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2005
|
Application #:
|
10459169
|
Filing Dt:
|
06/11/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/23/2004
| | | | |
|
Title:
|
PROGRAMMABLE PWM STRETCHING FOR TACHOMETER MEASUREMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2010
|
Application #:
|
10496367
|
Filing Dt:
|
05/20/2004
|
|
Publication #:
|
|
Pub Dt:
|
02/10/2005
| | | | |
|
Title:
|
METHOD FOR SYNCHRONIZATION IN NETWORKS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/2006
|
Application #:
|
10503257
|
Filing Dt:
|
07/29/2004
|
|
Publication #:
|
|
Pub Dt:
|
06/16/2005
| | | | |
|
Title:
|
METHOD FOR SELECTING TRANSPONDERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/07/2006
|
Application #:
|
10518874
|
Filing Dt:
|
07/21/2005
|
|
Publication #:
|
|
Pub Dt:
|
03/16/2006
| | | | |
|
Title:
|
DIGITALLY-CONTROLLED OSCILLATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
10563661
|
Filing Dt:
|
06/05/2006
|
|
Publication #:
|
|
Pub Dt:
|
11/30/2006
| | | | |
|
Title:
|
DEVICE FOR COMPARING TWO WORDS OF N BITS EACH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2004
|
Application #:
|
10607286
|
Filing Dt:
|
06/25/2003
|
|
Title:
|
CIRCUIT FOR TESTING AND FINE TUNING INTEGRATED CIRCUIT (SWITCH CONTROL CIRCUIT)
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2007
|
Application #:
|
10608312
|
Filing Dt:
|
06/27/2003
|
|
Title:
|
METHOD FOR BOOT RECOVERY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/16/2005
|
Application #:
|
10616226
|
Filing Dt:
|
07/09/2003
|
|
Publication #:
|
|
Pub Dt:
|
02/26/2004
| | | | |
|
Title:
|
REFERENCE VOLTAGE SOURCE, TEMPERATURE SENSOR, TEMPERATURE THRESHOLD DETECTOR, CHIP AND CORRESPONDING SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2004
|
Application #:
|
10618233
|
Filing Dt:
|
07/11/2003
|
|
Title:
|
LOAD SENSING CIRCUIT FOR A POWER MOSFET SWITCH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2005
|
Application #:
|
10622051
|
Filing Dt:
|
07/17/2003
|
|
Publication #:
|
|
Pub Dt:
|
01/20/2005
| | | | |
|
Title:
|
EFFICIENT CLASS-G AMPLIFIER WITH WIDE OUTPUT VOLTAGE SWING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2008
|
Application #:
|
10622337
|
Filing Dt:
|
07/18/2003
|
|
Title:
|
AC COUPLING SYSTEM FOR WIDE BAND DIGITAL DATA WITH DYNAMIC AC LOAD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/2005
|
Application #:
|
10622804
|
Filing Dt:
|
07/18/2003
|
|
Publication #:
|
|
Pub Dt:
|
09/09/2004
| | | | |
|
Title:
|
APPARATUS AND METHOD FOR A CONFIGURABLE MIRROR FAST SENSE AMPLIFIER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2005
|
Application #:
|
10624394
|
Filing Dt:
|
07/22/2003
|
|
Publication #:
|
|
Pub Dt:
|
01/27/2005
| | | | |
|
Title:
|
TEMPERATURE-TO-DIGITAL CONVERTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2006
|
Application #:
|
10628979
|
Filing Dt:
|
07/28/2003
|
|
Publication #:
|
|
Pub Dt:
|
02/03/2005
| | | | |
|
Title:
|
COLUMN REDUNDANCY FOR DIGITAL MULTILEVEL NONVOLATILE MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/2005
|
Application #:
|
10629138
|
Filing Dt:
|
07/28/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/01/2004
| | | | |
|
Title:
|
POWER DOWN SYSTEM AND METHOD FOR INTEGRATED CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2005
|
Application #:
|
10634596
|
Filing Dt:
|
08/04/2003
|
|
Publication #:
|
|
Pub Dt:
|
02/10/2005
| | | | |
|
Title:
|
SHIFT REGISTER WITH REDUCED AREA AND POWER CONSUMPTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2006
|
Application #:
|
10637468
|
Filing Dt:
|
08/08/2003
|
|
Publication #:
|
|
Pub Dt:
|
02/24/2005
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR GENERATING ACCURATE FAN TACHOMETER READINGS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2005
|
Application #:
|
10639066
|
Filing Dt:
|
08/11/2003
|
|
Publication #:
|
|
Pub Dt:
|
02/17/2005
| | | | |
|
Title:
|
SELECTIVE HIGH-SIDE AND LOW-SIDE CURRENT SENSING IN SWITCHING POWER SUPPLIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2006
|
Application #:
|
10639078
|
Filing Dt:
|
08/11/2003
|
|
Publication #:
|
|
Pub Dt:
|
02/17/2005
| | | | |
|
Title:
|
SELF-LIMITING PULSE WIDTH MODULATION REGULATOR
|
|
|
|
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Patent #:
|
|
Issue Dt:
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12/28/2004
|
Application #:
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10639544
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Filing Dt:
|
08/12/2003
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Publication #:
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Pub Dt:
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02/19/2004
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Title:
|
SIGNAL SAMPLING METHOD AND CIRCUIT FOR IMPROVED HOLD MODE ISOLATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2006
|
Application #:
|
10640936
|
Filing Dt:
|
08/14/2003
|
|
Title:
|
I20 COMMAND AND STATUS BATCHING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2006
|
Application #:
|
10641431
|
Filing Dt:
|
08/14/2003
|
|
Publication #:
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|
Pub Dt:
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02/17/2005
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Title:
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PHASE CHANGE MEMORY DEVICE EMPLOYING THERMAL-ELECTRICAL CONTACTS WITH NARROWING ELECTRICAL CURRENT PATHS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2005
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Application #:
|
10641432
|
Filing Dt:
|
08/14/2003
|
|
Publication #:
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|
Pub Dt:
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02/17/2005
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|
Title:
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METHOD OF MANUFACTURING AN ARRAY OF BI-DIRECTIONAL NONVOLATILE MEMORY CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/2004
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Application #:
|
10641490
|
Filing Dt:
|
08/14/2003
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|
Title:
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METHOD OF MAKING SUB-LITHOGRAPHIC SIZED CONTACT HOLES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2004
|
Application #:
|
10641609
|
Filing Dt:
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08/15/2003
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|
Title:
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INTEGRATED CIRCUIT WITH A REPROGRAMMABLE NONVOLATILE SWITCH FOR SELECTIVELY CONNECTING A SOURCE FOR A SIGNAL TO A CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2004
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Application #:
|
10641610
|
Filing Dt:
|
08/15/2003
|
|
Title:
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INTEGRATED CIRCUIT WITH A REPROGRAMMABLE NONVOLATILE SWITCH HAVING A DYNAMIC THRESHOLD VOLTAGE (VTH) FOR SELECTIVELY CONNECTING A SOURCE FOR A SIGNAL TO A CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/2004
|
Application #:
|
10641803
|
Filing Dt:
|
08/15/2003
|
|
Title:
|
INTEGRATED CIRCUIT WITH A THREE TRANSISTOR REPROGRAMMABLE NONVOLATILE SWITCH FOR SELECTIVELY CONNECTING A SOURCE FOR A SIGNAL TO A CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2005
|
Application #:
|
10642077
|
Filing Dt:
|
08/14/2003
|
|
Publication #:
|
|
Pub Dt:
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02/17/2005
| | | | |
|
Title:
|
MULTI-BIT ROM CELL WITH BI-DIRECTIONAL READ AND A METHOD FOR MAKING THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2006
|
Application #:
|
10642078
|
Filing Dt:
|
08/14/2003
|
|
Publication #:
|
|
Pub Dt:
|
02/17/2005
| | | | |
|
Title:
|
ARRAY OF MULTI-BIT ROM CELLS WITH EACH CELL HAVING BI-DIRECTIONAL READ AND A METHOD FOR MAKING THE ARRAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2005
|
Application #:
|
10642079
|
Filing Dt:
|
08/14/2003
|
|
Publication #:
|
|
Pub Dt:
|
02/17/2005
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|
Title:
|
A MULTI-BIT ROM CELL, FOR STORING ONE OF N>4 POSSIBLE STATES AND HAVING BI-DIRECTIONAL READ, AN ARRAY OF SUCH CELLS.
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2004
|
Application #:
|
10642420
|
Filing Dt:
|
08/15/2003
|
|
Title:
|
DIGITAL DECIMATION FILTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2007
|
Application #:
|
10643249
|
Filing Dt:
|
08/18/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/17/2005
| | | | |
|
Title:
|
MEMORY DEVICE OPERABLE WITH A PLURALITY OF PROTOCOLS WITH CONFIGURATION DATA STORED IN NON-VOLATILE STORAGE ELEMENTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/2004
|
Application #:
|
10650546
|
Filing Dt:
|
08/28/2003
|
|
Title:
|
IMPLANTABLE CARDIAC DEFIBRILLATION WITH CONTROL CIRCUIT FOR CONTROLLING A HIGH VOLTAGE CIRCUIT USING A LOW VOLTAGE CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/2005
|
Application #:
|
10653015
|
Filing Dt:
|
08/28/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/03/2005
| | | | |
|
Title:
|
SELF-ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED FLOATING GATE, AND A MEMORY ARRAY MADE THEREBY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2006
|
Application #:
|
10653322
|
Filing Dt:
|
09/02/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/03/2005
| | | | |
|
Title:
|
FSK MODULATOR USING IQ UP-MIXERS AND SINEWAVE CODED DACS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/2005
|
Application #:
|
10653614
|
Filing Dt:
|
09/02/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/03/2005
| | | | |
|
Title:
|
ALL DIGITAL PLL TRIMMING CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2009
|
Application #:
|
10655265
|
Filing Dt:
|
09/04/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/10/2005
| | | | |
|
Title:
|
CIRCUIT, SYSTEM, AND METHOD FOR PREVENTING A COMMUNICATION SYSTEM ABSENT A DEDICATED CLOCKING MASTER FROM PRODUCING A CLOCKING FREQUENCY OUTSIDE AN ACCEPTABLE RANGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/2005
|
Application #:
|
10656071
|
Filing Dt:
|
09/04/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/10/2005
| | | | |
|
Title:
|
METHOD OF MAKING NONVOLATILE TRANSISTOR PAIRS WITH SHARED CONTROL GATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2004
|
Application #:
|
10656486
|
Filing Dt:
|
09/04/2003
|
|
Title:
|
PHASE CHANGE MEMORY DEVICE EMPLOYING THERMALLY INSULATING VOIDS, AND A METHOD OF MAKING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2005
|
Application #:
|
10656668
|
Filing Dt:
|
09/04/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/10/2005
| | | | |
|
Title:
|
MEMORY DEVICE WITH DISCRETE LAYERS OF PHASE CHANGE MEMORY MATERIAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/28/2006
|
Application #:
|
10659226
|
Filing Dt:
|
09/09/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/10/2005
| | | | |
|
Title:
|
UNIFIED MULTILEVEL CELL MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2005
|
Application #:
|
10665806
|
Filing Dt:
|
09/19/2003
|
|
Publication #:
|
|
Pub Dt:
|
07/08/2004
| | | | |
|
Title:
|
THICK GATE OXIDE TRANSISTOR AND ELECTROSTATIC DISCHARGE PROTECTION UTILIZING THICK GATE OXIDE TRANSISTORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/2006
|
Application #:
|
10667535
|
Filing Dt:
|
09/22/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/14/2005
| | | | |
|
Title:
|
AMPLIFIER WITH ACCURATE BUILT-IN THRESHOLD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2006
|
Application #:
|
10668062
|
Filing Dt:
|
09/22/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/27/2005
| | | | |
|
Title:
|
METHOD AND APPARATUS TO ACHIEVE ACCURATE FAN TACHOMETER WITH PROGRAMMABLE LOOK-UP TABLE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2007
|
Application #:
|
10669040
|
Filing Dt:
|
09/22/2003
|
|
Publication #:
|
|
Pub Dt:
|
06/10/2004
| | | | |
|
Title:
|
SOURCE SYNCHRONOUS CDMA BUS INTERFACE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2006
|
Application #:
|
10669081
|
Filing Dt:
|
09/23/2003
|
|
Publication #:
|
|
Pub Dt:
|
07/08/2004
| | | | |
|
Title:
|
FRONT SIDE ILLUMINATED PHOTODIODE WITH BACKSIDE BUMP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
10669762
|
Filing Dt:
|
09/24/2003
|
|
Publication #:
|
|
Pub Dt:
|
05/13/2004
| | | | |
|
Title:
|
INTEGRATED DEVICE TECHNOLOGY USING A BURIED POWER BUSS FOR MAJOR DEVICE AND CIRCUIT ADVANTAGES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2007
|
Application #:
|
10670619
|
Filing Dt:
|
09/25/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/31/2005
| | | | |
|
Title:
|
Q-QUENCHING SUPER-REGENERATIVE RECEIVER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2005
|
Application #:
|
10671200
|
Filing Dt:
|
09/25/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/30/2004
| | | | |
|
Title:
|
LOW VOLTAGE CIRCUIT FOR INTERFACING WITH HIGH VOLTAGE ANALOG SIGNALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2006
|
Application #:
|
10677123
|
Filing Dt:
|
09/30/2003
|
|
Publication #:
|
|
Pub Dt:
|
07/15/2004
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR IMPROVED HIGH-SPEED ADAPTIVE EQUALIZATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2006
|
Application #:
|
10677449
|
Filing Dt:
|
10/02/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/07/2005
| | | | |
|
Title:
|
SWITCHED-CAPACITOR SAMPLE/HOLD HAVING REDUCED AMPLIFIER SLEW-RATE AND SETTLING TIME REQUIREMENTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2005
|
Application #:
|
10677452
|
Filing Dt:
|
10/02/2003
|
|
Title:
|
DIMMABLE ELECTROLUMANESCENT LAMP DRIVERS AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2005
|
Application #:
|
10683621
|
Filing Dt:
|
10/10/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/14/2005
| | | | |
|
Title:
|
INTEGRATED RELAXATION OSCILLATOR WITH IMPROVED SENSITIVITY TO COMPONENT VARIATION DUE TO PROCESS-SHIFT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/08/2005
|
Application #:
|
10683845
|
Filing Dt:
|
10/10/2003
|
|
Title:
|
SELF-STARTING REFERENCE CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/2005
|
Application #:
|
10685629
|
Filing Dt:
|
10/15/2003
|
|
Title:
|
METHOD FOR INTEGRATING NON-VOLATILE MEMORY WITH HIGH-VOLTAGE AND LOW-VOLTAGE LOGIC IN A SALICIDE PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/16/2005
|
Application #:
|
10685752
|
Filing Dt:
|
10/14/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/14/2005
| | | | |
|
Title:
|
SUSPEND-RESUME PROGRAMMING METHOD FOR FLASH MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2005
|
Application #:
|
10685957
|
Filing Dt:
|
10/14/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/14/2005
| | | | |
|
Title:
|
GROUP ERASING SYSTEM FOR FLASH ARRAY WITH MULTIPLE SECTORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/25/2006
|
Application #:
|
10690082
|
Filing Dt:
|
10/20/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/21/2005
| | | | |
|
Title:
|
METHOD AND SYSTEM FOR ENHANCING THE ENDURANCE OF MEMORY CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2005
|
Application #:
|
10690204
|
Filing Dt:
|
10/20/2003
|
|
Publication #:
|
|
Pub Dt:
|
05/06/2004
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH LOW RESISTANCE SOURCE REGIONS AND HIGH SOURCE COUPLING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2005
|
Application #:
|
10693067
|
Filing Dt:
|
10/23/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/28/2005
| | | | |
|
Title:
|
LANDING PAD FOR USE AS A CONTACT TO A CONDUCTIVE SPACER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2006
|
Application #:
|
10693285
|
Filing Dt:
|
10/23/2003
|
|
Title:
|
PROGRAMMABLE LOGIC DEVICE PARTITIONING METHOD FOR APPLICATION SPECIFIC INTEGRATED CIRCUIT PROTOTYPING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/12/2006
|
Application #:
|
10697133
|
Filing Dt:
|
10/30/2003
|
|
Publication #:
|
|
Pub Dt:
|
06/03/2004
| | | | |
|
Title:
|
CHARGE TRANSFER CAPACITIVE POSITION SENSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/2006
|
Application #:
|
10706741
|
Filing Dt:
|
11/12/2003
|
|
Publication #:
|
|
Pub Dt:
|
05/12/2005
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR HANDLING INTERRUPTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/19/2007
|
Application #:
|
10712710
|
Filing Dt:
|
11/12/2003
|
|
Title:
|
METHODS FOR EXPANSIVE NETBOOT
|
|
