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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:047540/0001   Pages: 843
Recorded: 07/13/2018
Attorney Dkt #:509265/2155
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
07/08/2008
Application #:
10984373
Filing Dt:
11/08/2004
Publication #:
Pub Dt:
06/16/2005
Title:
MEMORY SYSTEM HAVING MULTIPLE ADDRESS ALLOCATION FORMATS AND METHOD FOR USE THEREOF
2
Patent #:
Issue Dt:
08/21/2007
Application #:
10985573
Filing Dt:
11/10/2004
Publication #:
Pub Dt:
03/24/2005
Title:
INTERMEDIATE SEMICONDUCTOR DEVICE HAVING NITROGEN CONCENTRATION PROFILE
3
Patent #:
Issue Dt:
01/16/2007
Application #:
10985960
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
04/28/2005
Title:
ADVANCED BARRIER LINER FORMATION FOR VIAS
4
Patent #:
Issue Dt:
10/20/2009
Application #:
10988417
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
05/18/2006
Title:
MEMORY REUSE FOR MULTIPLE ENDPOINTS IN USB DEVICE
5
Patent #:
Issue Dt:
03/27/2007
Application #:
10989530
Filing Dt:
11/16/2004
Publication #:
Pub Dt:
03/24/2005
Title:
METHOD OF MANUFACTURING A MULTILAYERED DOPED CONDUCTOR FOR A CONTACT IN AN INTEGRATED CIRCUIT DEVICE
6
Patent #:
Issue Dt:
05/05/2009
Application #:
10989948
Filing Dt:
11/15/2004
Publication #:
Pub Dt:
05/18/2006
Title:
PROGRAMMABLE POWER TRANSITION COUNTER
7
Patent #:
Issue Dt:
09/06/2005
Application #:
10990586
Filing Dt:
11/17/2004
Publication #:
Pub Dt:
05/05/2005
Title:
MERGED MOS-BIPOLAR CAPACITOR MEMORY CELL
8
Patent #:
Issue Dt:
09/13/2005
Application #:
10990713
Filing Dt:
11/17/2004
Publication #:
Pub Dt:
03/31/2005
Title:
MERGED MOS-BIPOLAR CAPACITOR MEMORY CELL
9
Patent #:
Issue Dt:
04/18/2006
Application #:
10991876
Filing Dt:
11/18/2004
Publication #:
Pub Dt:
03/31/2005
Title:
DOUBLE DENSITY MRAM WITH PLANAR PROCESSING
10
Patent #:
Issue Dt:
08/15/2006
Application #:
10992052
Filing Dt:
11/18/2004
Title:
STATE SAVE-ON-POWER-DOWN USING GMR NON-VOLATILE ELEMENTS
11
Patent #:
Issue Dt:
03/20/2007
Application #:
10992384
Filing Dt:
11/18/2004
Publication #:
Pub Dt:
03/31/2005
Title:
METHOD OF ESTABLISHING NON-PERMANENT ELECTRICAL CONNECTION BETWEEN AN INTEGRATED CIRCUIT DEVICE LEAD ELEMENT AND A SUBSTRATE
12
Patent #:
Issue Dt:
10/09/2007
Application #:
10992424
Filing Dt:
11/18/2004
Publication #:
Pub Dt:
04/07/2005
Title:
DEVICE FOR ESTABLISHING NON-PERMANENT ELECTRICAL CONNECTION BETWEEN AN INTEGRATED CIRCUIT DEVICE LEAD ELEMENT AND A SUBSTRATE
13
Patent #:
Issue Dt:
01/23/2007
Application #:
10992984
Filing Dt:
11/19/2004
Publication #:
Pub Dt:
03/23/2006
Title:
METHODS OF FORMING MAGNETIC SHIELDING FOR A THIN-FILM MEMORY ELEMENT
14
Patent #:
Issue Dt:
09/22/2009
Application #:
10993692
Filing Dt:
11/19/2004
Title:
STORAGE CAPACITY STATUS
15
Patent #:
Issue Dt:
04/24/2007
Application #:
10994995
Filing Dt:
11/22/2004
Publication #:
Pub Dt:
04/28/2005
Title:
METHODS OF FABRICATING A VIA-IN-PAD WITH OFF-CENTER GEOMETRY
16
Patent #:
Issue Dt:
04/24/2007
Application #:
10995839
Filing Dt:
11/23/2004
Publication #:
Pub Dt:
05/25/2006
Title:
SCALABLE INTEGRATED LOGIC AND NON-VOLATILE MEMORY
17
Patent #:
Issue Dt:
12/06/2005
Application #:
10998380
Filing Dt:
11/29/2004
Publication #:
Pub Dt:
04/28/2005
Title:
METHOD FOR FABRICATING A SEMICONDUCTOR PACKAGE WITH MULTI LAYERED LEADFRAME
18
Patent #:
Issue Dt:
08/08/2006
Application #:
10999435
Filing Dt:
11/30/2004
Publication #:
Pub Dt:
04/07/2005
Title:
MULTICHIP WAFER LEVEL PACKAGES AND COMPUTING SYSTEMS INCORPORATING SAME
19
Patent #:
Issue Dt:
04/24/2007
Application #:
10999751
Filing Dt:
11/30/2004
Publication #:
Pub Dt:
06/23/2005
Title:
RESET INITIALIZATION
20
Patent #:
Issue Dt:
12/30/2008
Application #:
11000786
Filing Dt:
11/30/2004
Publication #:
Pub Dt:
05/12/2005
Title:
METHODS OF FORMING FIELD EFFECT TRANSISTOR GATE LINES
21
Patent #:
Issue Dt:
12/16/2008
Application #:
11000809
Filing Dt:
11/30/2004
Publication #:
Pub Dt:
05/19/2005
Title:
METHOD OF FORMING A FIELD EFFECT TRANSISTOR
22
Patent #:
Issue Dt:
12/25/2007
Application #:
11000825
Filing Dt:
11/30/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHOD FOR OBTAINING EXTREME SELECTIVITY OF METAL NITRIDES AND METAL OXIDES
23
Patent #:
Issue Dt:
08/30/2005
Application #:
11001145
Filing Dt:
11/30/2004
Publication #:
Pub Dt:
05/05/2005
Title:
METHOD OF FORMING FIELD EFFECT TRANSISTORS
24
Patent #:
Issue Dt:
02/12/2008
Application #:
11001306
Filing Dt:
12/02/2004
Publication #:
Pub Dt:
05/19/2005
Title:
DIFFERENTIAL NEGATIVE RESISTANCE MEMORY
25
Patent #:
Issue Dt:
04/10/2007
Application #:
11001930
Filing Dt:
12/02/2004
Publication #:
Pub Dt:
06/08/2006
Title:
INTEGRATED CIRCUIT COOLING SYSTEM AND METHOD
26
Patent #:
Issue Dt:
01/09/2007
Application #:
11003117
Filing Dt:
12/03/2004
Publication #:
Pub Dt:
06/08/2006
Title:
SKEW TOLERANT HIGH-SPEED DIGITAL PHASE DETECTOR
27
Patent #:
Issue Dt:
05/08/2007
Application #:
11003133
Filing Dt:
12/03/2004
Publication #:
Pub Dt:
06/30/2005
Title:
ELECTRICAL COUPLING STACK AND PROCESSES FOR MAKING SAME
28
Patent #:
Issue Dt:
08/12/2008
Application #:
11003138
Filing Dt:
12/03/2004
Publication #:
Pub Dt:
07/14/2005
Title:
DOPANT BARRIER FOR DOPED GLASS IN MEMORY DEVICES
29
Patent #:
Issue Dt:
10/02/2007
Application #:
11003275
Filing Dt:
12/03/2004
Publication #:
Pub Dt:
06/08/2006
Title:
METHODS OF FORMING INTEGRATED CIRCUITRY, METHODS OF FORMING MEMORY CIRCUITRY, AND METHODS OF FORMING FIELD EFFECT TRANSISTORS
30
Patent #:
Issue Dt:
04/29/2008
Application #:
11003502
Filing Dt:
12/03/2004
Publication #:
Pub Dt:
08/16/2007
Title:
METHOD AND APPARATUS FOR ERASING MEMORY
31
Patent #:
Issue Dt:
07/25/2006
Application #:
11003547
Filing Dt:
12/03/2004
Publication #:
Pub Dt:
06/08/2006
Title:
SYSTEM AND METHOD FOR REDUCING POWER CONSUMPTION DURING EXTENDED REFRESH PERIODS OF DYNAMIC RANDOM ACCESS MEMORY DEVICES
32
Patent #:
Issue Dt:
10/24/2006
Application #:
11003642
Filing Dt:
12/03/2004
Publication #:
Pub Dt:
05/12/2005
Title:
CAPACITOR CONSTRUCTIONS
33
Patent #:
Issue Dt:
02/14/2006
Application #:
11004069
Filing Dt:
12/03/2004
Publication #:
Pub Dt:
04/14/2005
Title:
NON-VOLATILE MEMORY WITH TEST ROWS FOR DISTURB DETECTION
34
Patent #:
Issue Dt:
03/20/2007
Application #:
11004454
Filing Dt:
12/03/2004
Publication #:
Pub Dt:
05/12/2005
Title:
ERASE BLOCK DATA SPLITTING
35
Patent #:
Issue Dt:
09/18/2007
Application #:
11004702
Filing Dt:
12/03/2004
Publication #:
Pub Dt:
05/12/2005
Title:
METHOD FOR IMPROVED DEPOSITION OF DIELECTRIC MATERIAL
36
Patent #:
Issue Dt:
05/30/2006
Application #:
11005712
Filing Dt:
12/07/2004
Publication #:
Pub Dt:
05/19/2005
Title:
THREE-DIMENSIONAL PHOTONIC CRYSTAL WAVEGUIDE STRUCTURE AND METHOD
37
Patent #:
Issue Dt:
03/25/2008
Application #:
11005909
Filing Dt:
12/06/2004
Publication #:
Pub Dt:
04/21/2005
Title:
NOR FLASH MEMORY CELL WITH HIGH STORAGE DENSITY
38
Patent #:
Issue Dt:
12/20/2005
Application #:
11006045
Filing Dt:
12/07/2004
Publication #:
Pub Dt:
04/21/2005
Title:
APPARATUS AND METHOD FOR DYNAMICALLY REPAIRING A SEMICONDUCTOR MEMORY
39
Patent #:
Issue Dt:
09/26/2006
Application #:
11006312
Filing Dt:
12/06/2004
Publication #:
Pub Dt:
04/21/2005
Title:
NOR FLASH MEMORY CELL WITH HIGH STORAGE DENSITY
40
Patent #:
Issue Dt:
08/28/2007
Application #:
11006364
Filing Dt:
12/07/2004
Publication #:
Pub Dt:
06/08/2006
Title:
CURRENT DIFFERENTIAL BUFFER
41
Patent #:
Issue Dt:
02/13/2007
Application #:
11007138
Filing Dt:
12/07/2004
Publication #:
Pub Dt:
09/15/2005
Title:
INTERCONNECTING CONDUCTIVE LAYERS OF MEMORY DEVICES
42
Patent #:
Issue Dt:
02/12/2008
Application #:
11008586
Filing Dt:
12/09/2004
Publication #:
Pub Dt:
03/16/2006
Title:
METHOD AND APPARATUS FOR A CONTINUOUS READ COMMAND IN AN EXTENDED MEMORY ARRAY
43
Patent #:
Issue Dt:
10/30/2007
Application #:
11008588
Filing Dt:
12/09/2004
Publication #:
Pub Dt:
03/16/2006
Title:
SERIAL MEMORY COMPRISING MEANS FOR PROTECTING AN EXTENDED MEMORY ARRAY DURING A WRITE OPERATION
44
Patent #:
Issue Dt:
09/18/2007
Application #:
11009665
Filing Dt:
12/10/2004
Publication #:
Pub Dt:
06/15/2006
Title:
TRENCH INSULATION STRUCTURES INCLUDING AN OXIDE LINER THAT IS THINNER ALONG THE WALLS OF THE TRENCH THAN ALONG THE BASE
45
Patent #:
Issue Dt:
10/30/2007
Application #:
11009687
Filing Dt:
12/10/2004
Publication #:
Pub Dt:
08/25/2005
Title:
METHOD FOR REDUCING DEFECTS AFTER A METAL ETCHING IN SEMICONDUCTOR DEVICES
46
Patent #:
Issue Dt:
06/26/2007
Application #:
11010529
Filing Dt:
12/13/2004
Publication #:
Pub Dt:
06/15/2006
Title:
LANTHANUM HAFNIUM OXIDE DIELECTRICS
47
Patent #:
Issue Dt:
11/01/2005
Application #:
11010671
Filing Dt:
12/13/2004
Publication #:
Pub Dt:
05/12/2005
Title:
MAGNETIC NON-VOLATILE MEMORY COIL LAYOUT ARCHITECTURE AND PROCESS INTEGRATION SCHEME
48
Patent #:
Issue Dt:
04/03/2007
Application #:
11010752
Filing Dt:
12/13/2004
Publication #:
Pub Dt:
06/15/2006
Title:
METHODS OF REDUCING FLOATING BODY EFFECT
49
Patent #:
Issue Dt:
10/02/2007
Application #:
11010951
Filing Dt:
12/13/2004
Publication #:
Pub Dt:
06/08/2006
Title:
ANNULAR GATE AND TECHNIQUE FOR FABRICATING AN ANNULAR GATE
50
Patent #:
Issue Dt:
05/06/2008
Application #:
11012533
Filing Dt:
12/15/2004
Publication #:
Pub Dt:
06/23/2005
Title:
VOLTAGE TRANSLATING CONTROL STRUCTURE
51
Patent #:
Issue Dt:
03/25/2008
Application #:
11012584
Filing Dt:
12/14/2004
Publication #:
Pub Dt:
05/05/2005
Title:
APPARATUS AND METHOD FOR DEPOSITING AND REFLOWING SOLDER PASTE ON A MICROELECTRONIC WORKPIECE
52
Patent #:
Issue Dt:
08/12/2008
Application #:
11012693
Filing Dt:
12/15/2004
Publication #:
Pub Dt:
06/23/2005
Title:
RESET RAMP CONTROL
53
Patent #:
Issue Dt:
10/02/2007
Application #:
11012712
Filing Dt:
12/15/2004
Publication #:
Pub Dt:
06/23/2005
Title:
RESET CIRCUIT
54
Patent #:
Issue Dt:
02/19/2008
Application #:
11013123
Filing Dt:
12/15/2004
Publication #:
Pub Dt:
06/23/2005
Title:
ESD BONDING PAD
55
Patent #:
Issue Dt:
06/05/2007
Application #:
11013210
Filing Dt:
12/14/2004
Publication #:
Pub Dt:
07/28/2005
Title:
LIGHTLY DOPED DRAIN MOS TRANSISTOR
56
Patent #:
Issue Dt:
08/30/2005
Application #:
11013377
Filing Dt:
12/17/2004
Publication #:
Pub Dt:
05/12/2005
Title:
SILICON-ON-INSULATOR COMPRISING INTEGRATED CIRCUITRY
57
Patent #:
Issue Dt:
09/23/2008
Application #:
11013487
Filing Dt:
12/16/2004
Publication #:
Pub Dt:
05/19/2005
Title:
SEMICONDUCTOR/PRINTED CIRCUIT BOARD ASSEMBLY, AND COMPUTER SYSTEM
58
Patent #:
Issue Dt:
12/05/2006
Application #:
11015703
Filing Dt:
12/17/2004
Publication #:
Pub Dt:
05/12/2005
Title:
REDUCED POWER REDUNDANCY ADDRESS DECODER AND COMPARISON CIRCUIT
59
Patent #:
Issue Dt:
03/31/2009
Application #:
11015967
Filing Dt:
12/17/2004
Title:
METHOD AND APPARATUS FOR PROVIDING A CONNECTION MATRIX
60
Patent #:
Issue Dt:
10/13/2009
Application #:
11016197
Filing Dt:
12/17/2004
Publication #:
Pub Dt:
06/22/2006
Title:
CASCADED CONNECTION MATRICES IN A DISTRIBUTED CROSS-CONNECTION SYSTEM
61
Patent #:
Issue Dt:
05/20/2008
Application #:
11018366
Filing Dt:
12/22/2004
Publication #:
Pub Dt:
06/22/2006
Title:
SMALL ELECTRODE FOR RESISTANCE VARIABLE DEVICES
62
Patent #:
Issue Dt:
12/12/2006
Application #:
11018580
Filing Dt:
12/21/2004
Publication #:
Pub Dt:
05/26/2005
Title:
BOOSTED SUBSTRATE/TUB PROGRAMMING FOR FLASH MEMORIES
63
Patent #:
Issue Dt:
04/11/2006
Application #:
11018810
Filing Dt:
12/21/2004
Publication #:
Pub Dt:
05/12/2005
Title:
DUTY CYCLE DISTORTION COMPENSATION FOR THE DATA OUTPUT OF A MEMORY DEVICE
64
Patent #:
Issue Dt:
01/02/2007
Application #:
11018848
Filing Dt:
12/20/2004
Publication #:
Pub Dt:
06/23/2005
Title:
SEMICONDUCTOR CONSTRUCTIONS
65
Patent #:
Issue Dt:
06/12/2007
Application #:
11020757
Filing Dt:
12/23/2004
Publication #:
Pub Dt:
06/29/2006
Title:
LOW VOLTAGE CMOS DIFFERENTIAL AMPLIFIER
66
Patent #:
Issue Dt:
02/20/2007
Application #:
11021175
Filing Dt:
12/23/2004
Publication #:
Pub Dt:
05/19/2005
Title:
TECHNIQUES FOR PACKAGING MULTIPLE DEVICE COMPONENTS
67
Patent #:
Issue Dt:
02/12/2008
Application #:
11021639
Filing Dt:
12/22/2004
Publication #:
Pub Dt:
03/02/2006
Title:
DOUBLE-SIDED CONTAINER CAPACITORS USING A SACRIFICIAL LAYER
68
Patent #:
Issue Dt:
03/17/2009
Application #:
11022212
Filing Dt:
12/23/2004
Publication #:
Pub Dt:
06/29/2006
Title:
SCALABLE TRACEBACK TECHNIQUE FOR CHANNEL DECODER
69
Patent #:
Issue Dt:
06/29/2010
Application #:
11023719
Filing Dt:
12/28/2004
Publication #:
Pub Dt:
06/09/2005
Title:
METHOD OF FABRICATING MEMORY TRANSISTOR
70
Patent #:
Issue Dt:
01/23/2007
Application #:
11024106
Filing Dt:
12/28/2004
Publication #:
Pub Dt:
07/14/2005
Title:
ETCH STOP LAYER IN POLY-METAL STRUCTURES
71
Patent #:
Issue Dt:
11/06/2012
Application #:
11024956
Filing Dt:
12/29/2004
Publication #:
Pub Dt:
07/20/2006
Title:
SYSTEMS AND METHODS FOR EFFICIENT OPERATIONS OF COMPONENTS IN A WIRELESS COMMUNICATIONS DEVICE
72
Patent #:
Issue Dt:
09/01/2009
Application #:
11025420
Filing Dt:
12/28/2004
Publication #:
Pub Dt:
07/13/2006
Title:
TECHNIQUES FOR TRANSMITTING AND RECEIVING TRAFFIC OVER ADVANCED SWITCHING COMPATIBLE SWITCH FABRICS
73
Patent #:
Issue Dt:
06/03/2008
Application #:
11025913
Filing Dt:
01/03/2005
Publication #:
Pub Dt:
06/09/2005
Title:
SELF-ALIGNED, LOW-RESISTANCE, EFFICIENT MEMORY ARRAY
74
Patent #:
Issue Dt:
03/13/2007
Application #:
11025960
Filing Dt:
01/03/2005
Publication #:
Pub Dt:
05/26/2005
Title:
WELL FOR CMOS IMAGER
75
Patent #:
Issue Dt:
10/03/2006
Application #:
11027343
Filing Dt:
12/30/2004
Publication #:
Pub Dt:
07/06/2006
Title:
SYNCHRONOUS CLOCK GENERATOR INCLUDING DUTY CYCLE CORRECTION
76
Patent #:
Issue Dt:
09/18/2007
Application #:
11027443
Filing Dt:
12/30/2004
Publication #:
Pub Dt:
07/06/2006
Title:
METHODS FOR FORMING INTERCONNECTS IN MICROELECTRONIC WORKPIECES AND MICROELECTRONIC WORKPIECES FORMED USING SUCH METHODS
77
Patent #:
Issue Dt:
08/12/2008
Application #:
11027784
Filing Dt:
12/30/2004
Publication #:
Pub Dt:
07/06/2006
Title:
SECURE MEMORY CONTROLLER
78
Patent #:
Issue Dt:
03/08/2011
Application #:
11027913
Filing Dt:
12/28/2004
Publication #:
Pub Dt:
06/29/2006
Title:
SECURE CONTROLLER FOR BLOCK ORIENTED STORAGE
79
Patent #:
Issue Dt:
09/11/2007
Application #:
11028090
Filing Dt:
01/03/2005
Publication #:
Pub Dt:
06/02/2005
Title:
APPARATUS FOR IMPROVING STABILITY AND LOCK TIME FOR SYNCHRONOUS CIRCUITS
80
Patent #:
Issue Dt:
10/09/2007
Application #:
11028361
Filing Dt:
01/03/2005
Publication #:
Pub Dt:
05/26/2005
Title:
MODULE ASSEMBLY AND METHOD FOR STACKED BGA PACKAGES
81
Patent #:
Issue Dt:
02/03/2009
Application #:
11028374
Filing Dt:
01/03/2005
Publication #:
Pub Dt:
06/02/2005
Title:
METHOD OF MAKING MULTICHIP WAFER LEVEL PACKAGES AND COMPUTING SYSTEMS INCORPORATING SAME
82
Patent #:
Issue Dt:
03/13/2007
Application #:
11028892
Filing Dt:
01/03/2005
Publication #:
Pub Dt:
08/25/2005
Title:
METHODS OF FABRICATING INTERCONNECTS INCLUDING DEPOSITING A FIRST MATERIAL IN THE INTERCONNECT WITH A THICKNESS OF ANGSTROMS AND A LOW TEMPERATURE FOR SEMICONDUCTOR COMPONENTS
83
Patent #:
Issue Dt:
07/04/2006
Application #:
11028918
Filing Dt:
01/03/2005
Publication #:
Pub Dt:
08/25/2005
Title:
METHODS OF FABRICATING INTERCONNECTS FOR SEMICONDUCTOR COMPONENTS INCLUDING A THROUGH HOLE ENTIRELY THROUGH THE COMPONENT AND FORMING A METAL NITRIDE INCLUDING SEPARATE PRECURSOR CYCLES
84
Patent #:
Issue Dt:
07/14/2009
Application #:
11029757
Filing Dt:
01/05/2005
Publication #:
Pub Dt:
07/06/2006
Title:
ATOMIC LAYER DEPOSITED HAFNIUM TANTALUM OXIDE DIELECTRICS
85
Patent #:
Issue Dt:
08/21/2007
Application #:
11029981
Filing Dt:
01/05/2005
Publication #:
Pub Dt:
07/06/2006
Title:
READING PHASE CHANGE MEMORIES TO REDUCE READ DISTURBS
86
Patent #:
Issue Dt:
01/22/2008
Application #:
11030696
Filing Dt:
01/06/2005
Publication #:
Pub Dt:
06/02/2005
Title:
SEMICONDUCTOR DEVICE PRECURSOR STRUCTURES TO A DOUBLE-SIDED CAPACITOR OR A CONTACT
87
Patent #:
Issue Dt:
01/01/2008
Application #:
11030772
Filing Dt:
01/06/2005
Publication #:
Pub Dt:
07/07/2005
Title:
METHOD FOR FABRICATING A SEMICONDUCTOR INTERCONNECT HAVING CONDUCTIVE SPRING CONTACTS
88
Patent #:
Issue Dt:
09/27/2005
Application #:
11031265
Filing Dt:
01/07/2005
Publication #:
Pub Dt:
06/16/2005
Title:
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
89
Patent #:
Issue Dt:
10/21/2008
Application #:
11031289
Filing Dt:
01/07/2005
Publication #:
Pub Dt:
06/09/2005
Title:
LANTHANIDE DOPED TIOX DIELECTRIC FILMS BY PLASMA OXIDATION
90
Patent #:
Issue Dt:
05/02/2006
Application #:
11031961
Filing Dt:
01/07/2005
Publication #:
Pub Dt:
08/25/2005
Title:
PULSED WRITE TECHNIQUES FOR MAGNETO-RESISTIVE MEMORIES
91
Patent #:
Issue Dt:
10/16/2007
Application #:
11032975
Filing Dt:
01/10/2005
Publication #:
Pub Dt:
07/13/2006
Title:
INTERCONNECT STRUCTURES WITH BOND-PADS AND METHODS OF FORMING BUMP SITES ON BOND-PADS
92
Patent #:
Issue Dt:
10/30/2007
Application #:
11033525
Filing Dt:
01/12/2005
Publication #:
Pub Dt:
06/09/2005
Title:
REVERSE METAL PROCESS FOR CREATING A METAL SILICIDE TRANSISTOR GATE STRUCTURE
93
Patent #:
Issue Dt:
01/01/2008
Application #:
11033873
Filing Dt:
01/13/2005
Publication #:
Pub Dt:
06/23/2005
Title:
METHODS OF OPERATING AND FORMING CHALCOGENIDE GLASS CONSTANT CURRENT DEVICES
94
Patent #:
Issue Dt:
08/04/2009
Application #:
11034165
Filing Dt:
01/12/2005
Publication #:
Pub Dt:
05/26/2005
Title:
CMOS IMAGER WITH INTEGRATED NON-VOLATILE MEMORY
95
Patent #:
Issue Dt:
10/18/2011
Application #:
11034751
Filing Dt:
01/14/2005
Publication #:
Pub Dt:
07/07/2005
Title:
METHOD OF FORMING HIGH GAIN, LOW NOISE, PHOTODIODE SENSOR FOR IMAGE SENSORS
96
Patent #:
Issue Dt:
04/22/2008
Application #:
11035013
Filing Dt:
01/13/2005
Publication #:
Pub Dt:
07/13/2006
Title:
OPTIMIZING WRITE/ERASE OPERATIONS IN MEMORY DEVICES
97
Patent #:
Issue Dt:
05/12/2009
Application #:
11035298
Filing Dt:
01/12/2005
Publication #:
Pub Dt:
03/09/2006
Title:
METHODS OF FORMING A LAYER COMPRISING EPITAXIAL SILICON, AND METHODS OF FORMING FIELD EFFECT TRANSISTORS
98
Patent #:
Issue Dt:
06/12/2007
Application #:
11036163
Filing Dt:
01/14/2005
Publication #:
Pub Dt:
07/20/2006
Title:
MEMORY ARRAY BURIED DIGIT LINE
99
Patent #:
Issue Dt:
11/25/2008
Application #:
11036179
Filing Dt:
01/14/2005
Publication #:
Pub Dt:
07/20/2006
Title:
CONTROLLING OPERATION OF FLASH MEMORIES
100
Patent #:
Issue Dt:
09/30/2008
Application #:
11036296
Filing Dt:
01/14/2005
Publication #:
Pub Dt:
07/21/2005
Title:
LOW-TEMPERATURE GROWN HIGH QUALITY ULTRA-THIN COTIO3 GATE DIELECTRICS
Assignors
1
Exec Dt:
07/03/2018
2
Exec Dt:
07/03/2018
Assignee
1
10 S. DEARBORN
7TH FLOOR
CHICAGO, ILLINOIS 60603
Correspondence name and address
MARCELA ROBLEDO
2475 HANOVER STREET
PALO ALTO, CA 94304

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