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06/03/2003
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09945308
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08/30/2001
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03/13/2003
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11/22/2005
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09945309
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08/30/2001
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03/06/2003
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12/16/2003
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08/30/2001
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03/06/2003
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01/06/2004
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09945315
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08/30/2001
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06/20/2002
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01/14/2003
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09945331
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08/31/2001
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08/03/2004
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09945337
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08/31/2001
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03/06/2003
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06/24/2003
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09945380
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08/31/2001
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03/06/2003
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06/22/2004
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08/30/2001
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03/06/2003
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DRAM CELLS WITH REPRESSED FLOATING GATE MEMORY, LOW TUNNEL BARRIER INTERPOLY INSULATORS
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05/04/2004
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09945398
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08/30/2001
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02/21/2002
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03/01/2005
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09945491
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08/30/2001
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01/24/2002
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ANTIFUSE STRUCTURES, METHODS, AND APPLICATIONS
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10/05/2004
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09945495
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08/30/2001
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03/06/2003
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VERTICAL TRANSISTORS, ELECTRICAL DEVICES CONTAINING A VERTICAL TRANSISTOR, AND COMPUTER SYSTEMS CONTAINING A VERTICAL TRANSISTOR
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08/17/2004
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08/30/2001
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03/06/2003
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07/11/2006
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09945500
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08/30/2001
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03/06/2003
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06/27/2006
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08/30/2001
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03/06/2003
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FLASH MEMORY WITH LOW TUNNEL BARRIER INTERPOLY INSULATORS
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05/07/2002
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08/30/2001
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06/10/2003
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09945511
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08/30/2001
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02/28/2002
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08/08/2006
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08/30/2001
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03/06/2003
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01/14/2003
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08/30/2001
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04/25/2002
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07/01/2003
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08/30/2001
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03/13/2003
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09/27/2011
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08/30/2001
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03/06/2003
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04/15/2008
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08/30/2001
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04/17/2003
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06/10/2003
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08/30/2001
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03/13/2003
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03/03/2009
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09/04/2001
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01/17/2002
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12/09/2003
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09/04/2001
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02/28/2002
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MICROELECTRONIC ASSEMBLY WITH PRE-DISPOSED FILL MATERIAL AND ASSOCIATED METHOD OF MANUFACTURE
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05/10/2005
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09/05/2001
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04/17/2003
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07/01/2003
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09/07/2001
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01/17/2002
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05/20/2003
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09/06/2001
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05/09/2002
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07/01/2003
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09/07/2001
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03/13/2003
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10/21/2003
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09/07/2001
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01/17/2002
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06/07/2005
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09/10/2001
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03/14/2002
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01/27/2004
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09/12/2001
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02/14/2002
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04/24/2007
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09/12/2001
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04/25/2002
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11/25/2003
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09/12/2001
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01/17/2002
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09/14/2001
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03/20/2003
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03/25/2003
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01/24/2002
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09/21/2004
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09/14/2001
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02/07/2002
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02/25/2003
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09/12/2001
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06/13/2002
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05/13/2003
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09/13/2001
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05/16/2002
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02/01/2005
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09/17/2001
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03/20/2003
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10/28/2003
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09/17/2001
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06/06/2002
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03/01/2005
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09/17/2001
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03/20/2003
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07/29/2003
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09/14/2001
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04/18/2002
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01/08/2008
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03/13/2003
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09/03/2002
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09/17/2001
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02/14/2002
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02/25/2003
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09/11/2001
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03/13/2003
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11/12/2002
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09/10/2001
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02/14/2002
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08/13/2002
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09/19/2001
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03/14/2002
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SEMICONDUCTOR MEMORY HAVING MULTIPLE REDUNDANT COLUMNS WITH OFFSET SEGMENTATION BOUNDARIES
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03/15/2005
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09/18/2001
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03/21/2002
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11/04/2003
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09/18/2001
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03/20/2003
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VARIABLE LEVEL MEMORY
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09/09/2003
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09/18/2001
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02/28/2002
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01/13/2004
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09/19/2001
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05/02/2002
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MICROELECTRONIC DEVICES AND MICROELECTRONIC DIE PACKAGES
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12/16/2003
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09/19/2001
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04/25/2002
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11/25/2003
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09/19/2001
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02/07/2002
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METHOD AND APPARATUS FOR PACKAGING A MICROELECTRONIC DIE
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06/24/2003
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09/18/2001
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02/21/2002
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PASSIVATION LAYER FOR PACKAGED INTEGRATED CIRCUITS
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01/27/2004
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09/19/2001
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05/02/2002
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METHOD AND APPARATUS FOR PACKAGING A MICROELECTRONIC DIE
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10/25/2005
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09/18/2001
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02/14/2002
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09/19/2006
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09/20/2001
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03/20/2003
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ELECTRO-AND ELECTROLESS PLATING OF METAL IN THE MANUFACTURE OF PCRAM DEVICES
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11/19/2002
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09/21/2001
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01/24/2002
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Title:
|
VOLTAGE PUMP WITH DIODE FOR PRE-CHARGE
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Patent #:
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Issue Dt:
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01/25/2005
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Application #:
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09960089
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Filing Dt:
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09/21/2001
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Publication #:
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Pub Dt:
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03/27/2003
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Title:
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BUMPING TECHNOLOGY IN STACKED DIE CONFIGURATIONS
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09960119
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Filing Dt:
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09/21/2001
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Publication #:
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Pub Dt:
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02/14/2002
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Title:
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METHODS OF FORMING INTEGRATED CIRCUITRY.
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Patent #:
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Issue Dt:
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09/23/2003
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Application #:
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09960254
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Filing Dt:
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09/20/2001
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Publication #:
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Pub Dt:
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04/11/2002
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Title:
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LATERAL DMOS TRANSISTOR WITH FIRST AND SECOND DRAIN ELECTRODES IN RESPECTIVE CONTACT WITH HIGH-AND LOW-CONCENTRATION PORTIONS OF A DRAIN REGION
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Patent #:
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Issue Dt:
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10/29/2002
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Application #:
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09960818
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Filing Dt:
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09/21/2001
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Publication #:
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Pub Dt:
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01/31/2002
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Title:
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BUFFER LAYER IN FLAT PANEL DISPLAY
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Patent #:
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Issue Dt:
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01/07/2003
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Application #:
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09960851
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Filing Dt:
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09/21/2001
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Publication #:
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Pub Dt:
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07/25/2002
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Title:
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CONTROL CIRCUIT FOR A VARIABLE-VOLTAGE REGULATOR OF A NONVOLATILE MEMORY WITH HIERARCHICAL ROW DECODING
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Patent #:
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Issue Dt:
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07/24/2007
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Application #:
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09960912
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Filing Dt:
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09/21/2001
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Publication #:
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Pub Dt:
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09/04/2003
| | | | |
Title:
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BUFFER LAYER IN FLAT PANEL DISPLAY
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Patent #:
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Issue Dt:
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08/31/2004
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Application #:
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09960945
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Filing Dt:
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09/25/2001
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Publication #:
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Pub Dt:
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05/23/2002
| | | | |
Title:
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DIE ATTACH CURING METHOD FOR SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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05/17/2005
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Application #:
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09961624
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Filing Dt:
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09/24/2001
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Publication #:
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Pub Dt:
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06/13/2002
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Title:
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METHOD AND APPARATUS FOR INCREASING CHEMICAL-MECHANICAL-POLISHING SELECTIVITY
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Patent #:
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Issue Dt:
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11/14/2006
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Application #:
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09963177
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Filing Dt:
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09/25/2001
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Publication #:
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Pub Dt:
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03/27/2003
| | | | |
Title:
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PROBABALISTIC NETWORKS FOR DETECTING SIGNAL CONTENT
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Patent #:
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Issue Dt:
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06/17/2003
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Application #:
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09963291
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Filing Dt:
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09/25/2001
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Publication #:
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Pub Dt:
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01/24/2002
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Title:
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METHOD AND APPARATUS FOR CONTROLLING CHEMICAL INTERACTIONS DURING PLANARIZATION OF MICROELECTRONIC SUBSTRATES
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Patent #:
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Issue Dt:
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04/08/2003
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Application #:
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09964110
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Filing Dt:
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09/25/2001
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Publication #:
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Pub Dt:
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03/27/2003
| | | | |
Title:
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ANTIFUSE PROGRAMMING CURRENT LIMITER
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Patent #:
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Issue Dt:
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11/16/2004
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Application #:
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09964113
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Filing Dt:
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09/25/2001
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Publication #:
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Pub Dt:
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03/07/2002
| | | | |
Title:
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METHOD AND APPARATUS FOR DATA COMPRESSION IN MEMORY DEVICES
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Patent #:
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Issue Dt:
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08/06/2002
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Application #:
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09964134
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Filing Dt:
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09/25/2001
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Publication #:
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Pub Dt:
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01/24/2002
| | | | |
Title:
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DIE ARCHITECTURE ACCOMMODATING HIGH-SPEED SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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10/05/2004
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Application #:
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09964747
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Filing Dt:
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09/28/2001
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Publication #:
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Pub Dt:
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04/03/2003
| | | | |
Title:
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EXTENSION MECHANISM AND METHOD FOR ASSEMBLING OVERHANGING COMPONENTS
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Patent #:
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Issue Dt:
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08/05/2003
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Application #:
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09965209
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Filing Dt:
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09/26/2001
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Publication #:
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Pub Dt:
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03/27/2003
| | | | |
Title:
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REDUCED CURRENT ADDRESS SELECTION CIRCUIT AND METHOD
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Patent #:
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Issue Dt:
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03/27/2007
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Application #:
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09965223
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Filing Dt:
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09/28/2001
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Publication #:
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Pub Dt:
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04/03/2003
| | | | |
Title:
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GLOBAL I/O TIMING ADJUSTMENT USING CALIBRATED DELAY ELEMENTS
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Patent #:
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Issue Dt:
|
06/03/2003
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Application #:
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09965627
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Filing Dt:
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09/28/2001
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Publication #:
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Pub Dt:
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04/03/2003
| | | | |
Title:
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DIGITAL UPDATE SCHEME FOR ADAPTIVE IMPEDANCE CONTROL OF ON-DIE INPUT/OUTPUT CIRCUITS
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Patent #:
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Issue Dt:
|
09/23/2003
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Application #:
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09966014
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Filing Dt:
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09/27/2001
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Publication #:
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Pub Dt:
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03/27/2003
| | | | |
Title:
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WRITE-ONCE POLYMER MEMORY WITH E-BEAM WRITING AND READING
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Patent #:
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Issue Dt:
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12/02/2003
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Application #:
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09966699
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Filing Dt:
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09/27/2001
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Publication #:
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Pub Dt:
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03/27/2003
| | | | |
Title:
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METHODS OF FORMING MAGNETORESISTIVE DEVICES
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Patent #:
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Issue Dt:
|
01/06/2004
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Application #:
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09967060
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Filing Dt:
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09/28/2001
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Publication #:
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Pub Dt:
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04/03/2003
| | | | |
Title:
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A ZERO INSERTION FORCE CONNECTOR FOR SUBSTRATES WITH EDGE CONTACTS
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|
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Patent #:
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Issue Dt:
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12/09/2003
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Application #:
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09967180
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Filing Dt:
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09/28/2001
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Publication #:
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Pub Dt:
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04/03/2003
| | | | |
Title:
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RELEASING FUNCTIONAL BLOCKS IN RESPONSE TO A DETERMINATION OF A SUPPLY VOLTAGE PREDETERMINED LEVEL AND A LOGIC PREDETERMINED INITIAL STATE
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|
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Patent #:
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Issue Dt:
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02/08/2005
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Application #:
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09967367
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Filing Dt:
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09/28/2001
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Publication #:
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Pub Dt:
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07/17/2003
| | | | |
Title:
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SOFTWARE CALL CONTROL AGENT
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|
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Patent #:
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Issue Dt:
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12/11/2007
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Application #:
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09968278
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Filing Dt:
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09/28/2001
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Publication #:
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Pub Dt:
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04/03/2003
| | | | |
Title:
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DUAL-TARGET BLOCK REGISTER ALLOCATION
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Patent #:
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Issue Dt:
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11/25/2003
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Application #:
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09969464
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Filing Dt:
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10/01/2001
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Publication #:
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Pub Dt:
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02/07/2002
| | | | |
Title:
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METHOD AND STRUCTURE FOR AN OXIDE LAYER OVERLYING AN OXIDATION-RESISTANT LAYER
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Patent #:
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Issue Dt:
|
05/10/2005
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Application #:
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09970100
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Filing Dt:
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10/02/2001
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Publication #:
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Pub Dt:
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02/14/2002
| | | | |
Title:
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POLISHING PADS AND PLANARIZING MACHINES FOR MECHANICAL OR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC-DEVICE SUBSTRATE ASSEMBLIES, AND METHODS FOR MAKING AND USING SUCH PADS AND MACHINES
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Patent #:
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Issue Dt:
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06/01/2004
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Application #:
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09970275
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Filing Dt:
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10/02/2001
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Publication #:
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Pub Dt:
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02/07/2002
| | | | |
Title:
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METHODS OF PACKAGING AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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04/10/2007
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Application #:
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09970485
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Filing Dt:
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10/03/2001
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Publication #:
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Pub Dt:
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04/03/2003
| | | | |
Title:
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REMOVING REDUNDANT INFORMATION IN HYBRID BRANCH PREDICTION
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Patent #:
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Issue Dt:
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03/02/2004
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Application #:
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09971250
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Filing Dt:
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10/04/2001
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Publication #:
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Pub Dt:
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04/10/2003
| | | | |
Title:
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ETCH STOP LAYER IN POLY-METAL STRUCTURES
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Patent #:
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Issue Dt:
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12/02/2003
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Application #:
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09971758
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Filing Dt:
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10/04/2001
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Publication #:
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Pub Dt:
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04/10/2003
| | | | |
Title:
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METHODS OF MAKING MAGNETORESISTIVE MEMORY DEVICES
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Patent #:
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Issue Dt:
|
09/07/2004
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Application #:
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09971841
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Filing Dt:
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10/04/2001
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Publication #:
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Pub Dt:
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04/10/2003
| | | | |
Title:
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EMBEDDED DRAM CACHE MEMORY AND METHOD HAVING REDUCED LATENCY
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Patent #:
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Issue Dt:
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08/24/2004
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Application #:
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09971851
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Filing Dt:
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10/04/2001
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Publication #:
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Pub Dt:
|
03/14/2002
| | | | |
Title:
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SEMICONDUCTOR PACKAGES AND METHODS FOR MAKING THE SAME
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Patent #:
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Issue Dt:
|
12/09/2003
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Application #:
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09971945
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Filing Dt:
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10/04/2001
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Publication #:
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Pub Dt:
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02/14/2002
| | | | |
Title:
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METHOD OF FORMING HAZE- FREE BST FILMS
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Patent #:
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Issue Dt:
|
02/22/2005
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Application #:
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09971952
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Filing Dt:
|
10/04/2001
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Publication #:
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Pub Dt:
|
02/21/2002
| | | | |
Title:
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SEMICONDUCTOR PACKAGES AND METHODS FOR MAKING THE SAME
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Patent #:
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Issue Dt:
|
02/15/2005
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Application #:
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09971955
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Filing Dt:
|
10/04/2001
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Publication #:
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Pub Dt:
|
03/21/2002
| | | | |
Title:
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HAZE-FREE BST FILMS
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Patent #:
|
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Issue Dt:
|
03/04/2003
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Application #:
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09972266
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Filing Dt:
|
10/09/2001
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Title:
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METHOD FOR FABRICATING AN INTERCONNECT FOR MAKING TEMPORARY ELECTRICAL CONNECTIONS TO SEMICONDUCTOR COMPONENTS
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Patent #:
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Issue Dt:
|
02/04/2003
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Application #:
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09972426
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Filing Dt:
|
10/05/2001
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Title:
|
FLASH MEMORY DEVICE WITH A VARIABLE ERASE PULSE
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Patent #:
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Issue Dt:
|
01/18/2005
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Application #:
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09972649
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Filing Dt:
|
10/10/2001
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Publication #:
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Pub Dt:
|
09/12/2002
| | | | |
Title:
|
DIE SUPPORT STRUCTURE
|
|
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Patent #:
|
|
Issue Dt:
|
04/01/2003
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Application #:
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09972726
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Filing Dt:
|
10/04/2001
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Publication #:
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Pub Dt:
|
04/25/2002
| | | | |
Title:
|
SMALL SIZE, LOW CONSUMPTION, MULTILEVEL NONVOLATILE MEMORY
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|
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Patent #:
|
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Issue Dt:
|
04/15/2003
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Application #:
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09972753
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Filing Dt:
|
10/05/2001
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Publication #:
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Pub Dt:
|
06/06/2002
| | | | |
Title:
|
CONTROL AND TIMING STRUCTURE FOR A MEMORY
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|
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Patent #:
|
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Issue Dt:
|
06/17/2003
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Application #:
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09972769
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Filing Dt:
|
10/05/2001
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Publication #:
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Pub Dt:
|
06/06/2002
| | | | |
Title:
|
SEMICONDUCTOR MEMORY ARCHITECTURE
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|
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Patent #:
|
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Issue Dt:
|
01/27/2004
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Application #:
|
09973527
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Filing Dt:
|
10/09/2001
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Publication #:
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Pub Dt:
|
04/17/2003
| | | | |
Title:
|
SYSTEM AND METHOD OF TESTING NON-VOLATILE MEMORY CELLS
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|
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Patent #:
|
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Issue Dt:
|
12/23/2003
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Application #:
|
09973860
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Filing Dt:
|
10/11/2001
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Publication #:
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Pub Dt:
|
04/17/2003
| | | | |
Title:
|
HIGH SPEED MEMORY ARCHITECTURE
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|