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Reel/Frame:	051028/0001			Pages:	834
		Recorded:	11/12/2019
Attorney Dkt #:	4816.244
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 16529
Page 54 of 166
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Patent #:	7307896	Issue Dt:	12/11/2007	Application #:	11078764	Filing Dt:	03/11/2005
Publication #:	US20060203599	Pub Dt:	09/14/2006
Title:	DETECTION OF ROW-TO-ROW SHORTS AND OTHER ROW DECODE DEFECTS IN MEMORY DEVICES

Patent #:	7187581	Issue Dt:	03/06/2007	Application #:	11079590	Filing Dt:	03/14/2005
Publication #:	US20050157580	Pub Dt:	07/21/2005
Title:	SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING SAME

Patent #:	7428284	Issue Dt:	09/23/2008	Application #:	11080105	Filing Dt:	03/14/2005
Publication #:	US20060203948	Pub Dt:	09/14/2006
Title:	PHASE DETECTOR AND METHOD PROVIDING RAPID LOCKING OF DELAY-LOCK LOOPS

Patent #:	7424634	Issue Dt:	09/09/2008	Application #:	11080236	Filing Dt:	03/14/2005
Publication #:	US20060224342	Pub Dt:	10/05/2006
Title:	SYSTEM AND METHOD FOR REDUCING JITTER OF SIGNALS COUPLED THROUGH ADJACENT SIGNAL LINES

Patent #:	7200047	Issue Dt:	04/03/2007	Application #:	11080351	Filing Dt:	03/14/2005
Publication #:	US20050201161	Pub Dt:	09/15/2005
Title:	HIGH VOLTAGE POSITIVE AND NEGATIVE TWO-PHASE DISCHARGE SYSTEM AND METHOD FOR CHANNEL ERASE IN FLASH MEMORY DEVICES

Patent #:	7217974	Issue Dt:	05/15/2007	Application #:	11080443	Filing Dt:	03/16/2005
Publication #:	US20050156230	Pub Dt:	07/21/2005
Title:	OUTPUT PREDICTION LOGIC CIRCUITS WITH ULTRA-THIN VERTICAL TRANSISTORS AND METHODS OF FORMATION

Patent #:	7247520	Issue Dt:	07/24/2007	Application #:	11081236	Filing Dt:	03/15/2005
Publication #:	US20050156300	Pub Dt:	07/21/2005
Title:	MICROELECTRONIC COMPONENT ASSEMBLIES AND MICROELECTRONIC COMPONENT LEAD FRAME STRUCTURES

Patent #:	7422948	Issue Dt:	09/09/2008	Application #:	11081336	Filing Dt:	03/16/2005
Publication #:	US20050181565	Pub Dt:	08/18/2005
Title:	THRESHOLD VOLTAGE ADJUSTMENT FOR LONG CHANNEL TRANSISTORS

Patent #:	7244678	Issue Dt:	07/17/2007	Application #:	11081413	Filing Dt:	03/16/2005
Publication #:	US20050159086	Pub Dt:	07/21/2005
Title:	METHODS FOR PLANARIZATION OF GROUP VIII METAL-CONTAINING SURFACES USING COMPLEXING AGENTS

Patent #:	7298025	Issue Dt:	11/20/2007	Application #:	11081925	Filing Dt:	03/15/2005
Publication #:	US20050156294	Pub Dt:	07/21/2005
Title:	MICROELECTRONIC COMPONENT ASSEMBLIES AND MICROELECTRONIC COMPONENT LEAD FRAME STRUCTURES

Patent #:	7425472	Issue Dt:	09/16/2008	Application #:	11082066	Filing Dt:	03/16/2005
Publication #:	US20050158919	Pub Dt:	07/21/2005
Title:	SEMICONDUCTOR FUSES AND SEMICONDUCTOR DEVICES CONTAINING THE SAME

Patent #:	7139852	Issue Dt:	11/21/2006	Application #:	11082572	Filing Dt:	03/16/2005
Publication #:	US20050182894	Pub Dt:	08/18/2005
Title:	MEMORY BUS POLARITY INDICATOR SYSTEM AND METHOD FOR REDUCING THE AFFECTS OF SIMULTANEOUS SWITCHING OUTPUTS (SSO) ON MEMORY BUS TIMING

Patent #:	7262555	Issue Dt:	08/28/2007	Application #:	11083433	Filing Dt:	03/17/2005
Publication #:	US20060208649	Pub Dt:	09/21/2006
Title:	METHOD AND SYSTEM FOR DISCRETELY CONTROLLABLE PLASMA PROCESSING

Patent #:	7199593	Issue Dt:	04/03/2007	Application #:	11083506	Filing Dt:	03/18/2005
Publication #:	US20050161256	Pub Dt:	07/28/2005
Title:	METHODS FOR MEASURING PARASITIC CAPACITANCE AND INDUCTANCE OF I/O LEADS ON AN ELECTRICAL COMPONENT USING A NETWORK ANALYZER

Patent #:	7358178	Issue Dt:	04/15/2008	Application #:	11083518	Filing Dt:	03/18/2005
Publication #:	US20050164486	Pub Dt:	07/28/2005
Title:	SEMICONDUCTOR SUBSTRATES INCLUDING I/O REDISTRIBUTION USING WIRE BONDS AND ANISOTROPICALLY CONDUCTIVE FILM, METHODS OF FABRICATION AND ASSEMBLIES INCLUDING SAME

Patent #:	7139896	Issue Dt:	11/21/2006	Application #:	11084338	Filing Dt:	03/17/2005
Publication #:	US20050162935	Pub Dt:	07/28/2005
Title:	LINEAR AND NON-LINEAR OBJECT MANAGEMENT

Patent #:	7697357	Issue Dt:	04/13/2010	Application #:	11084345	Filing Dt:	03/17/2005
Publication #:	US20060209604	Pub Dt:	09/21/2006
Title:	NEGATIVE VOLTAGE DRIVING FOR THE DIGIT LINE ISOLATION GATES

Patent #:	7085908	Issue Dt:	08/01/2006	Application #:	11084459	Filing Dt:	03/17/2005
Publication #:	US20050166025	Pub Dt:	07/28/2005
Title:	LINEAR OBJECT MANAGEMENT FOR A RANGE OF FLASH MEMORY

Patent #:	7611959	Issue Dt:	11/03/2009	Application #:	11084968	Filing Dt:	03/21/2005
Publication #:	US20050164521	Pub Dt:	07/28/2005
Title:	ZR-SN-TI-O FILMS

Patent #:	7348205	Issue Dt:	03/25/2008	Application #:	11085009	Filing Dt:	03/21/2005
Publication #:	US20050157573	Pub Dt:	07/21/2005
Title:	METHOD OF FORMING RESISTANCE VARIABLE DEVICES

Patent #:	7276765	Issue Dt:	10/02/2007	Application #:	11085018	Filing Dt:	03/21/2005
Publication #:	US20050161741	Pub Dt:	07/28/2005
Title:	BURIED TRANSISTORS FOR SILICON ON INSULATOR TECHNOLOGY

Patent #:	7492196	Issue Dt:	02/17/2009	Application #:	11085563	Filing Dt:	03/22/2005
Publication #:	US20050162203	Pub Dt:	07/28/2005
Title:	LOW INJECTION CHARGE PUMP

Patent #:	7042778	Issue Dt:	05/09/2006	Application #:	11085855	Filing Dt:	03/22/2005
Publication #:	US20050162967	Pub Dt:	07/28/2005
Title:	FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES

Patent #:	7167399	Issue Dt:	01/23/2007	Application #:	11085936	Filing Dt:	03/22/2005
Publication #:	US20050162909	Pub Dt:	07/28/2005
Title:	FLASH MEMORY DEVICE WITH A VARIABLE ERASE PULSE

Patent #:	7312164	Issue Dt:	12/25/2007	Application #:	11087212	Filing Dt:	03/23/2005
Publication #:	US20050164500	Pub Dt:	07/28/2005
Title:	SELECTIVE PASSIVATION OF EXPOSED SILICON

Patent #:	7273796	Issue Dt:	09/25/2007	Application #:	11087218	Filing Dt:	03/23/2005
Publication #:	US20060216906	Pub Dt:	09/28/2006
Title:	METHODS OF FORMING TRENCH ISOLATION IN THE FABRICATION OF INTEGRATED CIRCUITRY AND METHODS OF FABRICATING INTEGRATED CIRCUITRY

Patent #:	7262637	Issue Dt:	08/28/2007	Application #:	11087293	Filing Dt:	03/22/2005
Publication #:	US20060214688	Pub Dt:	09/28/2006
Title:	OUTPUT BUFFER AND METHOD HAVING A SUPPLY VOLTAGE INSENSITIVE SLEW RATE

Patent #:	7072230	Issue Dt:	07/04/2006	Application #:	11088092	Filing Dt:	03/23/2005
Publication #:	US20050162943	Pub Dt:	07/28/2005
Title:	METHOD AND APPARATUS FOR STANDBY POWER REDUCTION IN SEMICONDUCTOR DEVICES

Patent #:	7319605	Issue Dt:	01/15/2008	Application #:	11088363	Filing Dt:	03/23/2005
Publication #:	US20050167700	Pub Dt:	08/04/2005
Title:	CONDUCTIVE STRUCTURE FOR MICROELECTRONIC DEVICES AND METHODS OF FABRICATING SUCH STRUCTURES

Patent #:	7251177	Issue Dt:	07/31/2007	Application #:	11089132	Filing Dt:	03/24/2005
Publication #:	US20050180208	Pub Dt:	08/18/2005
Title:	SKEWED SENSE AMP FOR VARIABLE RESISTANCE MEMORY SENSING

Patent #:	7339839	Issue Dt:	03/04/2008	Application #:	11089382	Filing Dt:	03/24/2005
Publication #:	US20050169080	Pub Dt:	08/04/2005
Title:	TRIGGERING OF IO EQUILIBRATING ENDING SIGNAL WITH FIRING OF COLUMN ACCESS SIGNAL

Patent #:	7218003	Issue Dt:	05/15/2007	Application #:	11090092	Filing Dt:	03/24/2005
Publication #:	US20050167822	Pub Dt:	08/04/2005
Title:	METHODS FOR WAFER-LEVEL PACKAGING OF MICROELECTRONIC DEVICES AND MICROELECTRONIC DEVICES FORMED BY SUCH METHODS

Patent #:	7238616	Issue Dt:	07/03/2007	Application #:	11090204	Filing Dt:	03/28/2005
Publication #:	US20050186789	Pub Dt:	08/25/2005
Title:	PHOTO-ASSISTED METHOD FOR SEMICONDUCTOR FABRICATION

Patent #:	7384849	Issue Dt:	06/10/2008	Application #:	11090529	Filing Dt:	03/25/2005
Publication #:	US20060216894	Pub Dt:	09/28/2006
Title:	METHODS OF FORMING RECESSED ACCESS DEVICES ASSOCIATED WITH SEMICONDUCTOR CONSTRUCTIONS

Patent #:	7075819	Issue Dt:	07/11/2006	Application #:	11091258	Filing Dt:	03/28/2005
Publication #:	US20050169046	Pub Dt:	08/04/2005
Title:	CLOSED FLUX MAGNETIC MEMORY

Patent #:	7355231	Issue Dt:	04/08/2008	Application #:	11091260	Filing Dt:	03/28/2005
Publication #:	US20050161722	Pub Dt:	07/28/2005
Title:	MEMORY CIRCUITRY WITH OXYGEN DIFFUSION BARRIER LAYER RECEIVED OVER A WELL BASE

Patent #:	7115451	Issue Dt:	10/03/2006	Application #:	11092029	Filing Dt:	03/29/2005
Publication #:	US20050186706	Pub Dt:	08/25/2005
Title:	METHODS OF FORMING SEMICONDUCTOR CIRCUITRY

Patent #:	7708622	Issue Dt:	05/04/2010	Application #:	11092157	Filing Dt:	03/28/2005
Publication #:	US20050170761	Pub Dt:	08/04/2005
Title:	APPARATUSES AND METHODS FOR CONDITIONING POLISHING PADS USED IN POLISHING MICRO-DEVICE WORKPIECES

Patent #:	7184310	Issue Dt:	02/27/2007	Application #:	11093012	Filing Dt:	03/29/2005
Publication #:	US20050232019	Pub Dt:	10/20/2005
Title:	SEQUENTIAL PROGRAM-VERIFY METHOD WITH RESULT BUFFERING

Patent #:	7573113	Issue Dt:	08/11/2009	Application #:	11093286	Filing Dt:	03/30/2005
Publication #:	US20050167711	Pub Dt:	08/04/2005
Title:	PHOTODIODE WITH ULTRA-SHALLOW JUNCTION FOR HIGH QUANTUM EFFICIENCY CMOS IMAGE SENSOR AND METHOD OF FORMATION

Patent #:	8018926	Issue Dt:	09/13/2011	Application #:	11093907	Filing Dt:	03/30/2005
Publication #:	US20060221944	Pub Dt:	10/05/2006
Title:	DIFFERENTIAL DELAY COMPENSATION

Patent #:	7622772	Issue Dt:	11/24/2009	Application #:	11094614	Filing Dt:	03/29/2005
Publication #:	US20050167752	Pub Dt:	08/04/2005
Title:	ELECTRONIC APPARATUSES, SILICON-ON-INSULATOR INTEGRATED CIRCUITS, AND FABRICATION METHODS

Patent #:	7328313	Issue Dt:	02/05/2008	Application #:	11094687	Filing Dt:	03/30/2005
Publication #:	US20060224834	Pub Dt:	10/05/2006
Title:	METHODS TO PERFORM CACHE COHERENCY IN MULTIPROCESSOR SYSTEM USING RESERVE SIGNALS AND CONTROL BITS

Patent #:	7268057	Issue Dt:	09/11/2007	Application #:	11095186	Filing Dt:	03/30/2005
Publication #:	US20060228866	Pub Dt:	10/12/2006
Title:	METHODS OF FILLING OPENINGS WITH OXIDE, AND METHODS OF FORMING TRENCHED ISOLATION REGIONS

Patent #:	7348618	Issue Dt:	03/25/2008	Application #:	11095330	Filing Dt:	03/30/2005
Publication #:	US20060228858	Pub Dt:	10/12/2006
Title:	FLASH MEMORY CELL HAVING REDUCED FLOATING GATE TO FLOATING GATE COUPLING

Patent #:	7085156	Issue Dt:	08/01/2006	Application #:	11096970	Filing Dt:	04/01/2005
Publication #:	US20050174873	Pub Dt:	08/11/2005
Title:	SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING SAME

Patent #:	7170783	Issue Dt:	01/30/2007	Application #:	11097064	Filing Dt:	04/01/2005
Publication #:	US20060221691	Pub Dt:	10/05/2006
Title:	LAYOUT FOR NAND FLASH MEMORY ARRAY HAVING REDUCED WORD LINE IMPEDANCE

Patent #:	8012847	Issue Dt:	09/06/2011	Application #:	11097876	Filing Dt:	04/01/2005
Publication #:	US20060223279	Pub Dt:	10/05/2006
Title:	METHODS OF FORMING TRENCH ISOLATION IN THE FABRICATION OF INTEGRATED CIRCUITRY AND METHODS OF FABRICATING INTEGRATED CIRCUITRY

Patent #:	7260125	Issue Dt:	08/21/2007	Application #:	11098552	Filing Dt:	04/05/2005
Publication #:	US20050175058	Pub Dt:	08/11/2005
Title:	METHOD OF FORMING MIRRORS BY SURFACE TRANSFORMATION OF EMPTY SPACES IN SOLID STATE MATERIALS

Patent #:	7199413	Issue Dt:	04/03/2007	Application #:	11098747	Filing Dt:	04/04/2005
Publication #:	US20050179070	Pub Dt:	08/18/2005
Title:	JUNCTION-ISOLATED DEPLETION MODE FERROELECTRIC MEMORY DEVICES AND SYSTEMS

Patent #:	7268018	Issue Dt:	09/11/2007	Application #:	11099372	Filing Dt:	04/05/2005
Publication #:	US20050179124	Pub Dt:	08/18/2005
Title:	METHOD FOR FABRICATING SEMICONDUCTOR COMPONENT WITH STIFFENER AND CIRCUIT DECAL

Patent #:	7075831	Issue Dt:	07/11/2006	Application #:	11099775	Filing Dt:	04/06/2005
Publication #:	US20050174850	Pub Dt:	08/11/2005
Title:	METHOD FOR ERASING AN NROM CELL

Patent #:	7075832	Issue Dt:	07/11/2006	Application #:	11099839	Filing Dt:	04/06/2005
Publication #:	US20050174855	Pub Dt:	08/11/2005
Title:	METHOD FOR ERASING AN NROM CELL

Patent #:	7341909	Issue Dt:	03/11/2008	Application #:	11099972	Filing Dt:	04/06/2005
Publication #:	US20060228880	Pub Dt:	10/12/2006
Title:	METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS

Patent #:	7916186	Issue Dt:	03/29/2011	Application #:	11100429	Filing Dt:	04/07/2005
Publication #:	US20060227226	Pub Dt:	10/12/2006
Title:	ANTI-ECLIPSE CIRCUITRY WITH TRACKING OF FLOATING DIFFUSION RESET LEVEL

Patent #:	7208828	Issue Dt:	04/24/2007	Application #:	11101626	Filing Dt:	04/08/2005
Publication #:	US20050173788	Pub Dt:	08/11/2005
Title:	SEMICONDUCTOR PACKAGE WITH WIRE BONDED STACKED DICE AND MULTI-LAYER METAL BUMPS

Patent #:	7581065	Issue Dt:	08/25/2009	Application #:	11101785	Filing Dt:	04/07/2005
Publication #:	US20060230235	Pub Dt:	10/12/2006
Title:	LOW LOCALITY-OF-REFERENCE SUPPORT IN A MULTI-LEVEL CACHE HIERACHY

Patent #:	7371676	Issue Dt:	05/13/2008	Application #:	11102408	Filing Dt:	04/08/2005
Publication #:	US20060228825	Pub Dt:	10/12/2006
Title:	METHOD FOR FABRICATING SEMICONDUCTOR COMPONENTS WITH THROUGH WIRE INTERCONNECTS

Patent #:	7422924	Issue Dt:	09/09/2008	Application #:	11102844	Filing Dt:	04/11/2005
Publication #:	US20050179072	Pub Dt:	08/18/2005
Title:	IMAGE DEVICE AND PHOTODIODE STRUCTURE

Patent #:	7541658	Issue Dt:	06/02/2009	Application #:	11103019	Filing Dt:	04/11/2005
Publication #:	US20050173811	Pub Dt:	08/11/2005
Title:	OPTICALLY INTERACTIVE DEVICE PACKAGE ARRAY

Patent #:	8653495	Issue Dt:	02/18/2014	Application #:	11103188	Filing Dt:	04/11/2005
Publication #:	US20060226410	Pub Dt:	10/12/2006
Title:	HEATING PHASE CHANGE MATERIAL

Patent #:	7271071	Issue Dt:	09/18/2007	Application #:	11105148	Filing Dt:	04/12/2005
Publication #:	US20050191437	Pub Dt:	09/01/2005
Title:	METHOD OF FORMING A CATALYTIC SURFACE COMPRISING AT LEAST ONE OF PT, PD, CO AND AU IN AT LEAST ONE OF ELEMENTAL AND ALLOY FORMS

Patent #:	7355203	Issue Dt:	04/08/2008	Application #:	11105412	Filing Dt:	04/14/2005
Publication #:	US20050173746	Pub Dt:	08/11/2005
Title:	USE OF GATE ELECTRODE WORKFUNCTION TO IMPROVE DRAM REFRESH

Patent #:	7635604	Issue Dt:	12/22/2009	Application #:	11105419	Filing Dt:	04/14/2005
Publication #:	US20050179059	Pub Dt:	08/18/2005
Title:	WELL FOR CMOS IMAGER AND METHOD OF FORMATION

Patent #:	7095083	Issue Dt:	08/22/2006	Application #:	11105775	Filing Dt:	04/13/2005
Publication #:	US20050173747	Pub Dt:	08/11/2005
Title:	METHODS FOR MAKING SEMICONDUCTOR STRUCTURES HAVING HIGH-SPEED AREAS AND HIGH-DENSITY AREAS

Patent #:	7276955	Issue Dt:	10/02/2007	Application #:	11106100	Filing Dt:	04/14/2005
Publication #:	US20060232323	Pub Dt:	10/19/2006
Title:	CIRCUIT AND METHOD FOR STABLE FUSE DETECTION

Patent #:	7483067	Issue Dt:	01/27/2009	Application #:	11106465	Filing Dt:	04/15/2005
Publication #:	US20060232676	Pub Dt:	10/19/2006
Title:	COLUMN-PARALLEL SIGMA-DELTA ANALOG-TO-DIGITAL CONVERSION FOR IMAGERS

Patent #:	7402833	Issue Dt:	07/22/2008	Application #:	11106509	Filing Dt:	04/15/2005
Publication #:	US20050173698	Pub Dt:	08/11/2005
Title:	MULTILAYER DIELECTRIC TUNNEL BARRIER USED IN MAGNETIC TUNNEL JUNCTION DEVICES, AND ITS METHOD OF FABRICATION

Patent #:	7151698	Issue Dt:	12/19/2006	Application #:	11106716	Filing Dt:	04/15/2005
Publication #:	US20060062062	Pub Dt:	03/23/2006
Title:	INTEGRATED CHARGE SENSING SCHEME FOR RESISTIVE MEMORIES

Patent #:	7989349	Issue Dt:	08/02/2011	Application #:	11107125	Filing Dt:	04/15/2005
Publication #:	US20060233694	Pub Dt:	10/19/2006
Title:	METHODS OF MANUFACTURING NANOTUBES HAVING CONTROLLED CHARACTERISTICS

Patent #:	7274236	Issue Dt:	09/25/2007	Application #:	11107587	Filing Dt:	04/15/2005
Publication #:	US20060232315	Pub Dt:	10/19/2006
Title:	VARIABLE DELAY LINE WITH MULTIPLE HIERARCHY

Patent #:	7390685	Issue Dt:	06/24/2008	Application #:	11107807	Filing Dt:	04/18/2005
Publication #:	US20050196890	Pub Dt:	09/08/2005
Title:	ULTRA-SHALLOW PHOTODIODE USING INDIUM

Patent #:	7399499	Issue Dt:	07/15/2008	Application #:	11108219	Filing Dt:	04/18/2005
Publication #:	US20050191416	Pub Dt:	09/01/2005
Title:	METHODS OF GAS DELIVERY FOR DEPOSITION PROCESSES AND METHODS OF DEPOSITING MATERIAL ON A SUBSTRATE

Patent #:	7508075	Issue Dt:	03/24/2009	Application #:	11108436	Filing Dt:	04/18/2005
Publication #:	US20050181578	Pub Dt:	08/18/2005
Title:	SELF-ALIGNED POLY-METAL STRUCTURES

Patent #:	8164368	Issue Dt:	04/24/2012	Application #:	11109531	Filing Dt:	04/19/2005
Publication #:	US20060233036	Pub Dt:	10/19/2006
Title:	POWER SAVINGS MODE FOR MEMORY SYSTEMS

Patent #:	7251762	Issue Dt:	07/31/2007	Application #:	11109535	Filing Dt:	04/19/2005
Publication #:	US20060236170	Pub Dt:	10/19/2006
Title:	ON-CHIP SAMPLING CIRCUIT AND METHOD

Patent #:	7505309	Issue Dt:	03/17/2009	Application #:	11109946	Filing Dt:	04/20/2005
Publication #:	US20060239062	Pub Dt:	10/26/2006
Title:	STATIC RAM MEMORY CELL WITH DNR CHALCOGENIDE DEVICES AND METHOD OF FORMING

Patent #:	7355273	Issue Dt:	04/08/2008	Application #:	11110431	Filing Dt:	04/20/2005
Publication #:	US20050186705	Pub Dt:	08/25/2005
Title:	SEMICONDUCTOR DICE HAVING BACK SIDE REDISTRIBUTION LAYER ACCESSED USING THROUGH-SILICON VIAS, METHODS

Patent #:	7372129	Issue Dt:	05/13/2008	Application #:	11110583	Filing Dt:	04/20/2005
Publication #:	US20050184367	Pub Dt:	08/25/2005
Title:	TWO DIE SEMICONDUCTOR ASSEMBLY AND SYSTEM INCLUDING SAME

Patent #:	7725628	Issue Dt:	05/25/2010	Application #:	11110612	Filing Dt:	04/19/2005
Title:	DIRECT SECONDARY DEVICE INTERFACE BY A HOST

Patent #:	7659161	Issue Dt:	02/09/2010	Application #:	11111360	Filing Dt:	04/21/2005
Publication #:	US20050239244	Pub Dt:	10/27/2005
Title:	METHODS OF FORMING STORAGE NODES FOR A DRAM ARRAY

Patent #:	7288806	Issue Dt:	10/30/2007	Application #:	11111605	Filing Dt:	04/21/2005
Publication #:	US20050236649	Pub Dt:	10/27/2005
Title:	DRAM ARRAYS

Patent #:	7384847	Issue Dt:	06/10/2008	Application #:	11111625	Filing Dt:	04/21/2005
Publication #:	US20050239243	Pub Dt:	10/27/2005
Title:	METHODS OF FORMING DRAM ARRAYS

Patent #:	7427770	Issue Dt:	09/23/2008	Application #:	11111836	Filing Dt:	04/22/2005
Publication #:	US20060237707	Pub Dt:	10/26/2006
Title:	MEMORY ARRAY FOR INCREASED BIT DENSITY

Patent #:	7269044	Issue Dt:	09/11/2007	Application #:	11111838	Filing Dt:	04/22/2005
Publication #:	US20060239058	Pub Dt:	10/26/2006
Title:	METHOD AND APPARATUS FOR ACCESSING A MEMORY ARRAY

Patent #:	7709289	Issue Dt:	05/04/2010	Application #:	11111917	Filing Dt:	04/22/2005
Publication #:	US20060240616	Pub Dt:	10/26/2006
Title:	MEMORY ELEMENTS HAVING PATTERNED ELECTRODES AND METHOD OF FORMING THE SAME

Patent #:	7217617	Issue Dt:	05/15/2007	Application #:	11112127	Filing Dt:	04/22/2005
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Title:	POSITION BASED ERASE VERIFICATION LEVELS IN A FLASH MEMORY DEVICE

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Title:	FLASH MEMORY DEVICE HAVING A GRADED COMPOSITION, HIGH DIELECTRIC CONSTANT GATE INSULATOR

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Title:	SEMICONDUCTOR STRUCTURES

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100

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Title:	METHOD OF COMPARISON BETWEEN CACHE AND DATA REGISTER FOR NON-VOLATILE MEMORY

Assignor

JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT

Exec Dt:

07/31/2019

Assignees

MICRON TECHNOLOGY, INC.

8000 S FEDERAL WAY

BOISE, IDAHO 83707

MICRON SEMICONDUCTOR PRODUCTS, INC.

8000 S FEDERAL WAY

BOISE, IDAHO 83707

Correspondence name and address
	WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
	ONE MARKET, SPEAR TOWER, SUITE 3300
	SAN FRANCISCO, CA 94105

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