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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:051028/0001   Pages: 834
Recorded: 11/12/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
04/14/2009
Application #:
11146248
Filing Dt:
06/06/2005
Publication #:
Pub Dt:
12/07/2006
Title:
METHODS FOR POSITIONING CARBON NANOTUBES
2
Patent #:
Issue Dt:
01/02/2007
Application #:
11146397
Filing Dt:
06/07/2005
Publication #:
Pub Dt:
10/13/2005
Title:
METHOD FOR FABRICATING ENCAPSULATED SEMICONDUCTOR COMPONENTS
3
Patent #:
Issue Dt:
04/03/2007
Application #:
11146482
Filing Dt:
06/06/2005
Publication #:
Pub Dt:
10/13/2005
Title:
MAGNETO-RESISTIVE MEMORY CELL STRUCTURES WITH IMPROVED SELECTIVITY
4
Patent #:
Issue Dt:
05/13/2008
Application #:
11146648
Filing Dt:
06/07/2005
Publication #:
Pub Dt:
12/07/2006
Title:
METHODS OF ETCHING NICKEL SILICIDE AND COBALT SILICIDE AND METHODS OF FORMING CONDUCTIVE LINES
5
Patent #:
Issue Dt:
05/19/2009
Application #:
11146852
Filing Dt:
06/07/2005
Publication #:
Pub Dt:
12/07/2006
Title:
DYNAMIC WELL BIAS CONTROLLED BY VT DETECTOR
6
Patent #:
Issue Dt:
03/04/2008
Application #:
11146997
Filing Dt:
06/06/2005
Publication #:
Pub Dt:
04/20/2006
Title:
SPINTRONIC DEVICES WITH INTEGRATED TRANSISTORS
7
Patent #:
Issue Dt:
03/24/2009
Application #:
11148028
Filing Dt:
06/08/2005
Publication #:
Pub Dt:
12/14/2006
Title:
ROBUST INDEX STORAGE FOR NON-VOLATILE MEMORY
8
Patent #:
Issue Dt:
04/24/2007
Application #:
11148396
Filing Dt:
06/07/2005
Publication #:
Pub Dt:
10/13/2005
Title:
METHOD FOR FORMING MAGNETO-RESISTIVE MEMORY CELLS WITH SHAPE ANISOTROPY
9
Patent #:
Issue Dt:
01/30/2007
Application #:
11148505
Filing Dt:
06/09/2005
Publication #:
Pub Dt:
10/13/2005
Title:
ATOMIC LAYER DEPOSITED NANOLAMINATES OF HFO2/ZRO2 FILMS AS GATE DIELECTRICS
10
Patent #:
Issue Dt:
05/19/2009
Application #:
11148554
Filing Dt:
06/09/2005
Publication #:
Pub Dt:
12/14/2006
Title:
REDUCED IMAGER CROSSTALK AND PIXEL NOISE USING EXTENDED BURIED CONTACTS
11
Patent #:
Issue Dt:
04/15/2008
Application #:
11149578
Filing Dt:
06/09/2005
Publication #:
Pub Dt:
12/29/2005
Title:
METHODS OF FORMING CONDUCTIVE INTERCONNECTS, AND METHODS OF DEPOSITING NICKEL
12
Patent #:
Issue Dt:
10/28/2008
Application #:
11149948
Filing Dt:
06/09/2005
Publication #:
Pub Dt:
03/23/2006
Title:
DATA CONTROL UNIT CAPABLE OF CORRECTING BOOT ERRORS, AND CORRESPONDING SELF-CORRECTION METHOD
13
Patent #:
Issue Dt:
03/16/2010
Application #:
11151219
Filing Dt:
06/13/2005
Publication #:
Pub Dt:
12/14/2006
Title:
VERTICAL TRANSISTOR, MEMORY CELL, DEVICE, SYSTEM AND METHOD OF FORMING SAME
14
Patent #:
Issue Dt:
04/03/2007
Application #:
11151952
Filing Dt:
06/14/2005
Publication #:
Pub Dt:
12/14/2006
Title:
LOW POWER NROM MEMORY DEVICES
15
Patent #:
Issue Dt:
02/19/2008
Application #:
11152325
Filing Dt:
06/14/2005
Publication #:
Pub Dt:
12/14/2006
Title:
DLL MEASURE INITIALIZATION CIRCUIT FOR HIGH FREQUENCY OPERATION
16
Patent #:
Issue Dt:
04/15/2008
Application #:
11152513
Filing Dt:
06/14/2005
Publication #:
Pub Dt:
12/15/2005
Title:
CONTACT PIN ASSEMBLY AND CONTACTOR CARD
17
Patent #:
Issue Dt:
12/25/2007
Application #:
11152644
Filing Dt:
06/14/2005
Publication #:
Pub Dt:
10/20/2005
Title:
MEMORY DEVICE INTERFACE
18
Patent #:
Issue Dt:
03/31/2009
Application #:
11152759
Filing Dt:
06/14/2005
Publication #:
Pub Dt:
12/14/2006
Title:
IRIDIUM / ZIRCONIUM OXIDE STRUCTURE
19
Patent #:
Issue Dt:
12/28/2010
Application #:
11152988
Filing Dt:
06/14/2005
Publication #:
Pub Dt:
12/14/2006
Title:
CMOS FABRICATION
20
Patent #:
Issue Dt:
06/02/2009
Application #:
11153038
Filing Dt:
06/14/2005
Publication #:
Pub Dt:
12/14/2006
Title:
RELAXED-PITCH METHOD OF ALIGNING ACTIVE AREA TO DIGIT LINE
21
Patent #:
Issue Dt:
07/22/2008
Application #:
11153091
Filing Dt:
06/15/2005
Publication #:
Pub Dt:
10/20/2005
Title:
HIGH ASPECT RATIO CONTACT STRUCTURE WITH REDUCED SILICON CONSUMPTION
22
Patent #:
Issue Dt:
09/25/2007
Application #:
11153188
Filing Dt:
06/15/2005
Publication #:
Pub Dt:
12/21/2006
Title:
BITLINE EXCLUSION IN VERIFICATION OPERATION
23
Patent #:
Issue Dt:
08/11/2009
Application #:
11153529
Filing Dt:
06/14/2005
Publication #:
Pub Dt:
12/14/2006
Title:
METHODS FOR REDUCING STRESS IN MICROELECTRONIC DEVICES AND MICROELECTRONIC DEVICES FORMED USING SUCH METHODS
24
Patent #:
Issue Dt:
01/30/2007
Application #:
11153952
Filing Dt:
06/16/2005
Publication #:
Pub Dt:
10/20/2005
Title:
IN-PROCESS SEMICONDUCTOR PACKAGES WITH LEADFRAME GRID ARRAYS
25
Patent #:
Issue Dt:
10/13/2009
Application #:
11153963
Filing Dt:
06/16/2005
Publication #:
Pub Dt:
12/21/2006
Title:
ERASABLE NON-VOLATILE MEMORY DEVICE USING HOLE TRAPPING IN HIGH-K DIELECTRICS
26
Patent #:
Issue Dt:
06/05/2007
Application #:
11154265
Filing Dt:
06/15/2005
Publication #:
Pub Dt:
01/12/2006
Title:
MULTI-LAYER, ATTENUATED PHASE-SHIFTING MASK
27
Patent #:
Issue Dt:
06/12/2007
Application #:
11154371
Filing Dt:
06/16/2005
Publication #:
Pub Dt:
10/13/2005
Title:
METHODS OF MAKING SEMICONDUCTOR-ON-INSULATOR THIN FILM TRANSISTOR CONSTRUCTIONS
28
Patent #:
Issue Dt:
05/13/2008
Application #:
11154462
Filing Dt:
06/16/2005
Publication #:
Pub Dt:
12/21/2006
Title:
LOW POWER FLASH MEMORY DEVICES
29
Patent #:
Issue Dt:
08/10/2010
Application #:
11155167
Filing Dt:
06/17/2005
Publication #:
Pub Dt:
12/21/2006
Title:
METHODS OF MAKING TEMPLATES FOR USE IN IMPRINT LITHOGRAPHY
30
Patent #:
Issue Dt:
02/03/2009
Application #:
11155197
Filing Dt:
06/17/2005
Publication #:
Pub Dt:
12/21/2006
Title:
FLOATING-GATE STRUCTURE WITH DIELECTRIC COMPONENT
31
Patent #:
Issue Dt:
02/21/2012
Application #:
11155809
Filing Dt:
06/17/2005
Publication #:
Pub Dt:
03/02/2006
Title:
SELECTIVE ETCHING OF OXIDES TO METAL NITRIDES AND METAL OXIDES
32
Patent #:
Issue Dt:
07/03/2007
Application #:
11156223
Filing Dt:
06/17/2005
Publication #:
Pub Dt:
12/21/2006
Title:
PROGRAM METHOD WITH OPTIMIZED VOLTAGE LEVEL FOR FLASH MEMORY
33
Patent #:
Issue Dt:
03/11/2008
Application #:
11156238
Filing Dt:
06/16/2005
Publication #:
Pub Dt:
07/27/2006
Title:
METHODS OF FORMING LOW RESISTIVITY CONTACT FOR AN INTEGRATED CIRCUIT DEVICE
34
Patent #:
Issue Dt:
09/18/2007
Application #:
11156732
Filing Dt:
06/21/2005
Publication #:
Pub Dt:
10/27/2005
Title:
A METHOD OF FORMING A SUPPORT FRAME FOR SEMICONDUCTOR PACKAGES
35
Patent #:
Issue Dt:
06/28/2011
Application #:
11156838
Filing Dt:
06/20/2005
Publication #:
Pub Dt:
12/21/2006
Title:
PERIPHERAL INTERFACE ALERT MESSAGE FOR DOWNSTREAM DEVICE
36
Patent #:
Issue Dt:
12/19/2006
Application #:
11157140
Filing Dt:
06/21/2005
Publication #:
Pub Dt:
01/19/2006
Title:
ADJUSTING THE FREQUENCY OF AN OSCILLATOR FOR USE IN A RESISTIVE SENSE AMP
37
Patent #:
Issue Dt:
11/13/2007
Application #:
11157266
Filing Dt:
06/21/2005
Publication #:
Pub Dt:
10/27/2005
Title:
VERTICAL FLOATING GATE TRANSISTOR
38
Patent #:
Issue Dt:
07/22/2008
Application #:
11157361
Filing Dt:
06/21/2005
Publication #:
Pub Dt:
12/21/2006
Title:
BACK-SIDE TRAPPED NON-VOLATILE MEMORY DEVICE
39
Patent #:
Issue Dt:
10/23/2007
Application #:
11157648
Filing Dt:
06/21/2005
Publication #:
Pub Dt:
12/21/2006
Title:
LOW POWER DISSIPATION VOLTAGE GENERATOR
40
Patent #:
Issue Dt:
08/28/2007
Application #:
11158220
Filing Dt:
06/21/2005
Publication #:
Pub Dt:
12/21/2006
Title:
TERRACED FILM STACK
41
Patent #:
Issue Dt:
04/17/2007
Application #:
11158243
Filing Dt:
06/21/2005
Publication #:
Pub Dt:
12/21/2006
Title:
INPUT BUFFER FOR LOW VOLTAGE OPERATION
42
Patent #:
Issue Dt:
07/28/2009
Application #:
11158744
Filing Dt:
06/22/2005
Publication #:
Pub Dt:
11/10/2005
Title:
METHOD OF MAKING A ONE TRANSISTOR SOI NON-VOLATILE RANDOM ACCESS MEMORY CELL
43
Patent #:
Issue Dt:
07/28/2009
Application #:
11166354
Filing Dt:
06/24/2005
Publication #:
Pub Dt:
01/12/2006
Title:
PAGE BUFFER CIRCUIT AND METHOD FOR A PROGRAMMABLE MEMORY DEVICE
44
Patent #:
Issue Dt:
09/18/2007
Application #:
11166490
Filing Dt:
06/24/2005
Publication #:
Pub Dt:
12/28/2006
Title:
SEMICONDUCTOR PROCESSING METHODS
45
Patent #:
Issue Dt:
01/08/2008
Application #:
11166500
Filing Dt:
06/24/2005
Publication #:
Pub Dt:
10/27/2005
Title:
ROM-BASED CONTROLLER MONITOR IN A MEMORY DEVICE
46
Patent #:
Issue Dt:
03/08/2011
Application #:
11166721
Filing Dt:
06/24/2005
Publication #:
Pub Dt:
12/28/2006
Title:
TWO-SIDED SURROUND ACCESS TRANSISTOR FOR A 4.5F2 DRAM CELL
47
Patent #:
Issue Dt:
08/16/2011
Application #:
11167011
Filing Dt:
06/24/2005
Publication #:
Pub Dt:
12/28/2006
Title:
DYNAMIC RANDOM ACCESS MEMORY DEVICE AND ELECTRONIC SYSTEMS
48
Patent #:
Issue Dt:
02/26/2008
Application #:
11167031
Filing Dt:
06/27/2005
Publication #:
Pub Dt:
11/03/2005
Title:
SEMICONDUCTOR COMPONENT HAVING MULTIPLE STACKED DICE
49
Patent #:
Issue Dt:
09/15/2009
Application #:
11167367
Filing Dt:
06/27/2005
Publication #:
Pub Dt:
12/28/2006
Title:
STACKED SEMICONDUCTOR COMPONENT
50
Patent #:
Issue Dt:
09/18/2007
Application #:
11167543
Filing Dt:
06/27/2005
Publication #:
Pub Dt:
12/28/2006
Title:
NON-VOLATILE MEMORY WITH HOLE TRAPPING BARRIER
51
Patent #:
Issue Dt:
02/05/2008
Application #:
11167894
Filing Dt:
06/27/2005
Publication #:
Pub Dt:
11/10/2005
Title:
GETTERING USING VOIDS FORMED BY SURFACE TRANSFORMATION
52
Patent #:
Issue Dt:
08/26/2008
Application #:
11168160
Filing Dt:
06/28/2005
Publication #:
Pub Dt:
12/28/2006
Title:
ATOMIC LAYER DEPOSITION SYSTEMS AND METHODS INCLUDING METAL BETA-DIKETIMINATE COMPOUNDS
53
Patent #:
Issue Dt:
12/02/2008
Application #:
11168699
Filing Dt:
06/27/2005
Publication #:
Pub Dt:
12/28/2006
Title:
METHODS OF FORMING DRAM ARRAYS
54
Patent #:
Issue Dt:
06/30/2009
Application #:
11168742
Filing Dt:
06/27/2005
Publication #:
Pub Dt:
03/29/2007
Title:
NANOTUBE FORMING METHODS
55
Patent #:
Issue Dt:
09/13/2011
Application #:
11168760
Filing Dt:
06/29/2005
Publication #:
Pub Dt:
01/04/2007
Title:
BURIED CONDUCTOR FOR IMAGERS
56
Patent #:
Issue Dt:
10/09/2007
Application #:
11168776
Filing Dt:
06/28/2005
Publication #:
Pub Dt:
11/17/2005
Title:
METHOD FOR ASSEMBLING SEMICONDUCTOR DIE PACKAGES WITH STANDARD BALL GRID ARRAY FOOTPRINT
57
Patent #:
Issue Dt:
09/16/2008
Application #:
11168787
Filing Dt:
06/28/2005
Publication #:
Pub Dt:
12/28/2006
Title:
SEMICONDUCTOR SUBSTRATES INCLUDING VIAS OF NONUNIFORM CROSS SECTION, METHODS OF FORMING AND ASSOCIATED STRUCTURES
58
Patent #:
Issue Dt:
03/17/2009
Application #:
11168855
Filing Dt:
06/28/2005
Publication #:
Pub Dt:
12/28/2006
Title:
OXIDE EPITAXIAL ISOLATION
59
Patent #:
Issue Dt:
04/22/2008
Application #:
11168856
Filing Dt:
06/28/2005
Publication #:
Pub Dt:
12/28/2006
Title:
SEMICONDUCTOR PROCESSING METHODS
60
Patent #:
Issue Dt:
05/03/2011
Application #:
11168861
Filing Dt:
06/28/2005
Publication #:
Pub Dt:
12/28/2006
Title:
SEMICONDUCTOR PROCESSING METHODS
61
Patent #:
Issue Dt:
02/12/2008
Application #:
11168893
Filing Dt:
06/28/2005
Publication #:
Pub Dt:
12/28/2006
Title:
ION IMPLANTING METHODS
62
Patent #:
Issue Dt:
10/21/2008
Application #:
11169065
Filing Dt:
06/28/2005
Publication #:
Pub Dt:
12/28/2006
Title:
BETA-DIKETIMINATE LIGAND SOURCES AND METAL-CONTAINING COMPOUNDS THEREOF, AND SYSTEMS AND METHODS INCLUDING SAME
63
Patent #:
Issue Dt:
08/11/2009
Application #:
11169082
Filing Dt:
06/28/2005
Publication #:
Pub Dt:
09/04/2008
Title:
UNSYMMETRICAL LIGAND SOURCES, REDUCED SYMMETRY METAL-CONTAINING COMPOUNDS, AND SYSTEMS AND METHODS INCLUDING SAME
64
Patent #:
Issue Dt:
09/14/2010
Application #:
11169838
Filing Dt:
06/28/2005
Publication #:
Pub Dt:
12/28/2006
Title:
CONDUCTIVE INTERCONNECT STRUCTURES AND FORMATION METHODS USING SUPERCRITICAL FLUIDS
65
Patent #:
Issue Dt:
05/08/2007
Application #:
11170260
Filing Dt:
06/29/2005
Publication #:
Pub Dt:
01/04/2007
Title:
APPARATUS AND METHOD FOR REPAIRING A SEMICONDUCTOR MEMORY
66
Patent #:
Issue Dt:
12/05/2006
Application #:
11170880
Filing Dt:
06/30/2005
Publication #:
Pub Dt:
10/27/2005
Title:
CHIP PROTECTION REGISTER UNLOCKING
67
Patent #:
Issue Dt:
02/06/2007
Application #:
11171124
Filing Dt:
06/30/2005
Publication #:
Pub Dt:
10/27/2005
Title:
MULTIPLE CHIP SEMICONDUCTOR PACKAGE
68
Patent #:
Issue Dt:
09/18/2007
Application #:
11171860
Filing Dt:
06/30/2005
Publication #:
Pub Dt:
01/04/2007
Title:
VOLTAGE CONTROLLED OSCILLATOR (VCO) TUNING
69
Patent #:
Issue Dt:
02/20/2007
Application #:
11171872
Filing Dt:
06/30/2005
Publication #:
Pub Dt:
10/27/2005
Title:
METHOD OF STRESS-TESTING AN ISOLATION GATE IN A DYNAMIC RANDOM ACCESS MEMORY
70
Patent #:
Issue Dt:
03/30/2010
Application #:
11171873
Filing Dt:
06/30/2005
Publication #:
Pub Dt:
01/05/2006
Title:
METHODS OF FORMING A GATED DEVICE
71
Patent #:
Issue Dt:
06/26/2007
Application #:
11172133
Filing Dt:
06/29/2005
Publication #:
Pub Dt:
01/04/2007
Title:
APPARATUS, SYSTEM, AND METHOD FOR OSCILLATOR NETWORK WITH MULTIPLE PARALLEL OSCILLATOR CIRCUITS
72
Patent #:
Issue Dt:
10/13/2009
Application #:
11173218
Filing Dt:
06/30/2005
Publication #:
Pub Dt:
01/04/2007
Title:
FREQUENCY-DEPENDENT VOLTAGE CONTROL IN DIGITAL LOGIC
73
Patent #:
Issue Dt:
03/13/2012
Application #:
11173760
Filing Dt:
06/30/2005
Publication #:
Pub Dt:
01/04/2007
Title:
DC-DC CONVERTER SWITCHING TRANSISTOR CURRENT MEASUREMENT TECHNIQUE
74
Patent #:
Issue Dt:
02/05/2008
Application #:
11174662
Filing Dt:
07/06/2005
Publication #:
Pub Dt:
11/03/2005
Title:
MEMORY CONTROLLER HUB INTERFACE
75
Patent #:
Issue Dt:
02/15/2011
Application #:
11175677
Filing Dt:
07/06/2005
Publication #:
Pub Dt:
01/25/2007
Title:
SURROUND GATE ACCESS TRANSISTORS WITH GROWN ULTRA-THIN BODIES
76
Patent #:
Issue Dt:
07/07/2009
Application #:
11175864
Filing Dt:
07/05/2005
Publication #:
Pub Dt:
01/11/2007
Title:
SEMICONDUCTOR PROCESSING METHODS
77
Patent #:
Issue Dt:
03/27/2007
Application #:
11176738
Filing Dt:
07/07/2005
Publication #:
Pub Dt:
01/11/2007
Title:
METAL-SUBSTITUTED TRANSISTOR GATES
78
Patent #:
Issue Dt:
06/19/2007
Application #:
11176884
Filing Dt:
07/08/2005
Publication #:
Pub Dt:
01/11/2007
Title:
PROCESS FOR ERASING CHALCOGENIDE VARIABLE RESISTANCE MEMORY BITS
79
Patent #:
Issue Dt:
04/03/2007
Application #:
11176992
Filing Dt:
07/08/2005
Publication #:
Pub Dt:
12/01/2005
Title:
MERGED MOS-BIPOLAR CAPACITOR MEMORY CELL
80
Patent #:
Issue Dt:
12/07/2010
Application #:
11177238
Filing Dt:
07/07/2005
Publication #:
Pub Dt:
01/19/2006
Title:
CONSTANT DELAY ZERO STANDBY DIFFERENTIAL LOGIC RECEIVER AND METHOD
81
Patent #:
Issue Dt:
09/18/2007
Application #:
11177540
Filing Dt:
07/08/2005
Publication #:
Pub Dt:
01/11/2007
Title:
TIME DOMAIN BRIDGING CIRCUITRY FOR USE IN DETERMINING OUTPUT ENABLE TIMING
82
Patent #:
Issue Dt:
04/29/2008
Application #:
11177678
Filing Dt:
07/07/2005
Publication #:
Pub Dt:
01/11/2007
Title:
METHODS OF FORMING INTEGRATED CIRCUITRY AND METHODS OF FORMING LOCAL INTERCONNECTS
83
Patent #:
Issue Dt:
10/16/2007
Application #:
11177850
Filing Dt:
07/08/2005
Publication #:
Pub Dt:
01/11/2007
Title:
METHOD AND APPARATUS FOR A SELF-ALIGNED RECESSED ACCESS DEVICE (RAD) TRANSISTOR GATE
84
Patent #:
Issue Dt:
01/23/2007
Application #:
11177863
Filing Dt:
07/08/2005
Publication #:
Pub Dt:
11/03/2005
Title:
CIRCUITRY FOR A PROGRAMMABLE ELEMENT
85
Patent #:
Issue Dt:
01/12/2010
Application #:
11177905
Filing Dt:
07/07/2005
Publication #:
Pub Dt:
03/02/2006
Title:
MICROELECTRONIC IMAGERS HAVING FRONT SIDE CONTACTS
86
Patent #:
Issue Dt:
07/08/2008
Application #:
11178240
Filing Dt:
07/08/2005
Publication #:
Pub Dt:
02/09/2006
Title:
READ/VERIFY CIRCUIT FOR MULTILEVEL MEMORY CELLS WITH RAMP READ VOLTAGE, AND READ/VERIFY METHOD THEREOF
87
Patent #:
Issue Dt:
06/01/2010
Application #:
11178324
Filing Dt:
07/12/2005
Publication #:
Pub Dt:
01/18/2007
Title:
DUAL CONVERSION GAIN GATE AND CAPACITOR AND HDR COMBINATION
88
Patent #:
Issue Dt:
07/24/2007
Application #:
11178683
Filing Dt:
07/12/2005
Publication #:
Pub Dt:
01/18/2007
Title:
NEGATIVE VOLTAGE DISCHARGE SCHEME TO IMPROVE SNAPBACK IN A NON-VOLATILE MEMORY
89
Patent #:
Issue Dt:
02/28/2012
Application #:
11178914
Filing Dt:
07/11/2005
Publication #:
Pub Dt:
12/15/2005
Title:
NANOLAMINATES OF HAFNIUM OXIDE AND ZIRCONIUM OXIDE
90
Patent #:
Issue Dt:
08/28/2007
Application #:
11179351
Filing Dt:
07/12/2005
Publication #:
Pub Dt:
01/19/2006
Title:
PROGRAMMABLE SOFT-START CONTROL FOR CHARGE PUMP
91
Patent #:
Issue Dt:
04/11/2006
Application #:
11180493
Filing Dt:
07/13/2005
Publication #:
Pub Dt:
12/01/2005
Title:
MOISTURE-RESISTANT ELECTRONIC DEVICE PACKAGE AND METHODS OF ASSEMBLY
92
Patent #:
Issue Dt:
07/01/2008
Application #:
11181271
Filing Dt:
07/14/2005
Publication #:
Pub Dt:
11/10/2005
Title:
METHODS OF FORMING METAL-CONTAINING STRUCTURES
93
Patent #:
Issue Dt:
09/04/2007
Application #:
11181341
Filing Dt:
07/13/2005
Publication #:
Pub Dt:
01/18/2007
Title:
SYSTEMS AND METHODS FOR REMOVING MICROFEATURE WORKPIECE SURFACE DEFECTS
94
Patent #:
Issue Dt:
11/09/2010
Application #:
11181345
Filing Dt:
07/14/2005
Publication #:
Pub Dt:
01/18/2007
Title:
HIGH DENSITY NAND NON-VOLATILE MEMORY DEVICE
95
Patent #:
Issue Dt:
06/17/2008
Application #:
11181879
Filing Dt:
07/15/2005
Publication #:
Pub Dt:
11/10/2005
Title:
METHODS OF FORMING ASSEMBLIES DISPLAYING DIFFERENTIAL NEGATIVE RESISTANCE
96
Patent #:
Issue Dt:
07/07/2009
Application #:
11182160
Filing Dt:
07/15/2005
Publication #:
Pub Dt:
11/10/2005
Title:
ASSEMBLIES WITH BOND PADS OF TWO OR MORE SEMICONDUCTOR DEVICES ELECTRICALLY CONNECTED TO THE SAME SURFACE OF A PLURALITY OF LEADS
97
Patent #:
Issue Dt:
09/18/2007
Application #:
11182427
Filing Dt:
07/14/2005
Publication #:
Pub Dt:
01/19/2006
Title:
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
98
Patent #:
Issue Dt:
07/31/2007
Application #:
11182983
Filing Dt:
07/15/2005
Publication #:
Pub Dt:
12/01/2005
Title:
MEMORY DEVICES AND ELECTRONIC SYSTEMS COMPRISING THYRISTORS
99
Patent #:
Issue Dt:
06/08/2010
Application #:
11183229
Filing Dt:
07/14/2005
Publication #:
Pub Dt:
01/26/2006
Title:
PROGRAMMABLE NAND MEMORY
100
Patent #:
Issue Dt:
05/26/2009
Application #:
11183642
Filing Dt:
07/18/2005
Publication #:
Pub Dt:
01/18/2007
Title:
METHODS AND APPARATUS FOR DIVIDING A CLOCK SIGNAL
Assignor
1
Exec Dt:
07/31/2019
Assignees
1
8000 S FEDERAL WAY
BOISE, IDAHO 83707
2
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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