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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:038954/0001   Pages: 961
Recorded: 06/02/2016
Attorney Dkt #:065664/0012
Conveyance: PATENT SECURITY AGREEMENT
1
Patent #:
Issue Dt:
09/14/2004
Application #:
10098659
Filing Dt:
03/12/2002
Publication #:
Pub Dt:
07/18/2002
Title:
METHODS OF CONTACTING LINES AND METHODS OF FORMING AN ELECTRICAL CONTACT IN A SEMICONDUCTOR DEVICE
2
Patent #:
Issue Dt:
11/25/2003
Application #:
10098680
Filing Dt:
03/12/2002
Publication #:
Pub Dt:
09/18/2003
Title:
METHODS OF FORMING PROTECTIVE SEGMENTS OF MATERIAL, AND ETCH STOPS
3
Patent #:
Issue Dt:
01/13/2004
Application #:
10099169
Filing Dt:
03/13/2002
Publication #:
Pub Dt:
07/18/2002
Title:
LOW DIELECTRIC CONSTANT STI WITH SOI DEVICES
4
Patent #:
Issue Dt:
11/02/2004
Application #:
10099194
Filing Dt:
03/13/2002
Publication #:
Pub Dt:
09/18/2003
Title:
EVAPORATION OF Y-SI-O FILMS FOR MEDIUM-K DIELECTRICS
5
Patent #:
Issue Dt:
05/22/2007
Application #:
10099216
Filing Dt:
03/13/2002
Publication #:
Pub Dt:
10/02/2003
Title:
METHODS FOR TREATING SEMICONDUCTOR SUBSTRATES
6
Patent #:
Issue Dt:
06/26/2007
Application #:
10099217
Filing Dt:
03/13/2002
Publication #:
Pub Dt:
09/18/2003
Title:
HIGH PERMEABILITY LAYERED FILMS TO REDUCE NOISE IN HIGH SPEED INTERCONNECTS
7
Patent #:
Issue Dt:
05/04/2004
Application #:
10099624
Filing Dt:
03/14/2002
Publication #:
Pub Dt:
09/18/2003
Title:
ALUMINUM-CONTAINING MATERIAL AND ATOMIC LAYER DEPOSITION METHODS
8
Patent #:
Issue Dt:
04/06/2004
Application #:
10099840
Filing Dt:
03/12/2002
Publication #:
Pub Dt:
09/18/2003
Title:
METHODS OF FORMING PATTERNS AND MOLDS FOR SEMICONDUCTOR CONSTRUCTIONS
9
Patent #:
Issue Dt:
07/15/2008
Application #:
10100319
Filing Dt:
03/07/2002
Publication #:
Pub Dt:
10/03/2002
Title:
COMPOSITIONS FOR DISSOLUTION OF LOW-K DIELECTRIC FILMS, AND METHODS OF USE
10
Patent #:
Issue Dt:
09/09/2003
Application #:
10100397
Filing Dt:
03/18/2002
Publication #:
Pub Dt:
08/01/2002
Title:
SPUTTERED INSULATING LAYER FOR WORDLINE STACKS
11
Patent #:
Issue Dt:
12/20/2005
Application #:
10100702
Filing Dt:
03/18/2002
Publication #:
Pub Dt:
07/25/2002
Title:
INTEGRATED CIRCUIT INDUCTORS
12
Patent #:
Issue Dt:
11/16/2004
Application #:
10100706
Filing Dt:
03/18/2002
Publication #:
Pub Dt:
07/25/2002
Title:
INTEGRATED CIRCUIT INDUCTORS
13
Patent #:
Issue Dt:
06/17/2008
Application #:
10100709
Filing Dt:
03/18/2002
Publication #:
Pub Dt:
07/25/2002
Title:
INTEGRATED CIRCUIT INDUCTORS
14
Patent #:
Issue Dt:
11/30/2004
Application #:
10100710
Filing Dt:
03/18/2002
Publication #:
Pub Dt:
07/25/2002
Title:
INTEGRATED CIRCUIT INDUCTORS
15
Patent #:
Issue Dt:
06/28/2005
Application #:
10100715
Filing Dt:
03/18/2002
Publication #:
Pub Dt:
07/25/2002
Title:
INTEGRATED CIRCUIT INDUCTORS
16
Patent #:
Issue Dt:
01/02/2007
Application #:
10100720
Filing Dt:
03/18/2002
Publication #:
Pub Dt:
07/25/2002
Title:
INTEGRATED CIRCUIT INDUCTORS
17
Patent #:
Issue Dt:
08/24/2004
Application #:
10100789
Filing Dt:
03/19/2002
Publication #:
Pub Dt:
07/25/2002
Title:
INTEGRATED CIRCUIT INDUCTORS
18
Patent #:
Issue Dt:
05/31/2005
Application #:
10101142
Filing Dt:
03/18/2002
Publication #:
Pub Dt:
07/25/2002
Title:
INTEGRATED CIRCUIT INDUCTORS
19
Patent #:
Issue Dt:
02/01/2005
Application #:
10101403
Filing Dt:
03/18/2002
Publication #:
Pub Dt:
07/25/2002
Title:
INTEGRATED CIRCUIT INDUCTORS
20
Patent #:
Issue Dt:
11/23/2004
Application #:
10101404
Filing Dt:
03/18/2002
Publication #:
Pub Dt:
07/25/2002
Title:
INTEGRATED CIRCUIT INDUCTORS
21
Patent #:
Issue Dt:
11/11/2003
Application #:
10101419
Filing Dt:
03/18/2002
Publication #:
Pub Dt:
08/01/2002
Title:
INTEGRATED CIRCUIT INDUCTORS
22
Patent #:
Issue Dt:
08/15/2006
Application #:
10101750
Filing Dt:
03/21/2002
Publication #:
Pub Dt:
09/25/2003
Title:
METHOD OF FORMING INTEGRATED CIRCUIT STRUCTURES IN SILICONE LADDER POLYMER
23
Patent #:
Issue Dt:
03/09/2004
Application #:
10102070
Filing Dt:
03/19/2002
Publication #:
Pub Dt:
07/25/2002
Title:
INTEGRATED CIRCUIT INDUCTORS
24
Patent #:
Issue Dt:
07/13/2004
Application #:
10102071
Filing Dt:
03/19/2002
Publication #:
Pub Dt:
08/01/2002
Title:
INTEGRATED CIRCUIT INDUCTORS
25
Patent #:
Issue Dt:
07/18/2006
Application #:
10102110
Filing Dt:
03/19/2002
Publication #:
Pub Dt:
07/25/2002
Title:
LOW K INTERLEVEL DIELECTRIC LAYER FABRICATION METHODS
26
Patent #:
Issue Dt:
05/20/2008
Application #:
10102215
Filing Dt:
03/19/2002
Publication #:
Pub Dt:
07/25/2002
Title:
SYSTEM FOR AUTOMATICALLY INITIATING A COMPUTER SECURITY AND/OR SCREEN SAVER MODE
27
Patent #:
Issue Dt:
02/10/2004
Application #:
10102221
Filing Dt:
03/19/2002
Publication #:
Pub Dt:
09/25/2003
Title:
ASYNCHRONOUS INTERFACE CIRCUIT AND METHOD FOR A PSEUDO-STATIC MEMORY DEVICE
28
Patent #:
Issue Dt:
04/19/2005
Application #:
10102304
Filing Dt:
03/19/2002
Publication #:
Pub Dt:
07/25/2002
Title:
METHOD OF PROCESSING SELECTED SURFACES IN A SEMICONDUCTOR PROCESS CHAMBER BASED ON A TEMPERATURE DIFFERENTIAL BETWEEN SURFACES
29
Patent #:
Issue Dt:
09/27/2005
Application #:
10102420
Filing Dt:
03/19/2002
Publication #:
Pub Dt:
07/25/2002
Title:
INTEGRATED CIRCUIT INDUCTORS
30
Patent #:
Issue Dt:
09/19/2006
Application #:
10104341
Filing Dt:
03/22/2002
Publication #:
Pub Dt:
09/25/2003
Title:
METHOD AND APPARATUS FOR SYSTEM MANAGEMENT APPLICATIONS USING A LOCAL CONTROLLER
31
Patent #:
Issue Dt:
08/17/2004
Application #:
10105672
Filing Dt:
03/25/2002
Publication #:
Pub Dt:
09/25/2003
Title:
FILMS DEPOSITED AT GLANCING INCIDENCE FOR MULTILEVEL METALLIZATION
32
Patent #:
Issue Dt:
08/09/2005
Application #:
10106009
Filing Dt:
03/25/2002
Publication #:
Pub Dt:
09/25/2003
Title:
INTEGRATED CIRCUIT ASSEMBLIES AND ASSEMBLY METHODS
33
Patent #:
Issue Dt:
11/07/2006
Application #:
10106915
Filing Dt:
03/25/2002
Publication #:
Pub Dt:
09/25/2003
Title:
LOW K INTERCONNECT DIELECTRIC USING SURFACE TRANSFORMATION
34
Patent #:
Issue Dt:
09/13/2005
Application #:
10106916
Filing Dt:
03/25/2002
Publication #:
Pub Dt:
09/25/2003
Title:
SCALABLE HIGH PERFORMANCE ANTIFUSE STRUCTURE AND PROCESS
35
Patent #:
Issue Dt:
01/27/2004
Application #:
10107605
Filing Dt:
03/26/2002
Publication #:
Pub Dt:
10/02/2003
Title:
METHODS OF OPERATING MRAM DEVICES
36
Patent #:
Issue Dt:
03/18/2003
Application #:
10107764
Filing Dt:
03/27/2002
Publication #:
Pub Dt:
08/01/2002
Title:
UTILIZATION OF DISAPPEARING SILICON HARD MASK FOR FABRICATION OF SEMICONDUCTOR STRUCTURES
37
Patent #:
Issue Dt:
07/29/2003
Application #:
10107884
Filing Dt:
03/28/2002
Title:
Semiconductor component and system for fabricating contacts on semiconductor components
38
Patent #:
Issue Dt:
06/21/2005
Application #:
10108013
Filing Dt:
03/26/2002
Publication #:
Pub Dt:
10/02/2003
Title:
METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
39
Patent #:
Issue Dt:
06/27/2006
Application #:
10108067
Filing Dt:
03/26/2002
Publication #:
Pub Dt:
11/07/2002
Title:
CHEMICAL-MECHANICAL POLISHING METHODS
40
Patent #:
Issue Dt:
12/09/2003
Application #:
10109421
Filing Dt:
03/27/2002
Publication #:
Pub Dt:
10/02/2003
Title:
METHOD OF FORMING A NON-VOLATILE RESISTANCE VARIABLE DEVICE AND METHOD OF FORMING A METAL LAYER COMPRISING SILVER AND TUNGSTEN
41
Patent #:
Issue Dt:
03/04/2003
Application #:
10109757
Filing Dt:
03/28/2002
Publication #:
Pub Dt:
07/25/2002
Title:
ELECTRICALLY PROGRAMMABLE PHOTOLITHOGRAPHY MASK
42
Patent #:
Issue Dt:
08/26/2003
Application #:
10112173
Filing Dt:
03/29/2002
Publication #:
Pub Dt:
03/06/2003
Title:
SYSTEM AND METHOD FOR SKEW COMPENSATING A CLOCK SIGNAL AND FOR CAPTURING A DIGITAL SIGNAL USING THE SKEW COMPENSATED CLOCK SIGNAL
43
Patent #:
Issue Dt:
09/30/2003
Application #:
10112380
Filing Dt:
03/28/2002
Publication #:
Pub Dt:
08/15/2002
Title:
CIRCUIT AND METHOD FOR CONTACT PAD ISOLATION
44
Patent #:
Issue Dt:
07/27/2004
Application #:
10112774
Filing Dt:
04/02/2002
Publication #:
Pub Dt:
08/15/2002
Title:
SETPOINT SILICON CONTROLLED RECTIFIER (SCR) ELECTROSTATIC DISCHARGE (ESD) CORE CLAMP
45
Patent #:
Issue Dt:
05/27/2003
Application #:
10113995
Filing Dt:
03/29/2002
Publication #:
Pub Dt:
10/03/2002
Title:
METHOD FOR DISABLING AND RE-ENABLING ACCESS TO IC TEST FUNCTIONS
46
Patent #:
Issue Dt:
09/14/2004
Application #:
10114134
Filing Dt:
04/02/2002
Publication #:
Pub Dt:
08/15/2002
Title:
WAFER ON WAFER PACKAGING AND METHOD OF FABRICATION FOR FULL-WAFER BURN-IN AND TESTING
47
Patent #:
Issue Dt:
11/25/2003
Application #:
10114558
Filing Dt:
04/02/2002
Publication #:
Pub Dt:
07/25/2002
Title:
WAFER ON WAFER PACKAGING AND METHOD OF FABRICATION FOR FULL-WAFER BURN-IN AND TESTING
48
Patent #:
Issue Dt:
05/09/2006
Application #:
10114759
Filing Dt:
04/02/2002
Publication #:
Pub Dt:
10/03/2002
Title:
METHOD OF FORMING A BARRIER SEED LAYER WITH GRADED NITROGEN COMPOSITION
49
Patent #:
Issue Dt:
02/06/2007
Application #:
10115117
Filing Dt:
04/01/2002
Publication #:
Pub Dt:
08/15/2002
Title:
FLASH MEMORY CARD WITH ENHANCED OPERATING MODE DETECTION AND USER-FRIENDLY INTERFACING SYSTEM
50
Patent #:
Issue Dt:
07/12/2005
Application #:
10115888
Filing Dt:
04/03/2002
Publication #:
Pub Dt:
12/05/2002
Title:
DEVICE AND METHOD FOR AUTOMATICALLY GENERATING AN APPROPRIATE NUMBER OF WAIT CYCLES WHILE READING A NONVOLATILE MEMORY
51
Patent #:
Issue Dt:
05/06/2003
Application #:
10115960
Filing Dt:
04/05/2002
Publication #:
Pub Dt:
08/08/2002
Title:
CHIP CARRIER WITH MAGNETIC SHIELDING
52
Patent #:
Issue Dt:
04/15/2003
Application #:
10116385
Filing Dt:
04/02/2002
Publication #:
Pub Dt:
08/08/2002
Title:
BATCH PROCESSING FOR SEMICONDUCTOR WAFERS TO FORM ALUMINUM NITRIDE AND TITANIUM ALUMINUM NITRIDE
53
Patent #:
Issue Dt:
09/19/2006
Application #:
10116645
Filing Dt:
04/04/2002
Publication #:
Pub Dt:
10/09/2003
Title:
METHOD AND APPARATUS FOR ATTACHING MICROELECTRONIC SUBSTRATES AND SUPPORT MEMBERS
54
Patent #:
Issue Dt:
02/18/2003
Application #:
10116809
Filing Dt:
04/04/2002
Publication #:
Pub Dt:
12/19/2002
Title:
SEMICONDUCTOR CMOS STRUCTURES WITH AN UNDOPED REGION
55
Patent #:
Issue Dt:
05/06/2003
Application #:
10116962
Filing Dt:
04/05/2002
Publication #:
Pub Dt:
08/22/2002
Title:
USE OF PALLADIUM IN IC MANUFACTURING WITH CONDUCTIVE POLYMER BUMP
56
Patent #:
Issue Dt:
07/29/2003
Application #:
10117036
Filing Dt:
04/08/2002
Publication #:
Pub Dt:
08/15/2002
Title:
DOUBLE SIDED CONTAINER CAPACITOR FOR DRAM CELL ARRAY AND METHOD OF FORMING SAME
57
Patent #:
Issue Dt:
09/12/2006
Application #:
10117041
Filing Dt:
04/05/2002
Publication #:
Pub Dt:
08/15/2002
Title:
INTEGRATED CIRCUIT AND SEED LAYERS
58
Patent #:
Issue Dt:
01/02/2007
Application #:
10117101
Filing Dt:
04/08/2002
Publication #:
Pub Dt:
08/22/2002
Title:
A CAPACITOR WITH NOBLE METAL PATTERN
59
Patent #:
Issue Dt:
04/20/2004
Application #:
10117145
Filing Dt:
04/05/2002
Publication #:
Pub Dt:
12/12/2002
Title:
METHOD AND APPARATUS FOR PLANARIZING A MICROELECTRONIC SUBSTRATE WITH A TILTED PLANARIZING SURFACE
60
Patent #:
Issue Dt:
07/08/2003
Application #:
10117244
Filing Dt:
04/05/2002
Publication #:
Pub Dt:
08/15/2002
Title:
NONLOT BASED METHOD FOR ASSEMBLING INTEGRATED CIRCUIT DEVICES
61
Patent #:
Issue Dt:
01/18/2005
Application #:
10117551
Filing Dt:
04/04/2002
Publication #:
Pub Dt:
10/09/2003
Title:
MICROELECTRONIC PACKAGE WITH REDUCED UNDERFILL AND METHODS FOR FORMING SUCH PACKAGES
62
Patent #:
Issue Dt:
05/25/2004
Application #:
10117738
Filing Dt:
04/05/2002
Publication #:
Pub Dt:
09/26/2002
Title:
METHOD AND APPARATUS FOR PLANARIZING A MICROELECTRONIC SUBSTRATE WITH A TILTED PLANARIZING SURFACE
63
Patent #:
Issue Dt:
01/13/2004
Application #:
10118281
Filing Dt:
04/08/2002
Publication #:
Pub Dt:
10/09/2003
Title:
DISTRIBUTED FIFO IN SYNCHRONOUS MEMORY
64
Patent #:
Issue Dt:
09/18/2007
Application #:
10118349
Filing Dt:
04/08/2002
Publication #:
Pub Dt:
10/09/2003
Title:
METHODS AND APPARATUS FOR DETERMINING A FLOATING-POINT EXPONENT ASSOCIATED WITH AN UNDERFLOW CONDITION OR AN OVERFLOW CONDITION
65
Patent #:
Issue Dt:
04/04/2006
Application #:
10118350
Filing Dt:
04/09/2002
Publication #:
Pub Dt:
10/09/2003
Title:
METHOD OF FORMING SPATIAL REGIONS OF A SECOND MATERIAL IN A FIRST MATERIAL
66
Patent #:
Issue Dt:
03/11/2003
Application #:
10118365
Filing Dt:
04/08/2002
Publication #:
Pub Dt:
08/22/2002
Title:
METHODS FOR TRANSVERSE HYBRID LOC PACKAGE
67
Patent #:
Issue Dt:
02/24/2009
Application #:
10118393
Filing Dt:
04/05/2002
Publication #:
Pub Dt:
10/09/2003
Title:
METHODS OF FORMING SEMICONDUCTOR-ON-INSULATOR CONSTRUCTIONS
68
Patent #:
Issue Dt:
08/31/2004
Application #:
10118569
Filing Dt:
04/08/2002
Publication #:
Pub Dt:
10/09/2003
Title:
PROCESS FOR MAKING A SILICON-ON-INSULATOR LEDGE BY IMPLANTING IONS FROM SILICON SOURCE
69
Patent #:
Issue Dt:
01/09/2007
Application #:
10118580
Filing Dt:
04/08/2002
Publication #:
Pub Dt:
03/13/2003
Title:
BOW CONTROL IN AN ELECTRONIC PACKAGE
70
Patent #:
Issue Dt:
07/08/2003
Application #:
10118582
Filing Dt:
04/08/2002
Publication #:
Pub Dt:
08/15/2002
Title:
COMPUTER HOUSING WITH EXPANSION BAY COVER AND METHODS FOR OPERATING EXPANSION BAY COVERS
71
Patent #:
Issue Dt:
12/02/2003
Application #:
10118660
Filing Dt:
04/08/2002
Publication #:
Pub Dt:
12/12/2002
Title:
READING CIRCUIT AND METHOD FOR A MULTILEVEL NON-VOLATILE MEMORY
72
Patent #:
Issue Dt:
05/20/2003
Application #:
10118844
Filing Dt:
04/09/2002
Publication #:
Pub Dt:
08/15/2002
Title:
REMOTE SEMICONDUCTOR MICROSCOPY
73
Patent #:
Issue Dt:
10/26/2004
Application #:
10118891
Filing Dt:
04/10/2002
Publication #:
Pub Dt:
10/16/2003
Title:
WORDLINE DRIVEN METHOD FOR SENSING DATA IN A RESISTIVE MEMORY ARRAY
74
Patent #:
Issue Dt:
01/13/2004
Application #:
10118947
Filing Dt:
04/10/2002
Publication #:
Pub Dt:
08/15/2002
Title:
METHOD OF FORMING A METAL TO POLYSILICON CONTACT IN OXYGEN ENVIRONMENT
75
Patent #:
Issue Dt:
01/27/2004
Application #:
10119461
Filing Dt:
04/10/2002
Publication #:
Pub Dt:
08/15/2002
Title:
METHOD OF USING A SEMICONDUCTOR CHIP PACKAGE
76
Patent #:
Issue Dt:
09/07/2004
Application #:
10119523
Filing Dt:
04/09/2002
Publication #:
Pub Dt:
12/19/2002
Title:
METHOD FOR PROGRAMMING NONVOLATILE MEMORY CELLS WITH PROGRAM AND VERIFY ALGORITHM USING A STAIRCASE VOLTAGE WITH VARYING STEP AMPLITUDE
77
Patent #:
Issue Dt:
01/04/2005
Application #:
10119550
Filing Dt:
04/09/2002
Publication #:
Pub Dt:
10/09/2003
Title:
METHOD AND SYSTEM FOR DYNAMICALLY OPERATING MEMORY IN A POWER-SAVING ERROR CORRECTION MODE
78
Patent #:
Issue Dt:
12/09/2003
Application #:
10119655
Filing Dt:
04/10/2002
Publication #:
Pub Dt:
08/15/2002
Title:
METHOD AND APPARATUS FOR PACKAGING FLIP CHIP BARE DIE ON PRINTED CIRCUIT BOARDS
79
Patent #:
Issue Dt:
09/07/2004
Application #:
10120169
Filing Dt:
04/10/2002
Publication #:
Pub Dt:
10/16/2003
Title:
SOLDER MASKS FOR USE ON CARRIER SUBSTRATES, CARRIER SUBSTRATES AND SEMICONDUCTOR DEVICE ASSEMBLIES INCLUDING SUCH SOLDER MASKS, AND METHODS
80
Patent #:
Issue Dt:
02/03/2004
Application #:
10121085
Filing Dt:
04/10/2002
Publication #:
Pub Dt:
10/16/2003
Title:
METHOD AND SYSTEM FOR WRITING DATA IN AN MRAM MEMORY DEVICE
81
Patent #:
Issue Dt:
10/21/2003
Application #:
10121218
Filing Dt:
04/11/2002
Publication #:
Pub Dt:
08/22/2002
Title:
STRESS REDUCTION FEATURE FOR LOC LEAD FRAME
82
Patent #:
Issue Dt:
04/06/2004
Application #:
10121265
Filing Dt:
04/11/2002
Publication #:
Pub Dt:
10/03/2002
Title:
METHODS EMPLOYING HYBRID ADHESIVE MATERIALS TO SECURE COMPONENTS OF SEMICONDUCTOR DEVICE ASSEMBLIES AND PACKAGES TO ONE ANOTHER AND ASSEMBLIES AND PACKAGES INCLUDING COMPONENTS SECURED TO ONE ANOTHER WITH SUCH HYBRID ADHESIVE MATERIALS
83
Patent #:
Issue Dt:
09/30/2003
Application #:
10121298
Filing Dt:
04/11/2002
Publication #:
Pub Dt:
10/16/2003
Title:
SEMICONDUCTOR CONSTRUCTIONS AND METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
84
Patent #:
Issue Dt:
09/02/2003
Application #:
10121302
Filing Dt:
04/11/2002
Title:
A METHOD OF REPLACING AT LEAST A PORTION OF A SEMICONDUCTOR SUBSTRATE DEPOSITION CHAMBER LINER
85
Patent #:
Issue Dt:
01/25/2005
Application #:
10121320
Filing Dt:
04/11/2002
Publication #:
Pub Dt:
10/16/2003
Title:
DEPOSITION METHODS UTILIZING MICROWAVE EXCITATION, AND DEPOSITION APPARATUSES
86
Patent #:
Issue Dt:
06/01/2004
Application #:
10121341
Filing Dt:
04/11/2002
Publication #:
Pub Dt:
10/16/2003
Title:
REACTIVE GASEOUS DEPOSITION PRECURSOR FEED APPARATUS
87
Patent #:
Issue Dt:
12/30/2003
Application #:
10121645
Filing Dt:
04/12/2002
Publication #:
Pub Dt:
08/15/2002
Title:
METHOD OF DECONTAMINATING PROCESS CHAMBERS, METHODS OF REDUCING DEFECTS IN ANTI-REFLECTIVE COATINGS, AND RESULTING SEMICONDUCTOR STRUCTURES
88
Patent #:
Issue Dt:
11/11/2003
Application #:
10121694
Filing Dt:
04/15/2002
Publication #:
Pub Dt:
09/26/2002
Title:
EFFICIENT FABRICATION PROCESS FOR DUAL WELL TYPE STRUCTURES
89
Patent #:
Issue Dt:
02/22/2005
Application #:
10121792
Filing Dt:
04/10/2002
Publication #:
Pub Dt:
10/16/2003
Title:
METHOD OF MANUFACTURE OF PROGRAMMABLE CONDUCTOR MEMORY
90
Patent #:
Issue Dt:
11/25/2003
Application #:
10121826
Filing Dt:
04/11/2002
Publication #:
Pub Dt:
08/15/2002
Title:
METHOD AND APPARATUS FOR UNIFORMLY PLANARIZING A MICROELECTRONIC SUBSTRATE
91
Patent #:
Issue Dt:
07/03/2007
Application #:
10122381
Filing Dt:
04/16/2002
Publication #:
Pub Dt:
11/06/2003
Title:
APPARATUS AND METHOD TO FACILITATE HIERARCHICAL NETLIST CHECKING
92
Patent #:
Issue Dt:
04/05/2005
Application #:
10123050
Filing Dt:
04/12/2002
Publication #:
Pub Dt:
10/16/2003
Title:
LARGE SCALE SYNTHESIS OF GERMANIUM SELENIDE GLASS AND GERMANIUM SELENIDE GLASS COMPOUNDS
93
Patent #:
Issue Dt:
03/25/2003
Application #:
10123328
Filing Dt:
04/15/2002
Title:
METHOD FOR FABRICATING SEMICONDUCTOR COMPONENTS WITH TERMINAL CONTACTS HAVING ALTERNATE ELECTRICAL PATHS
94
Patent #:
Issue Dt:
08/19/2003
Application #:
10123579
Filing Dt:
04/15/2002
Publication #:
Pub Dt:
10/17/2002
Title:
METHOD OF MANUFACTURING A SINGLE ELECTRON RESISTOR MEMORY DEVICE
95
Patent #:
Issue Dt:
04/08/2003
Application #:
10123580
Filing Dt:
04/15/2002
Publication #:
Pub Dt:
10/17/2002
Title:
METHOD OF MANUFACTURING A SINGLE ELECTRON RESISTOR MEMORY DEVICE
96
Patent #:
Issue Dt:
10/02/2007
Application #:
10123827
Filing Dt:
04/15/2002
Publication #:
Pub Dt:
10/16/2003
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT PACKAGE HAVING ELECTRICALLY DISCONNECTED SOLDER BALLS FOR MOUNTING
97
Patent #:
Issue Dt:
04/27/2004
Application #:
10123874
Filing Dt:
04/16/2002
Publication #:
Pub Dt:
12/05/2002
Title:
METHOD AND CIRCUIT FOR TIMING DYNAMIC READING OF A MEMORY CELL WITH CONTROL OF THE INTEGRATION TIME
98
Patent #:
Issue Dt:
08/12/2008
Application #:
10124019
Filing Dt:
04/16/2002
Publication #:
Pub Dt:
02/27/2003
Title:
VERTICAL TRANSISTOR WITH HORIZONTAL GATE LAYERS
99
Patent #:
Issue Dt:
04/03/2007
Application #:
10125331
Filing Dt:
04/18/2002
Publication #:
Pub Dt:
10/23/2003
Title:
REDUCING DATA HAZARDS IN PIPELINED PROCESSORS TO PROVIDE HIGH PROCESSOR UTILIZATION
100
Patent #:
Issue Dt:
06/01/2004
Application #:
10125979
Filing Dt:
04/19/2002
Publication #:
Pub Dt:
08/15/2002
Title:
TRANSISTOR DEVICES
Assignor
1
Exec Dt:
04/26/2016
Assignee
1
1300 THAMES STREET, 4TH FLOOR
BALTIMORE, MARYLAND 21231
Correspondence name and address
GENEVIEVE DORMENT, ESQ.
SIMPSON THACHER & BARTLETT LLP
425 LEXINGTON AVENUE
NEW YORK, NY 10017

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