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Reel/Frame:047540/0001   Pages: 843
Recorded: 07/13/2018
Attorney Dkt #:509265/2155
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
04/14/2009
Application #:
11219132
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
METHODS FOR FORMING THROUGH-WAFER INTERCONNECTS AND STRUCTURES RESULTING THEREFROM
2
Patent #:
Issue Dt:
09/25/2007
Application #:
11219302
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
04/19/2007
Title:
MEASURE CONTROL DELAY AND METHOD HAVING LATCHING CIRCUIT INTEGRAL WITH DELAY CIRCUIT
3
Patent #:
Issue Dt:
07/07/2009
Application #:
11219303
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
SILICIDED RECESSED SILICON
4
Patent #:
Issue Dt:
08/26/2008
Application #:
11219304
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
PERIPHERAL GATE STACKS AND RECESSED ARRAY GATES
5
Patent #:
Issue Dt:
08/17/2010
Application #:
11219346
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
PITCH MULTIPLICATION SPACERS AND METHODS OF FORMING THE SAME
6
Patent #:
Issue Dt:
03/30/2010
Application #:
11219349
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
METHOD OF MANUFACTURING A MEMORY DEVICE
7
Patent #:
Issue Dt:
04/21/2009
Application #:
11219535
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/15/2007
Title:
NON-VOLATILE MEMORY WITH ERROR DETECTION
8
Patent #:
Issue Dt:
12/25/2007
Application #:
11219540
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
01/12/2006
Title:
METHOD AND SYSTEM FOR MONITORING PLASMA USING OPTICAL EMISSION SPECTROMETRY
9
Patent #:
Issue Dt:
07/01/2008
Application #:
11219604
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
PROTECTIVE COATING FOR PLANARIZATION
10
Patent #:
Issue Dt:
06/26/2007
Application #:
11220202
Filing Dt:
09/06/2005
Publication #:
Pub Dt:
01/19/2006
Title:
LOW VOLTAGE COMPARATOR
11
Patent #:
Issue Dt:
11/21/2006
Application #:
11220231
Filing Dt:
09/06/2005
Publication #:
Pub Dt:
03/02/2006
Title:
ZERO-ENABLED FUSE-SET
12
Patent #:
Issue Dt:
06/05/2007
Application #:
11220670
Filing Dt:
09/08/2005
Publication #:
Pub Dt:
01/12/2006
Title:
PHOTODIODE WITH ULTRA-SHALLOW JUNCTION FOR HIGH QUANTUM EFFICIENCY CMOS IMAGE SENSOR AND METHOD OF FORMATION
13
Patent #:
Issue Dt:
10/02/2007
Application #:
11221521
Filing Dt:
09/07/2005
Publication #:
Pub Dt:
01/12/2006
Title:
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
14
Patent #:
Issue Dt:
05/05/2009
Application #:
11221539
Filing Dt:
09/07/2005
Publication #:
Pub Dt:
01/05/2006
Title:
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
15
Patent #:
Issue Dt:
03/20/2007
Application #:
11222365
Filing Dt:
09/07/2005
Publication #:
Pub Dt:
01/05/2006
Title:
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
16
Patent #:
Issue Dt:
12/04/2007
Application #:
11222462
Filing Dt:
09/07/2005
Publication #:
Pub Dt:
01/12/2006
Title:
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
17
Patent #:
Issue Dt:
06/30/2009
Application #:
11223045
Filing Dt:
09/12/2005
Publication #:
Pub Dt:
03/01/2007
Title:
METHOD AND APPARATUS PROVIDING PIXEL ARRAY HAVING AUTOMATIC LIGHT CONTROL PIXELS AND IMAGE CAPTURE PIXELS
18
Patent #:
Issue Dt:
03/06/2007
Application #:
11225450
Filing Dt:
09/13/2005
Publication #:
Pub Dt:
01/12/2006
Title:
METHOD AND STRUCTURE FOR REDUCING RESISTANCE OF A SEMICONDUCTOR DEVICE FEATURE
19
Patent #:
Issue Dt:
04/07/2009
Application #:
11226978
Filing Dt:
09/15/2005
Publication #:
Pub Dt:
01/12/2006
Title:
SEMICONDUCTOR DEVICE
20
Patent #:
Issue Dt:
05/15/2007
Application #:
11230773
Filing Dt:
09/20/2005
Publication #:
Pub Dt:
01/19/2006
Title:
SMALL GRAIN SIZE, CONFORMAL ALUMINUM INTERCONNECTS AND METHOD FOR THEIR FORMATION
21
Patent #:
Issue Dt:
01/29/2008
Application #:
11232202
Filing Dt:
09/21/2005
Publication #:
Pub Dt:
02/02/2006
Title:
APPARATUS AND METHOD FOR PRINTING MICRO METAL STRUCTURES
22
Patent #:
Issue Dt:
01/27/2009
Application #:
11233464
Filing Dt:
09/22/2005
Publication #:
Pub Dt:
03/23/2006
Title:
MEMORY DEVICE WITH UNIPOLAR AND BIPOLAR SELECTORS
23
Patent #:
Issue Dt:
08/28/2007
Application #:
11233569
Filing Dt:
09/23/2005
Publication #:
Pub Dt:
01/26/2006
Title:
REDUCTION OF FIELD EDGE THINNING IN PERIPHERAL DEVICES
24
Patent #:
Issue Dt:
01/26/2010
Application #:
11233714
Filing Dt:
09/23/2005
Publication #:
Pub Dt:
01/26/2006
Title:
ANIMATION PACKAGER FOR AN ON-LINE BOOK
25
Patent #:
Issue Dt:
04/29/2008
Application #:
11233967
Filing Dt:
09/23/2005
Publication #:
Pub Dt:
02/02/2006
Title:
METHODS OF FORMING METAL OXIDE AND SEMIMETAL OXIDE
26
Patent #:
Issue Dt:
04/15/2008
Application #:
11234000
Filing Dt:
09/23/2005
Publication #:
Pub Dt:
01/26/2006
Title:
DEVICE HAVING CONTACT PAD WITH A CONDUCTIVE LAYER AND A CONDUCTIVE PASSIVATION LAYER
27
Patent #:
Issue Dt:
06/26/2007
Application #:
11236115
Filing Dt:
09/26/2005
Publication #:
Pub Dt:
02/02/2006
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY AND SEMICONDUCTOR PROCESSING METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMORY (DRAM) CIRCUITRY
28
Patent #:
Issue Dt:
01/02/2007
Application #:
11237396
Filing Dt:
09/28/2005
Publication #:
Pub Dt:
03/02/2006
Title:
SEMICONDUCTOR CONSTRUCTIONS
29
Patent #:
Issue Dt:
07/10/2007
Application #:
11238137
Filing Dt:
09/28/2005
Publication #:
Pub Dt:
04/13/2006
Title:
READING CIRCUIT AND METHOD FOR A NONVOLATILE MEMORY DEVICE
30
Patent #:
Issue Dt:
09/16/2008
Application #:
11240004
Filing Dt:
09/30/2005
Publication #:
Pub Dt:
04/05/2007
Title:
METHOD AND APPARATUS FOR OPTIMIZING FLASH DEVICE ERASE DISTRIBUTION
31
Patent #:
Issue Dt:
02/10/2009
Application #:
11240099
Filing Dt:
09/30/2005
Publication #:
Pub Dt:
02/09/2006
Title:
SYSTEM AND METHOD FOR PROCESSOR WITH PREDICTIVE MEMORY RETRIEVAL ASSIST
32
Patent #:
Issue Dt:
07/22/2008
Application #:
11241486
Filing Dt:
09/29/2005
Publication #:
Pub Dt:
02/09/2006
Title:
ATOMIC LAYER DEPOSITION METHODS
33
Patent #:
Issue Dt:
08/12/2008
Application #:
11241488
Filing Dt:
09/29/2005
Publication #:
Pub Dt:
02/09/2006
Title:
SEMICONDUCTOR SUBSTRATE
34
Patent #:
Issue Dt:
04/01/2008
Application #:
11241517
Filing Dt:
09/30/2005
Publication #:
Pub Dt:
01/26/2006
Title:
METHODS OF FORMING A TRANSISTOR WITH AN INTEGRATED METAL SILICIDE GATE ELECTRODE
35
Patent #:
Issue Dt:
01/29/2008
Application #:
11241729
Filing Dt:
09/30/2005
Publication #:
Pub Dt:
08/03/2006
Title:
MEMORY DEVICE AND METHOD FOR OPERATING THE SAME WITH HIGH REJECTION OF THE NOISE ON THE HIGH-VOLTAGE SUPPLY LINE
36
Patent #:
Issue Dt:
01/20/2009
Application #:
11242224
Filing Dt:
10/03/2005
Publication #:
Pub Dt:
02/09/2006
Title:
METHOD FOR FABRICATING SEMICONDUCTOR PACKAGE WITH CIRCUIT SIDE POLYMER LAYER
37
Patent #:
Issue Dt:
09/11/2007
Application #:
11242557
Filing Dt:
10/03/2005
Publication #:
Pub Dt:
02/09/2006
Title:
METHODS FOR SECURING COMPONENTS OF SEMICONDUCTOR DEVICE ASSEMBLIES TO EACH OTHER WITH ADHESIVE MATERIALS THAT INCLUDE PRESSURE-SENSITIVE AND CURABLE COMPONENTS
38
Patent #:
Issue Dt:
01/20/2009
Application #:
11242905
Filing Dt:
10/05/2005
Publication #:
Pub Dt:
04/13/2006
Title:
SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING APPARATUS
39
Patent #:
Issue Dt:
01/08/2008
Application #:
11243702
Filing Dt:
10/05/2005
Publication #:
Pub Dt:
02/09/2006
Title:
INTERCONNECT FOR BUMPED SEMICONDUCTOR COMPONENTS
40
Patent #:
Issue Dt:
03/13/2007
Application #:
11243825
Filing Dt:
10/05/2005
Publication #:
Pub Dt:
02/09/2006
Title:
TECHNIQUE TO SIMULTANEOUSLY DISTRIBUTE CLOCK SIGNALS AND DATA ON INTEGRATED CIRCUITS, INTERPOSERS, AND CIRCUIT BOARDS
41
Patent #:
Issue Dt:
06/11/2013
Application #:
11243925
Filing Dt:
10/04/2005
Publication #:
Pub Dt:
02/09/2006
Title:
SUBSTRATE COMPRISING A PLURALITY OF INTEGRATED CIRCUITRY DIE, AND A SUBSTRATE
42
Patent #:
Issue Dt:
09/01/2009
Application #:
11244859
Filing Dt:
10/06/2005
Publication #:
Pub Dt:
04/12/2007
Title:
ATOMIC LAYER DEPOSITION METHODS
43
Patent #:
Issue Dt:
12/19/2006
Application #:
11245765
Filing Dt:
10/07/2005
Publication #:
Pub Dt:
02/09/2006
Title:
6F2 3-TRANSISTOR DRAM GAIN CELL
44
Patent #:
Issue Dt:
02/20/2007
Application #:
11246469
Filing Dt:
10/07/2005
Publication #:
Pub Dt:
02/09/2006
Title:
VARIABLE RESISTANCE CIRCUIT
45
Patent #:
Issue Dt:
01/02/2007
Application #:
11246515
Filing Dt:
10/07/2005
Publication #:
Pub Dt:
02/09/2006
Title:
METHOD AND APPARATUS FOR FORMING METAL CONTACTS ON A SUBSTRATE
46
Patent #:
Issue Dt:
07/18/2006
Application #:
11246755
Filing Dt:
10/07/2005
Publication #:
Pub Dt:
02/09/2006
Title:
METHODS OF FABRICATING INTEGRATED CIRCUITRY
47
Patent #:
Issue Dt:
04/10/2007
Application #:
11247043
Filing Dt:
10/11/2005
Publication #:
Pub Dt:
02/09/2006
Title:
SOURCE LINES FOR NAND MEMORY DEVICES
48
Patent #:
Issue Dt:
09/12/2006
Application #:
11247495
Filing Dt:
10/10/2005
Publication #:
Pub Dt:
02/09/2006
Title:
Semiconductor assemblies having electrophoretically insulated vias
49
Patent #:
Issue Dt:
01/13/2009
Application #:
11247727
Filing Dt:
10/11/2005
Publication #:
Pub Dt:
05/04/2006
Title:
MEMORY CELL HAVING AN ELECTRICALLY FLOATING BODY TRANSISTOR AND PROGRAMMING TECHNIQUE THEREFOR
50
Patent #:
Issue Dt:
07/31/2007
Application #:
11247774
Filing Dt:
10/11/2005
Publication #:
Pub Dt:
05/11/2006
Title:
CIRCUITRY FOR AND METHOD OF IMPROVING STATISTICAL DISTRIBUTION OF INTEGRATED CIRCUITS
51
Patent #:
Issue Dt:
10/17/2006
Application #:
11248106
Filing Dt:
10/11/2005
Publication #:
Pub Dt:
02/09/2006
Title:
METHODS FOR PLANARIZING MICROELECTRONIC WORKPIECES
52
Patent #:
Issue Dt:
11/13/2007
Application #:
11248144
Filing Dt:
10/13/2005
Publication #:
Pub Dt:
02/23/2006
Title:
SYSTEM-ON-A-CHIP WITH MULTI-LAYERED METALLIZED THROUGH-HOLE INTERCONNECTION
53
Patent #:
Issue Dt:
02/12/2008
Application #:
11248384
Filing Dt:
10/11/2005
Publication #:
Pub Dt:
02/09/2006
Title:
PACKAGED MICROELECTRONIC DEVICES AND METHODS FOR PACKAGING MICROELECTRONIC DEVICES
54
Patent #:
Issue Dt:
05/06/2008
Application #:
11249540
Filing Dt:
10/13/2005
Publication #:
Pub Dt:
03/02/2006
Title:
INTERPOSERS FOR CHIP-SCALE PACKAGES AND INTERMEDIATES THEREOF
55
Patent #:
Issue Dt:
03/27/2007
Application #:
11249763
Filing Dt:
10/13/2005
Publication #:
Pub Dt:
04/20/2006
Title:
MEMORY DEVICE
56
Patent #:
Issue Dt:
04/01/2008
Application #:
11250176
Filing Dt:
10/13/2005
Publication #:
Pub Dt:
04/20/2006
Title:
MEMORY DEVICE
57
Patent #:
Issue Dt:
06/05/2007
Application #:
11250600
Filing Dt:
10/14/2005
Publication #:
Pub Dt:
04/19/2007
Title:
CLOCK GENERATOR HAVING A DELAY LOCKED LOOP AND DUTY CYCLE CORRECTION CIRCUIT IN A PARALLEL CONFIGURATION
58
Patent #:
Issue Dt:
06/19/2007
Application #:
11251985
Filing Dt:
10/17/2005
Publication #:
Pub Dt:
02/16/2006
Title:
TRANSISTOR WITH NITROGEN-HARDENED GATE OXIDE
59
Patent #:
Issue Dt:
04/10/2007
Application #:
11253390
Filing Dt:
10/19/2005
Publication #:
Pub Dt:
02/16/2006
Title:
METHOD AND APPARATUS FOR READING NAND FLASH MEMORY ARRAY
60
Patent #:
Issue Dt:
10/02/2007
Application #:
11255613
Filing Dt:
10/21/2005
Publication #:
Pub Dt:
02/23/2006
Title:
METHODS OF FORMING INTEGRATED CIRCUITS, AND DRAM CIRCUITRY MEMORY CELLS
61
Patent #:
Issue Dt:
12/05/2006
Application #:
11255646
Filing Dt:
10/21/2005
Publication #:
Pub Dt:
02/16/2006
Title:
PRECONDITIONING OF DEFECTIVE AND REDUNDANT COLUMNS IN A MEMORY DEVICE
62
Patent #:
Issue Dt:
02/19/2008
Application #:
11255972
Filing Dt:
10/24/2005
Publication #:
Pub Dt:
05/11/2006
Title:
METHOD OF MANUFACTURING A CAPACITOR
63
Patent #:
Issue Dt:
10/02/2007
Application #:
11256424
Filing Dt:
10/20/2005
Publication #:
Pub Dt:
03/02/2006
Title:
METHOD OF FORMING A VERTICAL TRANSISTOR
64
Patent #:
Issue Dt:
04/14/2009
Application #:
11256430
Filing Dt:
10/20/2005
Publication #:
Pub Dt:
03/02/2006
Title:
METHOD OF FORMING A VERTICAL TRANSISTOR
65
Patent #:
Issue Dt:
06/15/2010
Application #:
11257157
Filing Dt:
10/25/2005
Publication #:
Pub Dt:
02/23/2006
Title:
DRAM LAYOUT WITH VERTICAL FETS AND METHOD OF FORMATION
66
Patent #:
Issue Dt:
12/11/2007
Application #:
11257636
Filing Dt:
10/25/2005
Publication #:
Pub Dt:
03/02/2006
Title:
STEPPED GATE CONFIGURATION FOR NON-VOLATILE MEMORY
67
Patent #:
Issue Dt:
09/04/2007
Application #:
11257637
Filing Dt:
10/25/2005
Publication #:
Pub Dt:
03/02/2006
Title:
STEPPED GATE CONFIGURATION FOR NON-VOLATILE MEMORY
68
Patent #:
Issue Dt:
10/04/2011
Application #:
11257946
Filing Dt:
10/24/2005
Publication #:
Pub Dt:
02/23/2006
Title:
METHODS OF FORMING MATERIAL ON A SUBSTRATE, AND A METHOD OF FORMING A FIELD EFFECT TRANSISTOR GATE OXIDE ON A SUBSTRATE
69
Patent #:
Issue Dt:
11/25/2008
Application #:
11258675
Filing Dt:
10/25/2005
Publication #:
Pub Dt:
03/02/2006
Title:
PROCESS FOR MANUFACTURING A BYTE SELECTION TRANSISTOR FOR A MATRIX OF NON VOLATILE MEMORY CELLS AND CORRESPONDING STRUCTURE
70
Patent #:
Issue Dt:
11/13/2007
Application #:
11258921
Filing Dt:
10/27/2005
Publication #:
Pub Dt:
03/02/2006
Title:
METHOD OF FORMING A MEMORY CELL
71
Patent #:
Issue Dt:
08/10/2010
Application #:
11260339
Filing Dt:
10/27/2005
Publication #:
Pub Dt:
05/03/2007
Title:
NON-VOLATILE MEMORY DEVICE WITH TENSILE STRAINED SILICON LAYER
72
Patent #:
Issue Dt:
06/24/2008
Application #:
11260597
Filing Dt:
10/27/2005
Publication #:
Pub Dt:
04/13/2006
Title:
LOW VOLTAGE SENSE AMPLIFIER FOR OPERATION UNDER A REDUCED BIT LINE BIAS VOLTAGE
73
Patent #:
Issue Dt:
04/16/2013
Application #:
11261131
Filing Dt:
10/28/2005
Publication #:
Pub Dt:
05/04/2006
Title:
Flash memory device with a low pin count (LPC) communication interface
74
Patent #:
Issue Dt:
01/08/2008
Application #:
11261903
Filing Dt:
10/27/2005
Publication #:
Pub Dt:
06/08/2006
Title:
PROGRAMMING METHOD OF MULTILEVEL MEMORIES AND CORRESPONDING CIRCUIT
75
Patent #:
Issue Dt:
05/27/2008
Application #:
11262275
Filing Dt:
10/28/2005
Publication #:
Pub Dt:
05/03/2007
Title:
SYSTEM AND METHOD FOR CONTROLLING TIMING OF OUTPUT SIGNALS
76
Patent #:
Issue Dt:
02/02/2010
Application #:
11263254
Filing Dt:
10/31/2005
Publication #:
Pub Dt:
05/03/2007
Title:
RECESSED CHANNEL NEGATIVE DIFFERENTIAL RESISTANCE-BASED MEMORY CELL
77
Patent #:
Issue Dt:
07/08/2008
Application #:
11263398
Filing Dt:
10/31/2005
Publication #:
Pub Dt:
03/09/2006
Title:
MODULE ASSEMBLY AND METHOD FOR STACKED BGA PACKAGES
78
Patent #:
Issue Dt:
07/15/2008
Application #:
11263426
Filing Dt:
10/31/2005
Publication #:
Pub Dt:
03/09/2006
Title:
MODULE ASSEMBLY FOR STACKED BGA PACKAGES
79
Patent #:
Issue Dt:
08/05/2008
Application #:
11263509
Filing Dt:
10/31/2005
Publication #:
Pub Dt:
03/23/2006
Title:
ASSEMBLY FOR STACKED BGA PACKAGES
80
Patent #:
Issue Dt:
04/13/2010
Application #:
11263885
Filing Dt:
11/01/2005
Publication #:
Pub Dt:
05/03/2007
Title:
PROCESS FOR INCREASING FEATURE DENSITY DURING THE MANUFACTURE OF A SEMICONDUCTOR DEVICE
81
Patent #:
Issue Dt:
06/02/2009
Application #:
11264091
Filing Dt:
11/02/2005
Publication #:
Pub Dt:
05/03/2007
Title:
ELECTRICALLY REWRITABLE NON-VOLATILE MEMORY ELEMENT AND METHOD OF MANUFACTURING THE SAME
82
Patent #:
Issue Dt:
09/25/2007
Application #:
11264120
Filing Dt:
11/01/2005
Publication #:
Pub Dt:
03/09/2006
Title:
HIGH SPEED REDUNDANT DATA SENSING METHOD AND APPARATUS
83
Patent #:
Issue Dt:
09/15/2009
Application #:
11264129
Filing Dt:
11/02/2005
Publication #:
Pub Dt:
05/03/2007
Title:
ELECTRICALLY REWRITABLE NON-VOLATILE MEMORY ELEMENT AND METHOD OF MANUFACTURING THE SAME
84
Patent #:
Issue Dt:
08/11/2009
Application #:
11264965
Filing Dt:
11/02/2005
Publication #:
Pub Dt:
03/16/2006
Title:
METHODS OF FORMING SEMICONDUCTOR PACKAGES
85
Patent #:
Issue Dt:
08/28/2007
Application #:
11264972
Filing Dt:
11/02/2005
Publication #:
Pub Dt:
03/16/2006
Title:
SEMICONDUCTOR PACKAGES
86
Patent #:
Issue Dt:
03/02/2010
Application #:
11265275
Filing Dt:
11/03/2005
Publication #:
Pub Dt:
05/03/2007
Title:
ELECTRICALLY REWRITABLE NON-VOLATILE MEMORY ELEMENT AND METHOD OF MANUFACTURING THE SAME
87
Patent #:
Issue Dt:
09/11/2007
Application #:
11265350
Filing Dt:
11/02/2005
Publication #:
Pub Dt:
03/16/2006
Title:
A METHOD OF FABRICATING A SEMICONDUCTOR DIE PACKAGE HAVING IMPROVED INDUCTANCE CHARACTERISTICS
88
Patent #:
Issue Dt:
10/16/2007
Application #:
11265449
Filing Dt:
11/02/2005
Publication #:
Pub Dt:
04/27/2006
Title:
ELECTRO- AND ELECTROLESS PLATING OF METAL IN THE MANUFACTURE OF PCRAM DEVICES
89
Patent #:
Issue Dt:
09/04/2007
Application #:
11265750
Filing Dt:
11/02/2005
Publication #:
Pub Dt:
03/30/2006
Title:
ELECTRO-AND ELECTROLESS PLATING OF METAL IN THE MANUFACTURE OF PCRAM DEVICES
90
Patent #:
Issue Dt:
03/31/2009
Application #:
11266622
Filing Dt:
11/02/2005
Publication #:
Pub Dt:
05/03/2007
Title:
HIGH SPEED DIGITAL SIGNAL INPUT BUFFER AND METHOD USING PULSED POSITIVE FEEDBACK
91
Patent #:
Issue Dt:
09/12/2006
Application #:
11266837
Filing Dt:
11/04/2005
Publication #:
Pub Dt:
03/23/2006
Title:
METHODS FOR CREATING ELECTROPHORETICALLY INSULATED VIAS IN SEMICONDUCTIVE SUBSTRATES
92
Patent #:
Issue Dt:
04/21/2009
Application #:
11266914
Filing Dt:
11/04/2005
Publication #:
Pub Dt:
03/30/2006
Title:
LOW K INTERLEVEL DIELECTRIC LAYER FABRICATION METHODS
93
Patent #:
Issue Dt:
03/06/2007
Application #:
11266972
Filing Dt:
11/04/2005
Publication #:
Pub Dt:
03/23/2006
Title:
STACKED DIE MODULE AND TECHNIQUES FOR FORMING A STACKED DIE MODULE
94
Patent #:
Issue Dt:
06/26/2007
Application #:
11267009
Filing Dt:
11/04/2005
Publication #:
Pub Dt:
03/16/2006
Title:
TECHNIQUE TO CONTROL TUNNELING CURRENTS IN DRAM CAPACITORS, CELLS, AND DEVICES
95
Patent #:
Issue Dt:
12/02/2008
Application #:
11268095
Filing Dt:
11/07/2005
Publication #:
Pub Dt:
03/16/2006
Title:
STACKABLE BALL GRID ARRAY
96
Patent #:
Issue Dt:
06/01/2010
Application #:
11269069
Filing Dt:
11/07/2005
Publication #:
Pub Dt:
03/09/2006
Title:
WAFER BACK SIDE COATING TO BALANCE STRESS FROM PASSIVATION LAYER ON FRONT OF WAFER AND BE USED AS DIE ATTACH ADHESIVE
97
Patent #:
Issue Dt:
11/04/2008
Application #:
11269247
Filing Dt:
11/07/2005
Publication #:
Pub Dt:
03/16/2006
Title:
MEMORY CONTROLLER METHOD AND SYSTEM COMPENSATING FOR MEMORY CELL DATA LOSSES
98
Patent #:
Issue Dt:
09/23/2008
Application #:
11269248
Filing Dt:
11/07/2005
Publication #:
Pub Dt:
03/30/2006
Title:
MEMORY CONTROLLER METHOD AND SYSTEM COMPENSATING FOR MEMORY CELL DATA LOSSES
99
Patent #:
Issue Dt:
11/04/2008
Application #:
11269403
Filing Dt:
11/07/2005
Publication #:
Pub Dt:
03/16/2006
Title:
MEMORY CONTROLLER METHOD AND SYSTEM COMPENSATING FOR MEMORY CELL DATA LOSSES
100
Patent #:
Issue Dt:
05/12/2009
Application #:
11270308
Filing Dt:
11/09/2005
Publication #:
Pub Dt:
06/08/2006
Title:
CHARGE-PUMP DEVICE WITH INCREASED CURRENT OUTPUT
Assignors
1
Exec Dt:
07/03/2018
2
Exec Dt:
07/03/2018
Assignee
1
10 S. DEARBORN
7TH FLOOR
CHICAGO, ILLINOIS 60603
Correspondence name and address
MARCELA ROBLEDO
2475 HANOVER STREET
PALO ALTO, CA 94304

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