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Reel/Frame:038669/0001   Pages: 961
Recorded: 05/12/2016
Attorney Dkt #:4816.228
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 18018
Page 66 of 181
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1
Patent #:
6730547
Issue Dt:
05/04/2004
Application #:
10285462
Filing Dt:
11/01/2002
Publication #:
US20030068861
Pub Dt:
04/10/2003
Title:
INTEGRATED CIRCUIT DEVICE AND FABRICATION USING METAL-DOPED CHALCOGENIDE MATERIALS
2
Patent #:
6800504
Issue Dt:
10/05/2004
Application #:
10285463
Filing Dt:
11/01/2002
Publication #:
US20030068862
Pub Dt:
04/10/2003
Title:
INTEGRATED CIRCUIT DEVICE AND FABRICATION USING METAL-DOPED CHALCOGENIDE MATERIALS
3
Patent #:
6693014
Issue Dt:
02/17/2004
Application #:
10285488
Filing Dt:
11/01/2002
Publication #:
US20030054603
Pub Dt:
03/20/2003
Title:
METHOD OF IMPROVING STATIC REFRESH
4
Patent #:
6614674
Issue Dt:
09/02/2003
Application #:
10285551
Filing Dt:
11/01/2002
Publication #:
US20030052656
Pub Dt:
03/20/2003
Title:
REGULATOR CIRCUIT FOR INDEPENDENT ADJUSTMENT OF PUMPS IN MULTIPLE MODES OF OPERATION
5
Patent #:
6664613
Issue Dt:
12/16/2003
Application #:
10285554
Filing Dt:
11/01/2002
Publication #:
US20030052340
Pub Dt:
03/20/2003
Title:
MAGNETIC SHIELDING FOR INTEGRATED CIRCUITS
6
Patent #:
7019223
Issue Dt:
03/28/2006
Application #:
10285881
Filing Dt:
10/31/2002
Publication #:
US20030106711
Pub Dt:
06/12/2003
Title:
SOLDER RESIST OPENING TO DEFINE A COMBINATION PIN ONE INDICATOR AND FIDUCIAL
7
Patent #:
6840840
Issue Dt:
01/11/2005
Application #:
10286064
Filing Dt:
10/31/2002
Publication #:
US20030060128
Pub Dt:
03/27/2003
Title:
APPARATUS AND METHOD FOR CONDITIONING AND MONITORING MEDIA USED FOR CHEMICAL-MECHANICAL PLANARIZATION
8
Patent #:
7146720
Issue Dt:
12/12/2006
Application #:
10286181
Filing Dt:
10/31/2002
Publication #:
US20030110624
Pub Dt:
06/19/2003
Title:
METHOD OF FABRICATING A CARRIER SUBSTRATE BY USING A SOLDER RESIST OPENING AS A COMBINATION PIN ONE INDICATOR AND FIDUCIAL
9
Patent #:
6822299
Issue Dt:
11/23/2004
Application #:
10287203
Filing Dt:
11/04/2002
Publication #:
US20030075802
Pub Dt:
04/24/2003
Title:
BORON-DOPED TITANIUM NITRIDE LAYER FOR HIGH ASPECT RATIO SEMICONDUCTOR DEVICES
10
Patent #:
6791149
Issue Dt:
09/14/2004
Application #:
10287569
Filing Dt:
11/04/2002
Publication #:
US20030077895
Pub Dt:
04/24/2003
Title:
DIFFUSION BARRIER LAYER FOR SEMICONDUCTOR WAFER FABRICATION
11
Patent #:
7501230
Issue Dt:
03/10/2009
Application #:
10288021
Filing Dt:
11/04/2002
Publication #:
US20040086800
Pub Dt:
05/06/2004
Title:
PHOTOACTIVE ADHESION PROMOTER
12
Patent #:
6798057
Issue Dt:
09/28/2004
Application #:
10288180
Filing Dt:
11/05/2002
Publication #:
US20040084771
Pub Dt:
05/06/2004
Title:
THIN STACKED BALL-GRID ARRAY PACKAGE
13
Patent #:
7245945
Issue Dt:
07/17/2007
Application #:
10289081
Filing Dt:
11/05/2002
Publication #:
US20040087351
Pub Dt:
05/06/2004
Title:
PORTABLE COMPUTING DEVICE ADAPTED TO UPDATE DISPLAY INFORMATION WHILE IN A LOW POWER MODE
14
Patent #:
7061092
Issue Dt:
06/13/2006
Application #:
10289549
Filing Dt:
11/06/2002
Publication #:
US20030064547
Pub Dt:
04/03/2003
Title:
HIGH-DENSITY MODULARITY FOR ICS
15
Patent #:
7161211
Issue Dt:
01/09/2007
Application #:
10289550
Filing Dt:
11/06/2002
Publication #:
US20030127744
Pub Dt:
07/10/2003
Title:
ALUMINUM-CONTAINING FILM DERIVED FROM USING HYDROGEN AND OXYGEN GAS IN SPUTTER DEPOSITION
16
Patent #:
6740574
Issue Dt:
05/25/2004
Application #:
10289916
Filing Dt:
11/06/2002
Publication #:
US20030073298
Pub Dt:
04/17/2003
Title:
METHODS OF FORMING DRAM ASSEMBLIES, TRANSISTOR DEVICES, AND OPENINGS IN SUBSTRATES
17
Patent #:
6828227
Issue Dt:
12/07/2004
Application #:
10289957
Filing Dt:
11/06/2002
Publication #:
US20030104691
Pub Dt:
06/05/2003
Title:
METHOD FOR APPLYING UNIFORM PRESSURIZED FILM ACROSS WAFER
18
Patent #:
6816001
Issue Dt:
11/09/2004
Application #:
10290030
Filing Dt:
11/07/2002
Publication #:
US20030107428
Pub Dt:
06/12/2003
Title:
LOW POWER CHARGE PUMP CIRCUIT
19
Patent #:
6894372
Issue Dt:
05/17/2005
Application #:
10290741
Filing Dt:
11/07/2002
Publication #:
US20030107115
Pub Dt:
06/12/2003
Title:
TAPE UNDER FRAME FOR LEAD FRAME IC PACKAGE ASSEMBLY
20
Patent #:
6740575
Issue Dt:
05/25/2004
Application #:
10290958
Filing Dt:
11/07/2002
Publication #:
US20040021200
Pub Dt:
02/05/2004
Title:
METHOD FOR FORMING AN ANTIFUSE
21
Patent #:
6921966
Issue Dt:
07/26/2005
Application #:
10291048
Filing Dt:
11/07/2002
Publication #:
US20030102539
Pub Dt:
06/05/2003
Title:
TAPE UNDER FRAME FOR LEAD FRAME IC PACKAGE ASSEMBLY
22
Patent #:
6888214
Issue Dt:
05/03/2005
Application #:
10291772
Filing Dt:
11/12/2002
Publication #:
US20040089914
Pub Dt:
05/13/2004
Title:
ISOLATION TECHNIQUES FOR REDUCING DARK CURRENT IN CMOS IMAGE SENSORS
23
Patent #:
6804142
Issue Dt:
10/12/2004
Application #:
10292080
Filing Dt:
11/12/2002
Publication #:
US20040090816
Pub Dt:
05/13/2004
Title:
6F2 3-TRANSISTOR DRAM GAIN CELL
24
Patent #:
6940304
Issue Dt:
09/06/2005
Application #:
10292517
Filing Dt:
11/13/2002
Publication #:
US20030067324
Pub Dt:
04/10/2003
Title:
ADAPTIVE THRESHOLD LOGIC CIRCUIT
25
Patent #:
6812746
Issue Dt:
11/02/2004
Application #:
10293023
Filing Dt:
11/12/2002
Publication #:
US20040090246
Pub Dt:
05/13/2004
Title:
METHOD AND APPARATUS FOR AMPLIFYING A REGULATED DIFFERENTIAL SIGNAL TO A HIGHER VOLTAGE
26
Patent #:
7160795
Issue Dt:
01/09/2007
Application #:
10293789
Filing Dt:
11/12/2002
Publication #:
US20030235018
Pub Dt:
12/25/2003
Title:
METHOD AND STRUCTURES FOR REDUCED PARASITIC CAPACITANCE IN INTEGRATED CIRCUIT METALLIZATONS
27
Patent #:
6590805
Issue Dt:
07/08/2003
Application #:
10293797
Filing Dt:
11/12/2002
Publication #:
US20030067801
Pub Dt:
04/10/2003
Title:
MAGNETO-RESISTIVE MEMORY HAVING SENSE AMPLIFIER WITH OFFSET CONTROL
28
Patent #:
7024575
Issue Dt:
04/04/2006
Application #:
10294271
Filing Dt:
11/14/2002
Publication #:
US20040098633
Pub Dt:
05/20/2004
Title:
APPARATUS AND METHOD FOR TIME SYNCHRONIZATION OF A PLURALITY OF MULTIMEDIA STREAMS
29
Patent #:
6734482
Issue Dt:
05/11/2004
Application #:
10295106
Filing Dt:
11/15/2002
Publication #:
US20040094786
Pub Dt:
05/20/2004
Title:
TRENCH BURIED BIT LINE MEMORY DEVICES AND METHODS THEREOF
30
Patent #:
6894915
Issue Dt:
05/17/2005
Application #:
10295225
Filing Dt:
11/15/2002
Publication #:
US20040095795
Pub Dt:
05/20/2004
Title:
METHOD TO PREVENT BIT LINE CAPACITIVE COUPLING
31
Patent #:
6759330
Issue Dt:
07/06/2004
Application #:
10295536
Filing Dt:
11/15/2002
Publication #:
US20030096498
Pub Dt:
05/22/2003
Title:
METHOD OF PROVIDING A STRUCTURE USING SELF-ALIGNED FEATURES
32
Patent #:
7544622
Issue Dt:
06/09/2009
Application #:
10295750
Filing Dt:
11/15/2002
Publication #:
US20030094434
Pub Dt:
05/22/2003
Title:
PASSIVATION FOR CLEANING A MATERIAL
33
Patent #:
6654292
Issue Dt:
11/25/2003
Application #:
10298737
Filing Dt:
11/18/2002
Publication #:
US20030072179
Pub Dt:
04/17/2003
Title:
NON-VOLATILE MEMORY WITH BLOCK ERASE
34
Patent #:
6603682
Issue Dt:
08/05/2003
Application #:
10298743
Filing Dt:
11/18/2002
Publication #:
US20030067810
Pub Dt:
04/10/2003
Title:
NON-VOLATILE MEMORY WITH BLOCK ERASE
35
Patent #:
6618293
Issue Dt:
09/09/2003
Application #:
10298745
Filing Dt:
11/18/2002
Publication #:
US20030072180
Pub Dt:
04/17/2003
Title:
NON-VOLATILE MEMORY WITH BLOCK ERASE
36
Patent #:
6618294
Issue Dt:
09/09/2003
Application #:
10298748
Filing Dt:
11/18/2002
Publication #:
US20030067811
Pub Dt:
04/10/2003
Title:
NON-VOLATILE MEMORY WITH BLOCK ERASE
37
Patent #:
6646926
Issue Dt:
11/11/2003
Application #:
10298763
Filing Dt:
11/18/2002
Publication #:
US20030072178
Pub Dt:
04/17/2003
Title:
NON-VOLATILE MEMORY WITH BLOCK ERASE
38
Patent #:
6650571
Issue Dt:
11/18/2003
Application #:
10298777
Filing Dt:
11/18/2002
Publication #:
US20030072181
Pub Dt:
04/17/2003
Title:
NON-VOLATILE MEMORY WITH BLOCK ERASE
39
Patent #:
6738298
Issue Dt:
05/18/2004
Application #:
10298830
Filing Dt:
11/18/2002
Publication #:
US20040095810
Pub Dt:
05/20/2004
Title:
AUTOMATIC REFERENCE VOLTAGE REGULATION IN A MEMORY DEVICE
40
Patent #:
6646927
Issue Dt:
11/11/2003
Application #:
10298839
Filing Dt:
11/18/2002
Publication #:
US20030072182
Pub Dt:
04/17/2003
Title:
NON-VOLATILE MEMORY WITH BLOCK ERASE
41
Patent #:
6602807
Issue Dt:
08/05/2003
Application #:
10298867
Filing Dt:
11/18/2002
Publication #:
US20030092248
Pub Dt:
05/15/2003
Title:
USE OF LINEAR INJECTORS TO DEPOSIT UNIFORM SELECTIVE OZONE TEOS OXIDE FILM BY PULSING REACTANTS ON AND OFF
42
Patent #:
6853207
Issue Dt:
02/08/2005
Application #:
10299630
Filing Dt:
11/18/2002
Publication #:
US20030067296
Pub Dt:
04/10/2003
Title:
METHOD FOR EVALUATING CONTACT PIN INTEGRITY OF ELECTRONIC COMPONENTS HAVING MULTIPLE CONTACT PINS
43
Patent #:
6760265
Issue Dt:
07/06/2004
Application #:
10299965
Filing Dt:
11/19/2002
Publication #:
US20030095453
Pub Dt:
05/22/2003
Title:
READ AMPLIFIER WITH A LOW CURRENT CONSUMPTION DIFFERENTIAL OUTPUT STAGE
44
Patent #:
6693313
Issue Dt:
02/17/2004
Application #:
10300153
Filing Dt:
11/19/2002
Publication #:
US20030094633
Pub Dt:
05/22/2003
Title:
FIELD EFFECT TRANSISTORS, FIELD EFFECT TRANSISTOR ASSEMBLIES, AND INTEGRATED CIRCUITRY
45
Patent #:
6696109
Issue Dt:
02/24/2004
Application #:
10300327
Filing Dt:
11/19/2002
Publication #:
US20030072892
Pub Dt:
04/17/2003
Title:
CHEMICAL VAPOR DEPOSITION PROCESS FOR DEPOSITING TITANIUM SILICIDE FILMS FROM AN ORGANOMETALLIC COMPOUND
46
Patent #:
6960925
Issue Dt:
11/01/2005
Application #:
10300426
Filing Dt:
11/20/2002
Publication #:
US20030090287
Pub Dt:
05/15/2003
Title:
INPUT BUFFER WITH AUTOMATIC SWITCHING POINT ADJUSTMENT CIRCUITRY, AND SYNCHRONOUS DRAM DEVICE INCLUDING SAME
47
Patent #:
6884716
Issue Dt:
04/26/2005
Application #:
10300506
Filing Dt:
11/19/2002
Publication #:
US20030073305
Pub Dt:
04/17/2003
Title:
METHOD OF FORMING A CRYSTALLINE PHASE MATERIAL
48
Patent #:
6635396
Issue Dt:
10/21/2003
Application #:
10301088
Filing Dt:
11/21/2002
Publication #:
US20030077528
Pub Dt:
04/24/2003
Title:
METHOD FOR PROVIDING AN ALIGNMENT DIFFRACTION GRATING FOR PHOTOLITHOGRAPHIC ALIGNMENT DURING SEMICONDUCTOR FABRICATION
49
Patent #:
6770927
Issue Dt:
08/03/2004
Application #:
10301268
Filing Dt:
11/20/2002
Publication #:
US20030073277
Pub Dt:
04/17/2003
Title:
STRUCTURES COMPRISING TRANSISTOR GATES
50
Patent #:
6977841
Issue Dt:
12/20/2005
Application #:
10301410
Filing Dt:
11/21/2002
Publication #:
US20040103239
Pub Dt:
05/27/2004
Title:
PRECONDITIONING OF DEFECTIVE AND REDUNDANT COLUMNS IN A MEMORY DEVICE
51
Patent #:
6746934
Issue Dt:
06/08/2004
Application #:
10301573
Filing Dt:
11/22/2002
Publication #:
US20030073318
Pub Dt:
04/17/2003
Title:
ATOMIC LAYER DOPING APPARATUS AND METHOD
52
Patent #:
7105388
Issue Dt:
09/12/2006
Application #:
10302044
Filing Dt:
11/21/2002
Publication #:
US20030073296
Pub Dt:
04/17/2003
Title:
A METHOD OF FORMING AT LEAST ONE INTERCONNECTION TO A SOURCE/DRAIN REGION IN SILICON-ON-INSULATOR INTEGRATED CIRCUITRY
53
Patent #:
6939761
Issue Dt:
09/06/2005
Application #:
10302360
Filing Dt:
11/22/2002
Publication #:
US20040102027
Pub Dt:
05/27/2004
Title:
METHODS OF FORMING BURIED BIT LINE DRAM CIRCUITRY
54
Patent #:
6998289
Issue Dt:
02/14/2006
Application #:
10302421
Filing Dt:
11/21/2002
Publication #:
US20030071289
Pub Dt:
04/17/2003
Title:
MULTIPLE LAYER PHASE-CHANGE MEMORY
55
Patent #:
7125749
Issue Dt:
10/24/2006
Application #:
10302588
Filing Dt:
11/22/2002
Publication #:
US20030077853
Pub Dt:
04/24/2003
Title:
VARIED-THICKNESS HEAT SINK FOR INTEGRATED CIRCUIT (IC) PACKAGES AND METHOD OF FABRICATING IC PACKAGES
56
Patent #:
6747326
Issue Dt:
06/08/2004
Application #:
10302965
Filing Dt:
11/25/2002
Publication #:
US20030073269
Pub Dt:
04/17/2003
Title:
LOW VOLTAGE HIGH PERFORMANCE SEMICONDUCTOR DEVICE HAVING PUNCH THROUGH PREVENTION IMPLANTS
57
Patent #:
6984893
Issue Dt:
01/10/2006
Application #:
10303585
Filing Dt:
11/22/2002
Publication #:
US20030071358
Pub Dt:
04/17/2003
Title:
LOW TEMPERATURE NITRIDE USED AS CU BARRIER LAYER
58
Patent #:
7465999
Issue Dt:
12/16/2008
Application #:
10303696
Filing Dt:
11/26/2002
Publication #:
US20030227058
Pub Dt:
12/11/2003
Title:
FULLY-DEPLETED (FD) (SOI) MOSFET ACCESS TRANSISTOR
59
Patent #:
6713378
Issue Dt:
03/30/2004
Application #:
10303880
Filing Dt:
11/26/2002
Publication #:
US20030077891
Pub Dt:
04/24/2003
Title:
INTERCONNECT LINE SELECTIVELY ISOLATED FROM AN UNDERLYING CONTACT PLUG
60
Patent #:
7374865
Issue Dt:
05/20/2008
Application #:
10304303
Filing Dt:
11/25/2002
Publication #:
US20040101764
Pub Dt:
05/27/2004
Title:
METHODS TO PATTERN CONTACTS USING CHROMELESS PHASE SHIFT MASKS
61
Patent #:
6861311
Issue Dt:
03/01/2005
Application #:
10304359
Filing Dt:
11/25/2002
Publication #:
US20030073268
Pub Dt:
04/17/2003
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY, FORMING CONDUCTIVE LINES, FORMING A CONDUCTIVE GRID, FORMING A CONDUCTIVE NETWORK, FORMING AN ELECTRICAL INTERCONNECTION TO A NODE LOCATION, FORMING AN ELECTRICAL INTERCONNECTION WITH A TRANSISTOR SO
62
Patent #:
6947353
Issue Dt:
09/20/2005
Application #:
10304463
Filing Dt:
11/25/2002
Publication #:
US20030123338
Pub Dt:
07/03/2003
Title:
APPARATUS AND METHOD FOR PROVIDING UNINTERRUPTED CONTINUOUS PLAY DURING A CHANGE OF SIDES OF A DUAL SIDED OPTICAL DISK
63
Patent #:
6884687
Issue Dt:
04/26/2005
Application #:
10304659
Filing Dt:
11/25/2002
Publication #:
US20030073306
Pub Dt:
04/17/2003
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY, FORMING CONDUCTIVE LINES, FORMING A CONDUCTIVE GRID, FORMING A CONDUCTIVE NETWORK, FORMING AN ELECTRICAL INTERCONNECTION TO A NODE LOCATION, FORMING AN ELECTRICAL INTERCONNECTION WITH A TRANSISTOR SO
64
Patent #:
6977418
Issue Dt:
12/20/2005
Application #:
10305465
Filing Dt:
11/26/2002
Publication #:
US20030082907
Pub Dt:
05/01/2003
Title:
LOW RESISTANCE SEMICONDUCTOR PROCESS AND STRUCTURES
65
Patent #:
6876022
Issue Dt:
04/05/2005
Application #:
10306592
Filing Dt:
11/27/2002
Publication #:
US20030086287
Pub Dt:
05/08/2003
Title:
JUNCTION-ISOLATED DEPLETION MODE FERROELECTRIC MEMORY DEVICES
66
Patent #:
7310790
Issue Dt:
12/18/2007
Application #:
10309529
Filing Dt:
12/03/2002
Publication #:
US20040107409
Pub Dt:
06/03/2004
Title:
AUTOMATIC SYMBOLIC INDEXING METHODS FOR FORMAL VERIFICATION ON A SYMBOLIC LATTICE DOMAIN
67
Patent #:
6934208
Issue Dt:
08/23/2005
Application #:
10309572
Filing Dt:
12/03/2002
Publication #:
US20040105333
Pub Dt:
06/03/2004
Title:
APPARATUS AND METHOD FOR A CURRENT LIMITING BLEEDER DEVICE SHARED BY COLUMNS OF DIFFERENT MEMORY ARRAYS
68
Patent #:
6674115
Issue Dt:
01/06/2004
Application #:
10309633
Filing Dt:
12/04/2002
Publication #:
US20030080427
Pub Dt:
05/01/2003
Title:
MULTIPLE LAYER PHASE-CHANGE MEMORY
69
Patent #:
7284144
Issue Dt:
10/16/2007
Application #:
10309759
Filing Dt:
12/04/2002
Publication #:
US20030126204
Pub Dt:
07/03/2003
Title:
FINITE STATE MACHINE INTERFACE HAS ARBITRATION STRUCTURE TO STORE COMMAND GENERATED BY INTERNAL CIRCUITS DURING EVALUATION PHASE OF STATE MACHINE FOR FLASH EEPROM DEVICE
70
Patent #:
7030436
Issue Dt:
04/18/2006
Application #:
10309873
Filing Dt:
12/04/2002
Publication #:
US20040108532
Pub Dt:
06/10/2004
Title:
EMBEDDED DRAM GAIN MEMORY CELL HAVING MOS TRANSISTOR BODY PROVIDED WITH A BI-POLAR TRANSISTOR CHARGE INJECTING MEANS
71
Patent #:
7101813
Issue Dt:
09/05/2006
Application #:
10309935
Filing Dt:
12/04/2002
Publication #:
US20040110391
Pub Dt:
06/10/2004
Title:
ATOMIC LAYER DEPOSITED ZR-SN-TI-O FILMS
72
Patent #:
7591061
Issue Dt:
09/22/2009
Application #:
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Filing Dt:
12/04/2002
Publication #:
US20040072502
Pub Dt:
04/15/2004
Title:
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73
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Issue Dt:
05/31/2005
Application #:
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Filing Dt:
12/05/2002
Publication #:
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Pub Dt:
05/15/2003
Title:
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Issue Dt:
07/06/2004
Application #:
10313044
Filing Dt:
12/06/2002
Publication #:
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Pub Dt:
05/01/2003
Title:
SYSTEM AND METHOD FOR SKEW COMPENSATING A CLOCK SIGNAL AND FOR CAPTURING A DIGITAL SIGNAL USING THE SKEW COMPENSATED CLOCK SIGNAL
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Patent #:
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Issue Dt:
11/02/2004
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Filing Dt:
12/06/2002
Publication #:
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Pub Dt:
05/01/2003
Title:
SYSTEM AND METHOD FOR SKEW COMPENSATING A CLOCK SIGNAL AND FOR CAPTURING A DIGITAL SIGNAL USING THE SKEW COMPENSATED CLOCK SIGNAL
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Issue Dt:
08/28/2007
Application #:
10313950
Filing Dt:
12/06/2002
Publication #:
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Pub Dt:
11/27/2003
Title:
METHODS AND APPARATUSES FOR MONITORING AND CONTROLLING MECHANICAL OR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATE ASSEMBLIES
77
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6916668
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07/12/2005
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Filing Dt:
12/06/2002
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Pub Dt:
05/29/2003
Title:
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Issue Dt:
11/25/2003
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Filing Dt:
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Pub Dt:
05/01/2003
Title:
SEMICONDUCTOR PROCESSING METHODS
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05/10/2005
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Filing Dt:
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Pub Dt:
11/27/2003
Title:
METHOD OF FORMING A MEMORY HAVING A VERTICAL TRANSISTOR
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Issue Dt:
04/06/2004
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10317106
Filing Dt:
12/12/2002
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Pub Dt:
05/01/2003
Title:
BALANCED SENSE AMPLIFIER CONTROL FOR OPEN DIGIT LINE ARCHITECTURE MEMORY DEVICES
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Issue Dt:
07/03/2007
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Filing Dt:
12/11/2002
Publication #:
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Pub Dt:
06/17/2004
Title:
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Issue Dt:
05/25/2004
Application #:
10317678
Filing Dt:
12/11/2002
Title:
LOW GLITCH CURRENT STEERING DIGITAL TO ANALOG CONVERTER AND METHOD
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6690086
Issue Dt:
02/10/2004
Application #:
10318172
Filing Dt:
12/13/2002
Publication #:
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Pub Dt:
05/08/2003
Title:
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6717855
Issue Dt:
04/06/2004
Application #:
10318464
Filing Dt:
12/13/2002
Publication #:
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Pub Dt:
05/08/2003
Title:
METHOD AND APPARATUS FOR ALLOWING CONTINUOUS APPLICATION OF HIGH VOLTAGE TO A FLASH MEMORY DEVICE POWER PIN
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Issue Dt:
09/19/2006
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10318971
Filing Dt:
12/13/2002
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Pub Dt:
05/15/2003
Title:
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07/05/2005
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10318972
Filing Dt:
12/13/2002
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Pub Dt:
05/15/2003
Title:
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Issue Dt:
04/17/2007
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Filing Dt:
12/13/2002
Publication #:
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Pub Dt:
06/17/2004
Title:
PHASE CHANGE MEMORY AND METHOD THEREFOR
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Issue Dt:
09/18/2007
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Filing Dt:
12/13/2002
Publication #:
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Pub Dt:
06/17/2004
Title:
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Issue Dt:
11/09/2004
Application #:
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Filing Dt:
12/12/2002
Publication #:
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Pub Dt:
10/02/2003
Title:
ARCHITECTURE OF A PHASE-CHANGE NONVOLATILE MEMORY ARRAY
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Issue Dt:
09/07/2004
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10320253
Filing Dt:
12/16/2002
Publication #:
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Pub Dt:
05/22/2003
Title:
METHOD OF FORMING A WEAK FERROELECTRIC TRANSISTOR
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Issue Dt:
03/15/2005
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10320493
Filing Dt:
12/17/2002
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Pub Dt:
06/17/2004
Title:
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6819003
Issue Dt:
11/16/2004
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Filing Dt:
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Pub Dt:
06/05/2003
Title:
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01/11/2005
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10320892
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12/16/2002
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Pub Dt:
06/05/2003
Title:
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Issue Dt:
08/30/2005
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Filing Dt:
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Pub Dt:
05/15/2003
Title:
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Issue Dt:
05/17/2005
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10321975
Filing Dt:
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Pub Dt:
06/12/2003
Title:
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Filing Dt:
12/17/2002
Publication #:
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Pub Dt:
05/08/2003
Title:
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6669738
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12/30/2003
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Filing Dt:
12/16/2002
Publication #:
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Pub Dt:
05/08/2003
Title:
LOW PROFILE SEMICONDUCTOR PACKAGE
98
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6879018
Issue Dt:
04/12/2005
Application #:
10322252
Filing Dt:
12/17/2002
Publication #:
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Pub Dt:
06/05/2003
Title:
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6674680
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01/06/2004
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10322681
Filing Dt:
12/17/2002
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Pub Dt:
05/08/2003
Title:
METHODS OF PROGRAMMING AND CIRCUITRY FOR A PROGRAMMABLE ELEMENT
100
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7371975
Issue Dt:
05/13/2008
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10322902
Filing Dt:
12/18/2002
Publication #:
US20040118604
Pub Dt:
06/24/2004
Title:
ELECTRONIC PACKAGES AND COMPONENTS THEREOF FORMED BY SUBSTRATE-IMPRINTING
Assignor
1
MICRON TECHNOLOGY, INC.
Exec Dt:
04/26/2016
Assignee
1
U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
633 WEST FIFTH STREET, 24TH FLOOR
LOS ANGELES, CALIFORNIA 90071
Correspondence name and address
WSGR, C/O QUI LU, SENIOR PARALEGAL
650 PAGE MILL ROAD
FH 2-1 P12
PALO ALTO, CA 94304

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