skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:047540/0001   Pages: 843
Recorded: 07/13/2018
Attorney Dkt #:509265/2155
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 16531
Page 66 of 166
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166
1
Patent #:
7313034
Issue Dt:
12/25/2007
Application #:
11433182
Filing Dt:
05/11/2006
Publication #:
US20060203572
Pub Dt:
09/14/2006
Title:
LOW SUPPLY VOLTAGE TEMPERATURE COMPENSATED REFERENCE VOLTAGE GENERATOR AND METHOD
2
Patent #:
7259608
Issue Dt:
08/21/2007
Application #:
11433216
Filing Dt:
05/11/2006
Publication #:
US20060203606
Pub Dt:
09/14/2006
Title:
SYSTEM AND METHOD FOR OPEN-LOOP SYNTHESIS OF OUTPUT CLOCK SIGNALS HAVING A SELECTED PHASE RELATIVE TO AN INPUT CLOCK SIGNAL
3
Patent #:
7461320
Issue Dt:
12/02/2008
Application #:
11433217
Filing Dt:
05/11/2006
Publication #:
US20060206769
Pub Dt:
09/14/2006
Title:
MEMORY SYSTEM AND METHOD HAVING SELECTIVE ECC DURING LOW POWER REFRESH
4
Patent #:
7746959
Issue Dt:
06/29/2010
Application #:
11433322
Filing Dt:
05/11/2006
Publication #:
US20060203938
Pub Dt:
09/14/2006
Title:
METHOD AND SYSTEM FOR GENERATING REFERENCE VOLTAGES FOR SIGNAL RECEIVERS
5
Patent #:
7489556
Issue Dt:
02/10/2009
Application #:
11433341
Filing Dt:
05/12/2006
Publication #:
US20070263453
Pub Dt:
11/15/2007
Title:
METHOD AND APPARATUS FOR GENERATING READ AND VERIFY OPERATIONS IN NON-VOLATILE MEMORIES
6
Patent #:
7755119
Issue Dt:
07/13/2010
Application #:
11433383
Filing Dt:
05/15/2006
Publication #:
US20060214201
Pub Dt:
09/28/2006
Title:
METHOD AND APPARATUS FOR REDUCING IMAGER FLOATING DIFFUSION LEAKAGE
7
Patent #:
7998809
Issue Dt:
08/16/2011
Application #:
11433384
Filing Dt:
05/15/2006
Publication #:
US20070264777
Pub Dt:
11/15/2007
Title:
METHOD FOR FORMING A FLOATING GATE USING CHEMICAL MECHANICAL PLANARIZATION
8
Patent #:
7573108
Issue Dt:
08/11/2009
Application #:
11433533
Filing Dt:
05/12/2006
Publication #:
US20070262375
Pub Dt:
11/15/2007
Title:
NON-PLANAR TRANSISTOR AND TECHNIQUES FOR FABRICATING THE SAME
9
Patent #:
7663925
Issue Dt:
02/16/2010
Application #:
11433562
Filing Dt:
05/15/2006
Publication #:
US20070263449
Pub Dt:
11/15/2007
Title:
METHOD AND APPARATUS FOR PROGRAMMING FLASH MEMORY
10
Patent #:
7335978
Issue Dt:
02/26/2008
Application #:
11434475
Filing Dt:
05/15/2006
Publication #:
US20060202316
Pub Dt:
09/14/2006
Title:
SEMICONDUCTOR COMPONENT HAVING STIFFENER, CIRCUIT DECAL AND TERMINAL CONTACTS
11
Patent #:
7272747
Issue Dt:
09/18/2007
Application #:
11434497
Filing Dt:
05/15/2006
Publication #:
US20070022316
Pub Dt:
01/25/2007
Title:
USE OF NON-VOLATILE MEMORY TO PERFORM ROLLBACK FUNCTION
12
Patent #:
7525851
Issue Dt:
04/28/2009
Application #:
11434564
Filing Dt:
05/15/2006
Publication #:
US20060268650
Pub Dt:
11/30/2006
Title:
ROW DECODER CIRCUIT AND RELATED SYSTEM AND METHOD
13
Patent #:
8153502
Issue Dt:
04/10/2012
Application #:
11434982
Filing Dt:
05/16/2006
Publication #:
US20070269958
Pub Dt:
11/22/2007
Title:
METHODS FOR FILLING TRENCHES IN A SEMICONDUCTOR MATERIAL
14
Patent #:
7273784
Issue Dt:
09/25/2007
Application #:
11435421
Filing Dt:
05/17/2006
Publication #:
US20060234393
Pub Dt:
10/19/2006
Title:
SCALABLE HIGH DENSITY NON-VOLATILE MEMORY CELLS IN A CONTACTLESS MEMORY ARRAY
15
Patent #:
7411823
Issue Dt:
08/12/2008
Application #:
11435620
Filing Dt:
05/17/2006
Publication #:
US20060208305
Pub Dt:
09/21/2006
Title:
IN-SERVICE RECONFIGURABLE DRAM AND FLASH MEMORY DEVICE
16
Patent #:
7359241
Issue Dt:
04/15/2008
Application #:
11435621
Filing Dt:
05/17/2006
Publication #:
US20060221670
Pub Dt:
10/05/2006
Title:
IN-SERVICE RECONFIGURABLE DRAM AND FLASH MEMORY DEVICE
17
Patent #:
8084806
Issue Dt:
12/27/2011
Application #:
11435813
Filing Dt:
05/18/2006
Publication #:
US20060205156
Pub Dt:
09/14/2006
Title:
ISOLATION STRUCTURE FOR A MEMORY CELL USING AL2O3 DIELECTRIC
18
Patent #:
7190020
Issue Dt:
03/13/2007
Application #:
11436247
Filing Dt:
05/18/2006
Publication #:
US20060208309
Pub Dt:
09/21/2006
Title:
NON-PLANAR FLASH MEMORY HAVING SHIELDING BETWEEN FLOATING GATES
19
Patent #:
7411832
Issue Dt:
08/12/2008
Application #:
11436323
Filing Dt:
05/18/2006
Publication #:
US20070268773
Pub Dt:
11/22/2007
Title:
PROGRAMMING A NON-VOLATILE MEMORY DEVICE
20
Patent #:
7558131
Issue Dt:
07/07/2009
Application #:
11436352
Filing Dt:
05/18/2006
Publication #:
US20070268775
Pub Dt:
11/22/2007
Title:
NAND SYSTEM WITH A DATA WRITE FREQUENCY GREATER THAN A COMMAND-AND-ADDRESS-LOAD FREQUENCY
21
Patent #:
7422960
Issue Dt:
09/09/2008
Application #:
11436726
Filing Dt:
05/17/2006
Publication #:
US20070267668
Pub Dt:
11/22/2007
Title:
METHOD OF FORMING GATE ARRAYS ON A PARTIAL SOI SUBSTRATE
22
Patent #:
7505341
Issue Dt:
03/17/2009
Application #:
11436863
Filing Dt:
05/17/2006
Publication #:
US20070268764
Pub Dt:
11/22/2007
Title:
LOW VOLTAGE SENSE AMPLIFIER AND SENSING METHOD
23
Patent #:
7701764
Issue Dt:
04/20/2010
Application #:
11436864
Filing Dt:
05/17/2006
Publication #:
US20070279988
Pub Dt:
12/06/2007
Title:
APPARATUS AND METHOD FOR REDUCED PEAK POWER CONSUMPTION DURING COMMON OPERATION OF MULTI-NAND FLASH MEMORY DEVICES
24
Patent #:
7208989
Issue Dt:
04/24/2007
Application #:
11437040
Filing Dt:
05/19/2006
Publication #:
US20060209620
Pub Dt:
09/21/2006
Title:
SYNCHRONOUS CLOCK GENERATOR INCLUDING DUTY CYCLE CORRECTION
25
Patent #:
7532061
Issue Dt:
05/12/2009
Application #:
11437268
Filing Dt:
05/19/2006
Publication #:
US20070069801
Pub Dt:
03/29/2007
Title:
CHARGE-PUMP TYPE, VOLTAGE-BOOSTING DEVICE WITH REDUCED RIPPLE, IN PARTICULAR FOR NON-VOLATILE FLASH MEMORIES
26
Patent #:
7365424
Issue Dt:
04/29/2008
Application #:
11437397
Filing Dt:
05/18/2006
Publication #:
US20060208366
Pub Dt:
09/21/2006
Title:
MICROELECTRONIC COMPONENT ASSEMBLIES WITH RECESSED WIRE BONDS AND METHODS OF MAKING SAME
27
Patent #:
7521983
Issue Dt:
04/21/2009
Application #:
11437405
Filing Dt:
05/19/2006
Publication #:
US20070053227
Pub Dt:
03/08/2007
Title:
HIGH-VOLTAGE SWITCH WITH LOW OUTPUT RIPPLE FOR NON-VOLATILE FLOATING-GATE MEMORIES
28
Patent #:
7773412
Issue Dt:
08/10/2010
Application #:
11437706
Filing Dt:
05/22/2006
Publication #:
US20070268732
Pub Dt:
11/22/2007
Title:
METHOD AND APPARATUS FOR PROVIDING A NON-VOLATILE MEMORY WITH REDUCED CELL CAPACITIVE COUPLING
29
Patent #:
7183164
Issue Dt:
02/27/2007
Application #:
11437999
Filing Dt:
05/18/2006
Publication #:
US20060211194
Pub Dt:
09/21/2006
Title:
METHODS OF REDUCING FLOATING BODY EFFECT
30
Patent #:
7528439
Issue Dt:
05/05/2009
Application #:
11438419
Filing Dt:
05/23/2006
Publication #:
US20070048943
Pub Dt:
03/01/2007
Title:
VERTICAL WRAP-AROUND-GATE FIELD-EFFECT-TRANSISTOR FOR HIGH DENSITY, LOW VOLTAGE LOGIC AND MEMORY ARRAY
31
Patent #:
7804139
Issue Dt:
09/28/2010
Application #:
11438771
Filing Dt:
05/23/2006
Publication #:
US20060220169
Pub Dt:
10/05/2006
Title:
DEVICE HAVING CONDUCTIVE MATERIAL DISPOSED IN A CAVITY FORMED IN AN ISOLATION OXIDE DISPOSED IN A TRENCH
32
Patent #:
7683424
Issue Dt:
03/23/2010
Application #:
11438978
Filing Dt:
05/23/2006
Publication #:
US20060214220
Pub Dt:
09/28/2006
Title:
BALLISTIC DIRECT INJECTION NROM CELL ON STRAINED SILICON STRUCTURES
33
Patent #:
7955946
Issue Dt:
06/07/2011
Application #:
11439078
Filing Dt:
05/22/2006
Publication #:
US20070269994
Pub Dt:
11/22/2007
Title:
METHODS OF DETERMINING X-Y SPATIAL ORIENTATION OF A SEMICONDUCTOR SUBSTRATE COMPRISING AN INTEGRATED CIRCUIT, METHODS OF POSITIONING A SEMICONDUCTOR SUBSTRATE COMPRISING AN INTEGRATED CIRCUIT, METHODS OF PROCESSING A SEMICONDUCTOR SUBSTRATE, AND SEMICONDUCTOR DEVIC
34
Patent #:
7671644
Issue Dt:
03/02/2010
Application #:
11439178
Filing Dt:
05/24/2006
Publication #:
US20070273421
Pub Dt:
11/29/2007
Title:
PROCESS INSENSITIVE DELAY LINE
35
Patent #:
7310259
Issue Dt:
12/18/2007
Application #:
11439635
Filing Dt:
05/23/2006
Publication #:
US20060221659
Pub Dt:
10/05/2006
Title:
ACCESS CIRCUIT AND METHOD FOR ALLOWING EXTERNAL TEST VOLTAGE TO BE APPLIED TO ISOLATED WELLS
36
Patent #:
7253668
Issue Dt:
08/07/2007
Application #:
11439685
Filing Dt:
05/24/2006
Publication #:
US20060208780
Pub Dt:
09/21/2006
Title:
DELAY-LOCKED LOOP WITH FEEDBACK COMPENSATION
37
Patent #:
7202098
Issue Dt:
04/10/2007
Application #:
11439965
Filing Dt:
05/25/2006
Publication #:
US20060208330
Pub Dt:
09/21/2006
Title:
METHOD AND STRUCTURE TO REDUCE OPTICAL CROSSTALK IN A SOLID STATE IMAGER
38
Patent #:
7359263
Issue Dt:
04/15/2008
Application #:
11440181
Filing Dt:
05/25/2006
Publication #:
US20060268634
Pub Dt:
11/30/2006
Title:
CHIP INFORMATION MANAGING METHOD, CHIP INFORMATION MANAGING SYSTEM, AND CHIP INFORMATION MANAGING PROGRAM
39
Patent #:
7375554
Issue Dt:
05/20/2008
Application #:
11440250
Filing Dt:
05/24/2006
Publication #:
US20060255835
Pub Dt:
11/16/2006
Title:
VOLTAGE LEVEL TRANSLATOR CIRCUITRY
40
Patent #:
8084322
Issue Dt:
12/27/2011
Application #:
11440260
Filing Dt:
05/24/2006
Publication #:
US20070072357
Pub Dt:
03/29/2007
Title:
METHOD OF MANUFACTURING DEVICES HAVING VERTICAL JUNCTION EDGE
41
Patent #:
7650541
Issue Dt:
01/19/2010
Application #:
11440348
Filing Dt:
05/24/2006
Publication #:
US20060242484
Pub Dt:
10/26/2006
Title:
MEMORY BLOCK QUALITY IDENTIFICATION IN A MEMORY DEVICE
42
Patent #:
7417280
Issue Dt:
08/26/2008
Application #:
11440646
Filing Dt:
05/24/2006
Publication #:
US20060208310
Pub Dt:
09/21/2006
Title:
METHOD AND APPARATUS FOR A FLASH MEMORY DEVICE COMPRISING A SOURCE LOCAL INTERCONNECT
43
Patent #:
7282390
Issue Dt:
10/16/2007
Application #:
11440913
Filing Dt:
05/25/2006
Publication #:
US20060216864
Pub Dt:
09/28/2006
Title:
STACKED DIE-IN-DIE BGA PACKAGE WITH DIE HAVING A RECESS
44
Patent #:
7362634
Issue Dt:
04/22/2008
Application #:
11442506
Filing Dt:
05/25/2006
Publication #:
US20070280032
Pub Dt:
12/06/2007
Title:
BUILT-IN SYSTEM AND METHOD FOR TESTING INTEGRATED CIRCUIT TIMING PARAMETERS
45
Patent #:
7375573
Issue Dt:
05/20/2008
Application #:
11442510
Filing Dt:
05/25/2006
Publication #:
US20070273425
Pub Dt:
11/29/2007
Title:
DE-EMPHASIS SYSTEM AND METHOD FOR COUPLING DIGITAL SIGNALS THROUGH CAPACITIVELY LOADED LINES
46
Patent #:
7536618
Issue Dt:
05/19/2009
Application #:
11442515
Filing Dt:
05/25/2006
Publication #:
US20070300111
Pub Dt:
12/27/2007
Title:
WIDE FREQUENCY RANGE SIGNAL GENERATOR AND METHOD, AND INTEGRATED CIRCUIT TEST SYSTEM USING SAME
47
Patent #:
7723713
Issue Dt:
05/25/2010
Application #:
11443266
Filing Dt:
05/31/2006
Publication #:
US20070007506
Pub Dt:
01/11/2007
Title:
LAYERED RESISTANCE VARIABLE MEMORY DEVICE AND METHOD OF FABRICATION
48
Patent #:
7498606
Issue Dt:
03/03/2009
Application #:
11444404
Filing Dt:
06/01/2006
Publication #:
US20060216850
Pub Dt:
09/28/2006
Title:
MICROELECTRONIC IMAGING UNITS AND METHODS OF MANUFACTURING MICROELECTRONIC IMAGING UNITS
49
Patent #:
7676710
Issue Dt:
03/09/2010
Application #:
11444705
Filing Dt:
06/01/2006
Publication #:
US20060236207
Pub Dt:
10/19/2006
Title:
ERROR DETECTION, DOCUMENTATION, AND CORRECTION IN A FLASH MEMORY DEVICE
50
Patent #:
7797597
Issue Dt:
09/14/2010
Application #:
11444820
Filing Dt:
06/01/2006
Publication #:
US20060242485
Pub Dt:
10/26/2006
Title:
ERROR DETECTION, DOCUMENTATION, AND CORRECTION IN A FLASH MEMORY DEVICE
51
Patent #:
7474577
Issue Dt:
01/06/2009
Application #:
11444892
Filing Dt:
05/31/2006
Publication #:
US20060291322
Pub Dt:
12/28/2006
Title:
CIRCUIT AND METHOD FOR RETRIEVING DATA STORED IN SEMICONDUCTOR MEMORY CELLS
52
Patent #:
7394694
Issue Dt:
07/01/2008
Application #:
11445491
Filing Dt:
05/31/2006
Publication #:
US20060285387
Pub Dt:
12/21/2006
Title:
FLASH MEMORY DEVICE WITH NAND ARCHITECTURE WITH REDUCED CAPACITIVE COUPLING EFFECT
53
Patent #:
7709341
Issue Dt:
05/04/2010
Application #:
11445544
Filing Dt:
06/02/2006
Publication #:
US20070281493
Pub Dt:
12/06/2007
Title:
METHODS OF SHAPING VERTICAL SINGLE CRYSTAL SILICON WALLS AND RESULTING STRUCTURES
54
Patent #:
7625766
Issue Dt:
12/01/2009
Application #:
11445708
Filing Dt:
06/02/2006
Publication #:
US20070281452
Pub Dt:
12/06/2007
Title:
METHODS OF FORMING CARBON NANOTUBES AND METHODS OF FABRICATING INTEGRATED CIRCUITRY
55
Patent #:
7795149
Issue Dt:
09/14/2010
Application #:
11445766
Filing Dt:
06/01/2006
Publication #:
US20070281219
Pub Dt:
12/06/2007
Title:
MASKING TECHNIQUES AND CONTACT IMPRINT RETICLES FOR DENSE SEMICONDUCTOR FABRICATION
56
Patent #:
7723009
Issue Dt:
05/25/2010
Application #:
11445907
Filing Dt:
06/02/2006
Publication #:
US20070281220
Pub Dt:
12/06/2007
Title:
TOPOGRAPHY BASED PATTERNING
57
Patent #:
7749899
Issue Dt:
07/06/2010
Application #:
11446003
Filing Dt:
06/01/2006
Publication #:
US20070281473
Pub Dt:
12/06/2007
Title:
MICROELECTRONIC WORKPIECES AND METHODS AND SYSTEMS FOR FORMING INTERCONNECTS IN MICROELECTRONIC WORKPIECES
58
Patent #:
7622798
Issue Dt:
11/24/2009
Application #:
11446004
Filing Dt:
06/01/2006
Publication #:
US20070246840
Pub Dt:
10/25/2007
Title:
INTEGRATED CIRCUIT DEVICES WITH STACKED PACKAGE INTERPOSERS
59
Patent #:
7627772
Issue Dt:
12/01/2009
Application #:
11446725
Filing Dt:
06/05/2006
Publication #:
US20060248368
Pub Dt:
11/02/2006
Title:
FAST DATA ACCESS MODE IN A MEMORY DEVICE
60
Patent #:
7338878
Issue Dt:
03/04/2008
Application #:
11447147
Filing Dt:
06/06/2006
Publication #:
US20060275997
Pub Dt:
12/07/2006
Title:
METHOD FOR FORMING CAPACITOR IN SEMICONDUCTOR DEVICE
61
Patent #:
7388794
Issue Dt:
06/17/2008
Application #:
11447272
Filing Dt:
06/06/2006
Publication #:
US20060221671
Pub Dt:
10/05/2006
Title:
INDIVIDUAL I/O MODULATION IN MEMORY DEVICES
62
Patent #:
7486550
Issue Dt:
02/03/2009
Application #:
11447709
Filing Dt:
06/06/2006
Publication #:
US20070279977
Pub Dt:
12/06/2007
Title:
SEMICONDUCTOR MAGNETIC MEMORY INTEGRATING A MAGNETIC TUNNELING JUNCTION ABOVE A FLOATING-GATE MEMORY CELL
63
Patent #:
7277357
Issue Dt:
10/02/2007
Application #:
11447740
Filing Dt:
06/05/2006
Title:
METHOD AND APPARATUS FOR REDUCING OSCILLATION IN SYNCHRONOUS CIRCUITS
64
Patent #:
7439450
Issue Dt:
10/21/2008
Application #:
11447808
Filing Dt:
06/06/2006
Publication #:
US20060225919
Pub Dt:
10/12/2006
Title:
PLATING BUSS AND A METHOD OF USE THEREOF
65
Patent #:
7344946
Issue Dt:
03/18/2008
Application #:
11447909
Filing Dt:
06/07/2006
Publication #:
US20060231823
Pub Dt:
10/19/2006
Title:
METHODS OF FORMING AMORPHOUS CARBON BASED NON-VOLATILE MEMORY
66
Patent #:
7619247
Issue Dt:
11/17/2009
Application #:
11447921
Filing Dt:
06/07/2006
Publication #:
US20060219994
Pub Dt:
10/05/2006
Title:
STRUCTURE FOR AMORPHOUS CARBON BASED NON-VOLATILE MEMORY
67
Patent #:
7272046
Issue Dt:
09/18/2007
Application #:
11448062
Filing Dt:
06/06/2006
Publication #:
US20070133300
Pub Dt:
06/14/2007
Title:
HIGH VOLTAGE SWITCHING CIRCUIT
68
Patent #:
7952922
Issue Dt:
05/31/2011
Application #:
11448063
Filing Dt:
06/06/2006
Publication #:
US20070279989
Pub Dt:
12/06/2007
Title:
METHOD FOR PROGRAMMING A NON-VOLATILE MEMORY DEVICE TO REDUCE FLOATING-GATE-TO-FLOATING-GATE COUPLING EFFECT
69
Patent #:
7333366
Issue Dt:
02/19/2008
Application #:
11448220
Filing Dt:
06/07/2006
Publication #:
US20060227612
Pub Dt:
10/12/2006
Title:
COMMON WORDLINE FLASH ARRAY ARCHITECTURE
70
Patent #:
7329910
Issue Dt:
02/12/2008
Application #:
11448257
Filing Dt:
06/06/2006
Publication #:
US20060228893
Pub Dt:
10/12/2006
Title:
SEMICONDUCTOR SUBSTRATES AND FIELD EFFECT TRANSISTOR CONSTRUCTIONS
71
Patent #:
7427811
Issue Dt:
09/23/2008
Application #:
11448375
Filing Dt:
06/06/2006
Publication #:
US20060237822
Pub Dt:
10/26/2006
Title:
SEMICONDUCTOR SUBSTRATE
72
Patent #:
7465406
Issue Dt:
12/16/2008
Application #:
11448996
Filing Dt:
06/07/2006
Publication #:
US20060228891
Pub Dt:
10/12/2006
Title:
METHOD OF EXPOSING A SUBSTRATE TO A SURFACE MICROWAVE PLASMA, ETCHING METHOD, DEPOSITION METHOD, SURFACE MICROWAVE PLASMA GENERATING APPARATUS, SEMICONDUCTOR SUBSTRATE ETCHING APPARATUS, SEMICONDUCTOR SUBSTRATE DEPOSITION APPARATUS, AND MICROWAVE PLASMA GENERATING
73
Patent #:
7425462
Issue Dt:
09/16/2008
Application #:
11449472
Filing Dt:
06/07/2006
Publication #:
US20060240582
Pub Dt:
10/26/2006
Title:
METHODS RELATING TO THE RECONSTRUCTION OF SEMICONDUCTOR WAFERS FOR WAFER-LEVEL PROCESSING
74
Patent #:
7807541
Issue Dt:
10/05/2010
Application #:
11449539
Filing Dt:
06/07/2006
Publication #:
US20060226496
Pub Dt:
10/12/2006
Title:
CONCENTRIC OR NESTED CONTAINER CAPACITOR STRUCTURE FOR INTEGRATED CIRCUITS
75
Patent #:
7512029
Issue Dt:
03/31/2009
Application #:
11449754
Filing Dt:
06/09/2006
Publication #:
US20070291570
Pub Dt:
12/20/2007
Title:
METHOD AND APPARATUS FOR MANAGING BEHAVIOR OF MEMORY DEVICES
76
Patent #:
7505317
Issue Dt:
03/17/2009
Application #:
11449755
Filing Dt:
06/09/2006
Publication #:
US20070263443
Pub Dt:
11/15/2007
Title:
METHOD, APPARATUS, AND SYSTEM FOR PROVIDING INITIAL STATE RANDOM ACCESS MEMORY
77
Patent #:
7825033
Issue Dt:
11/02/2010
Application #:
11450020
Filing Dt:
06/09/2006
Publication #:
US20070287252
Pub Dt:
12/13/2007
Title:
METHODS OF FORMING VARIABLE RESISTANCE MEMORY CELLS, AND METHODS OF ETCHING GERMANIUM, ANTIMONY, AND TELLURIUM-COMPRISING MATERIALS
78
Patent #:
7425463
Issue Dt:
09/16/2008
Application #:
11450485
Filing Dt:
06/09/2006
Publication #:
US20060246622
Pub Dt:
11/02/2006
Title:
STACKED DIE PACKAGE FOR PERIPHERAL AND CENTER DEVICE PAD LAYOUT DEVICE
79
Patent #:
7525354
Issue Dt:
04/28/2009
Application #:
11450630
Filing Dt:
06/09/2006
Publication #:
US20070296472
Pub Dt:
12/27/2007
Title:
LOCAL COARSE DELAY UNITS
80
Patent #:
7586784
Issue Dt:
09/08/2009
Application #:
11450759
Filing Dt:
06/09/2006
Publication #:
US20070288702
Pub Dt:
12/13/2007
Title:
APPARATUS AND METHODS FOR PROGRAMMING MULTILEVEL-CELL NAND MEMORY DEVICES
81
Patent #:
7214994
Issue Dt:
05/08/2007
Application #:
11451703
Filing Dt:
06/13/2006
Publication #:
US20070045676
Pub Dt:
03/01/2007
Title:
SELF ALIGNED METAL GATES ON HIGH-K DIELECTRICS
82
Patent #:
7626865
Issue Dt:
12/01/2009
Application #:
11451822
Filing Dt:
06/13/2006
Publication #:
US20070291547
Pub Dt:
12/20/2007
Title:
CHARGE PUMP OPERATION IN A NON-VOLATILE MEMORY DEVICE
83
Patent #:
7564087
Issue Dt:
07/21/2009
Application #:
11451920
Filing Dt:
06/13/2006
Publication #:
US20060231879
Pub Dt:
10/19/2006
Title:
MERGED MOS-BIPOLAR CAPACITOR MEMORY CELL
84
Patent #:
7601547
Issue Dt:
10/13/2009
Application #:
11451925
Filing Dt:
06/12/2006
Publication #:
US20060234397
Pub Dt:
10/19/2006
Title:
MAGNETIC ANNEALING SEQUENCES FOR PATTERNED MRAM SYNTHETIC ANTIFERROMAGNETIC PINNED LAYERS
85
Patent #:
7608876
Issue Dt:
10/27/2009
Application #:
11452025
Filing Dt:
06/13/2006
Publication #:
US20060226463
Pub Dt:
10/12/2006
Title:
MERGED MOS-BIPOLAR CAPACITOR MEMORY CELL
86
Patent #:
7540018
Issue Dt:
05/26/2009
Application #:
11452594
Filing Dt:
06/14/2006
Publication #:
US20070005959
Pub Dt:
01/04/2007
Title:
DATA SECURITY FOR DIGITAL DATA STORAGE
87
Patent #:
8037378
Issue Dt:
10/11/2011
Application #:
11452696
Filing Dt:
06/14/2006
Publication #:
US20060236164
Pub Dt:
10/19/2006
Title:
AUTOMATIC TEST ENTRY TERMINATION IN A MEMORY DEVICE
88
Patent #:
7372715
Issue Dt:
05/13/2008
Application #:
11452697
Filing Dt:
06/14/2006
Publication #:
US20070291565
Pub Dt:
12/20/2007
Title:
ARCHITECTURE AND METHOD FOR NAND FLASH MEMORY
89
Patent #:
7525841
Issue Dt:
04/28/2009
Application #:
11452698
Filing Dt:
06/14/2006
Publication #:
US20070291542
Pub Dt:
12/20/2007
Title:
PROGRAMMING METHOD FOR NAND FLASH
90
Patent #:
8202754
Issue Dt:
06/19/2012
Application #:
11452750
Filing Dt:
06/13/2006
Publication #:
US20070228577
Pub Dt:
10/04/2007
Title:
PACKAGED MICROELECTRONIC DEVICES RECESSED IN SUPPORT MEMBER CAVITIES, AND ASSOCIATED METHODS
91
Patent #:
7567477
Issue Dt:
07/28/2009
Application #:
11452783
Filing Dt:
06/13/2006
Publication #:
US20060280011
Pub Dt:
12/14/2006
Title:
BIAS SENSING IN SENSE AMPLIFIERS THROUGH A VOLTAGE-COUPLING/DECOUPLING DEVICE
92
Patent #:
7944025
Issue Dt:
05/17/2011
Application #:
11452830
Filing Dt:
06/13/2006
Publication #:
US20060234167
Pub Dt:
10/19/2006
Title:
SEMICONDUCTOR CONSTRUCTIONS
93
Patent #:
7432025
Issue Dt:
10/07/2008
Application #:
11453425
Filing Dt:
06/14/2006
Publication #:
US20060234142
Pub Dt:
10/19/2006
Title:
METHODS OF FORMING RETICLES
94
Patent #:
7610525
Issue Dt:
10/27/2009
Application #:
11454464
Filing Dt:
06/16/2006
Publication #:
US20060248268
Pub Dt:
11/02/2006
Title:
DEFECTIVE MEMORY BLOCK IDENTIFICATION IN A MEMORY DEVICE
95
Patent #:
7470590
Issue Dt:
12/30/2008
Application #:
11455023
Filing Dt:
06/15/2006
Publication #:
US20060231528
Pub Dt:
10/19/2006
Title:
METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
96
Patent #:
7586144
Issue Dt:
09/08/2009
Application #:
11455877
Filing Dt:
06/19/2006
Publication #:
US20060237775
Pub Dt:
10/26/2006
Title:
MEMORY DEVICE WITH HIGH DIELECTRIC CONSTANT GATE DIELECTRICS AND METAL FLOATING GATES
97
Patent #:
7440336
Issue Dt:
10/21/2008
Application #:
11456058
Filing Dt:
07/06/2006
Publication #:
US20060242495
Pub Dt:
10/26/2006
Title:
MEMORY DEVICE HAVING TERMINALS FOR TRANSFERRING MULTIPLE TYPES OF DATA
98
Patent #:
7312513
Issue Dt:
12/25/2007
Application #:
11456366
Filing Dt:
07/10/2006
Publication #:
US20080007985
Pub Dt:
01/10/2008
Title:
ANTIFUSE CIRCUIT WITH WELL BIAS TRANSISTOR
99
Patent #:
7465488
Issue Dt:
12/16/2008
Application #:
11457223
Filing Dt:
07/13/2006
Publication #:
US20060244141
Pub Dt:
11/02/2006
Title:
BOW CONTROL IN AN ELECTRONIC PACKAGE
100
Patent #:
7643370
Issue Dt:
01/05/2010
Application #:
11457298
Filing Dt:
07/13/2006
Publication #:
US20060248415
Pub Dt:
11/02/2006
Title:
MEMORY DEVICE HAVING CONDITIONING OUTPUT DATA
Assignors
1
MICRON TECHNOLOGY, INC.
Exec Dt:
07/03/2018
2
MICRON SEMICONDUCTOR PRODUCTS, INC.
Exec Dt:
07/03/2018
Assignee
1
JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
10 S. DEARBORN
7TH FLOOR
CHICAGO, ILLINOIS 60603
Correspondence name and address
MARCELA ROBLEDO
2475 HANOVER STREET
PALO ALTO, CA 94304

Search Results as of: 05/28/2024 11:15 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT