|
|
Patent #:
|
|
Issue Dt:
|
03/27/2007
|
Application #:
|
10847840
|
Filing Dt:
|
05/18/2004
|
Publication #:
|
|
Pub Dt:
|
11/24/2005
| | | | |
Title:
|
BALLISTIC INJECTION NROM FLASH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2006
|
Application #:
|
10848030
|
Filing Dt:
|
05/17/2004
|
Publication #:
|
|
Pub Dt:
|
11/17/2005
| | | | |
Title:
|
METHODS OF PROCESSING A SEMICONDUCTOR SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2006
|
Application #:
|
10848247
|
Filing Dt:
|
05/17/2004
|
Publication #:
|
|
Pub Dt:
|
11/17/2005
| | | | |
Title:
|
METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2008
|
Application #:
|
10848261
|
Filing Dt:
|
05/18/2004
|
Publication #:
|
|
Pub Dt:
|
11/24/2005
| | | | |
Title:
|
DLL PHASE DETECTION USING ADVANCED PHASE EQUALIZATION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/2006
|
Application #:
|
10848389
|
Filing Dt:
|
05/19/2004
|
Publication #:
|
|
Pub Dt:
|
12/30/2004
| | | | |
Title:
|
TRENCH ISOLATION FOR SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2007
|
Application #:
|
10848606
|
Filing Dt:
|
05/17/2004
|
Publication #:
|
|
Pub Dt:
|
11/17/2005
| | | | |
Title:
|
SYSTEM AND METHOD FOR COMMUNICATING THE SYNCHRONIZATION STATUS OF MEMORY MODULES DURING INITIALIZATION OF THE MEMORY MODULES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/13/2007
|
Application #:
|
10850168
|
Filing Dt:
|
05/19/2004
|
Publication #:
|
|
Pub Dt:
|
10/28/2004
| | | | |
Title:
|
CONDUCTIVE CONNECTION FORMING METHODS, OXIDATION REDUCING METHODS, AND INTEGRATED CIRCUITS FORMED THEREBY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2007
|
Application #:
|
10850834
|
Filing Dt:
|
05/21/2004
|
Publication #:
|
|
Pub Dt:
|
12/30/2004
| | | | |
Title:
|
ANALYSIS OF THE QUALITY OF CONTACTS AND VIAS IN MULTI-METAL FABRICATION PROCESSES OF SEMICONDUCTOR DEVICES, METHOD AND TEST CHIP ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/27/2005
|
Application #:
|
10851616
|
Filing Dt:
|
05/20/2004
|
Publication #:
|
|
Pub Dt:
|
10/28/2004
| | | | |
Title:
|
SEMICONDUCTOR PROCESSING METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/27/2005
|
Application #:
|
10852312
|
Filing Dt:
|
05/24/2004
|
Publication #:
|
|
Pub Dt:
|
12/09/2004
| | | | |
Title:
|
POLYSILICON STRUCTURE IN A STACKED GATE REGION OF A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2007
|
Application #:
|
10852315
|
Filing Dt:
|
05/24/2004
|
Publication #:
|
|
Pub Dt:
|
10/28/2004
| | | | |
Title:
|
A PLURALITY OF SEMICONDUCTOR DIE IN AN ASSEMBLY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2006
|
Application #:
|
10852316
|
Filing Dt:
|
05/24/2004
|
Publication #:
|
|
Pub Dt:
|
10/28/2004
| | | | |
Title:
|
STACKED SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
10852318
|
Filing Dt:
|
05/24/2004
|
Publication #:
|
|
Pub Dt:
|
10/28/2004
| | | | |
Title:
|
METHOD OF FORMING SOCKET CONTACTS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2008
|
Application #:
|
10852784
|
Filing Dt:
|
05/24/2004
|
Publication #:
|
|
Pub Dt:
|
10/28/2004
| | | | |
Title:
|
DEPOSITION METHODS FOR IMPROVED DELIVERY OF METASTABLE SPECIES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/2005
|
Application #:
|
10852899
|
Filing Dt:
|
05/25/2004
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
Title:
|
WORD LINE DRIVER FOR NEGATIVE VOLTAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2009
|
Application #:
|
10853319
|
Filing Dt:
|
05/25/2004
|
Publication #:
|
|
Pub Dt:
|
12/01/2005
| | | | |
Title:
|
ON-DIE TERMINATION SNOOPING FOR 2T APPLICATIONS IN A MEMORY SYSTEM IMPLEMENTING NON-SELF-TERMINATING ODT SCHEMES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2007
|
Application #:
|
10853377
|
Filing Dt:
|
05/25/2004
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
Title:
|
ELIMINATION OF RDL USING TAPE BASE FLIP CHIP ON FLEX FOR DIE STACKING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2007
|
Application #:
|
10853538
|
Filing Dt:
|
05/25/2004
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
Title:
|
CASCODE I/O DRIVER WITH IMPROVED ESD OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2008
|
Application #:
|
10853941
|
Filing Dt:
|
05/25/2004
|
Publication #:
|
|
Pub Dt:
|
08/16/2007
| | | | |
Title:
|
METHODS OF FORMING METAL-CONTAINING FILMS OVER SURFACES OF SEMICONDUCTOR SUBSTRATES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2007
|
Application #:
|
10854396
|
Filing Dt:
|
05/26/2004
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
BALLISTIC DIRECT INJECTION FLASH MEMORY CELL ON STRAINED SILICON STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2006
|
Application #:
|
10854397
|
Filing Dt:
|
05/26/2004
|
Publication #:
|
|
Pub Dt:
|
06/23/2005
| | | | |
Title:
|
CHIP PROTECTION REGISTER LOCK CIRCUIT IN A FLASH MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2014
|
Application #:
|
10854552
|
Filing Dt:
|
05/26/2004
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
Title:
|
STRUCTURES AND METHODS TO ENHANCE COPPER METALLIZATION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2006
|
Application #:
|
10854686
|
Filing Dt:
|
05/26/2004
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
Title:
|
SEMICONDUCTOR MEMORY WITH WORDLINE TIMING
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
|
Application #:
|
10854775
|
Filing Dt:
|
05/26/2004
|
Publication #:
|
|
Pub Dt:
|
08/18/2005
| | | | |
Title:
|
LOW POWER COMPARATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2006
|
Application #:
|
10854849
|
Filing Dt:
|
05/25/2004
|
Publication #:
|
|
Pub Dt:
|
12/01/2005
| | | | |
Title:
|
SYSTEM AND METHOD FOR OPEN-LOOP SYNTHESIS OF OUTPUT CLOCK SIGNALS HAVING A SELECTED PHASE RELATIVE TO AN INPUT CLOCK SIGNAL
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/2010
|
Application #:
|
10854891
|
Filing Dt:
|
05/27/2004
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
Title:
|
SELF-ALIGNED, INTEGRATED CIRCUIT CONTACT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2006
|
Application #:
|
10855429
|
Filing Dt:
|
05/26/2004
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
METHODS FOR FORMING SEMICONDUCTOR STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/26/2006
|
Application #:
|
10855844
|
Filing Dt:
|
05/27/2004
|
Publication #:
|
|
Pub Dt:
|
12/01/2005
| | | | |
Title:
|
SOURCE LINES FOR NAND MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2007
|
Application #:
|
10856356
|
Filing Dt:
|
05/28/2004
|
Publication #:
|
|
Pub Dt:
|
12/30/2004
| | | | |
Title:
|
PROTECTIVE LAYERS FOR MRAM DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2008
|
Application #:
|
10857467
|
Filing Dt:
|
05/28/2004
|
Publication #:
|
|
Pub Dt:
|
12/01/2005
| | | | |
Title:
|
METHOD AND SYSTEM FOR TERMINATING WRITE COMMANDS IN A HUB-BASED MEMORY SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2007
|
Application #:
|
10857876
|
Filing Dt:
|
06/02/2004
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
Title:
|
RAISED PHOTODIODE SENSOR TO INCREASE FILL FACTOR AND QUANTUM EFFICIENCY IN SCALED PIXELS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2007
|
Application #:
|
10857948
|
Filing Dt:
|
06/02/2004
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
Title:
|
APPARATUS AND METHOD FOR MANUFACTURING POSITIVE OR NEGATIVE MICROLENSES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/04/2005
|
Application #:
|
10859016
|
Filing Dt:
|
06/01/2004
|
Publication #:
|
|
Pub Dt:
|
11/11/2004
| | | | |
Title:
|
GLOBAL COLUMN SELECT STRUCTURE FOR ACCESSING A MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/28/2006
|
Application #:
|
10859543
|
Filing Dt:
|
06/03/2004
|
Publication #:
|
|
Pub Dt:
|
11/24/2005
| | | | |
Title:
|
FIELD-SHIELDED SOI-MOS STRUCTURE FREE FROM FLOATING BODY EFFECTS, AND METHOD OF FABRICATION THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/2006
|
Application #:
|
10859814
|
Filing Dt:
|
06/03/2004
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
Title:
|
SYSTEM AND DEVICE INCLUDING A BARRIER LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2010
|
Application #:
|
10859883
|
Filing Dt:
|
06/02/2004
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
Title:
|
REACTORS, SYSTEMS AND METHODS FOR DEPOSITING THIN FILMS ONTO MICROFEATURE WORKPIECES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2006
|
Application #:
|
10860013
|
Filing Dt:
|
06/04/2004
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
Title:
|
PROGRAMMABLE CACHE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
12/12/2006
|
Application #:
|
10860699
|
Filing Dt:
|
06/02/2004
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
Title:
|
SYSTEMS AND METHODS FOR TESTING MICROELECTRONIC IMAGERS AND MICROFEATURE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2006
|
Application #:
|
10860939
|
Filing Dt:
|
06/03/2004
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
Title:
|
METHOD OF PROVIDING A STRUCTURE USING SELF-ALIGNED FEATURES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2005
|
Application #:
|
10861074
|
Filing Dt:
|
06/04/2004
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
Title:
|
METHOD AND APPARATUS FOR MEMORY CONTROL CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2009
|
Application #:
|
10861145
|
Filing Dt:
|
06/04/2004
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
SYSTEM AND METHOD FOR AN ASYNCHRONOUS DATA BUFFER HAVING BUFFER WRITE AND READ POINTERS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/18/2007
|
Application #:
|
10861163
|
Filing Dt:
|
06/04/2004
|
Publication #:
|
|
Pub Dt:
|
12/22/2005
| | | | |
Title:
|
MEMORY HUB TESTER INTERFACE AND METHOD FOR USE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2006
|
Application #:
|
10861340
|
Filing Dt:
|
06/04/2004
|
Publication #:
|
|
Pub Dt:
|
02/24/2005
| | | | |
Title:
|
METHOD FOR GENERATING A REFERENCE CURRENT FOR SENSE AMPLIFIERS AND CORRESPONDING GENERATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/03/2005
|
Application #:
|
10861499
|
Filing Dt:
|
06/07/2004
|
Publication #:
|
|
Pub Dt:
|
11/11/2004
| | | | |
Title:
|
METHOD OF DISTRIBUTED CACHING
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/2009
|
Application #:
|
10861645
|
Filing Dt:
|
06/04/2004
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
Title:
|
MEMORY SYSTEM WITH USER CONFIGURABLE DENSITY/PERFORMANCE OPTION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/20/2011
|
Application #:
|
10861646
|
Filing Dt:
|
06/04/2004
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
Title:
|
MEMORY DEVICE WITH USER CONFIGURABLE DENSITY/PERFORMANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/09/2007
|
Application #:
|
10861744
|
Filing Dt:
|
06/04/2004
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
Title:
|
GATED FIELD EFFECT DEVICE COMPRISING GATE DIELECTRIC HAVING DIFFERENT K REGIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
10861847
|
Filing Dt:
|
06/04/2004
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
Title:
|
PLATING BUSS AND A METHOD OF USE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2006
|
Application #:
|
10862102
|
Filing Dt:
|
06/04/2004
|
Publication #:
|
|
Pub Dt:
|
11/18/2004
| | | | |
Title:
|
SEMICONDUCTOR COMPONENT HAVING ENCAPSULATED DIE STACK
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2006
|
Application #:
|
10862284
|
Filing Dt:
|
06/07/2004
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
Title:
|
METHOD AND APPARATUS FOR SEMICONDUCTOR DEVICE REPAIR WITH REDUCED NUMBER OF PROGRAMMABLE ELEMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2006
|
Application #:
|
10862532
|
Filing Dt:
|
06/07/2004
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
Title:
|
APPARATUS AND METHOD FOR SEMICONDUCTOR DEVICE REPAIR WITH REDUCED NUMBER OF PROGRAMMABLE ELEMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/2006
|
Application #:
|
10862807
|
Filing Dt:
|
06/07/2004
|
Publication #:
|
|
Pub Dt:
|
11/11/2004
| | | | |
Title:
|
PHASE DETECTOR FOR ALL-DIGITAL PHASE LOCKED AND DELAY LOCKED LOOPS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/12/2006
|
Application #:
|
10863202
|
Filing Dt:
|
06/09/2004
|
Publication #:
|
|
Pub Dt:
|
12/09/2004
| | | | |
Title:
|
METHOD AND APPARATUS FOR A SHIFT REGISTER BASED INTERCONNECTION FOR A MASSIVELY PARALLEL PROCESSOR ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/29/2005
|
Application #:
|
10863203
|
Filing Dt:
|
06/09/2004
|
Publication #:
|
|
Pub Dt:
|
12/30/2004
| | | | |
Title:
|
INTERCONNECT LINE SELECTIVELY ISOLATED FROM AN UNDERLYING CONTACT PLUG
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2007
|
Application #:
|
10863447
|
Filing Dt:
|
06/08/2004
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
Title:
|
INTERPOSERS WITH RECEPTACLES FOR RECEIVING SEMICONDUCTOR DEVICES AND ASSEMBLIES AND PACKAGES INCLUDING SUCH INTERPOSERS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2008
|
Application #:
|
10863661
|
Filing Dt:
|
06/08/2004
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
Title:
|
METHOD AND APPARATUS TO MANAGE EXCEPTIONS IN NETWORK PROCESSORS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2007
|
Application #:
|
10863953
|
Filing Dt:
|
06/09/2004
|
Publication #:
|
|
Pub Dt:
|
11/11/2004
| | | | |
Title:
|
HIGHLY RELIABLE AMORPHOUS HIGH-K GATE DIELECTRIC ZROXNY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/28/2005
|
Application #:
|
10863966
|
Filing Dt:
|
06/08/2004
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
Title:
|
SYNTHESIZING SEMICONDUCTOR PROCESS FLOW MODELS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/2009
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Application #:
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10864974
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Filing Dt:
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06/10/2004
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Publication #:
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Pub Dt:
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12/15/2005
| | | | |
Title:
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PACKAGED MICROELECTRONIC IMAGERS AND METHODS OF PACKAGING MICROELECTRONIC IMAGERS
|
|
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Patent #:
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Issue Dt:
|
02/05/2008
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Application #:
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10865218
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Filing Dt:
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06/10/2004
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Publication #:
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Pub Dt:
|
12/15/2005
| | | | |
Title:
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DIFFERENTIAL INPUT BUFFER FOR RECEIVING SIGNALS RELEVANT TO LOW POWER
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Patent #:
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Issue Dt:
|
07/04/2006
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Application #:
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10865725
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Filing Dt:
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06/09/2004
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Publication #:
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Pub Dt:
|
12/15/2005
| | | | |
Title:
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VOLTAGE LEVEL TRANSLATOR CIRCUITRY
|
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Patent #:
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Issue Dt:
|
06/23/2009
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Application #:
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10866290
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Filing Dt:
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06/11/2004
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Publication #:
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Pub Dt:
|
11/25/2004
| | | | |
Title:
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FILLED TRENCH ISOLATION STRUCTURE
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|
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Patent #:
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Issue Dt:
|
08/07/2007
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Application #:
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10867023
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Filing Dt:
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06/14/2004
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Publication #:
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Pub Dt:
|
12/15/2005
| | | | |
Title:
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MICROFEATURE DEVICES AND METHODS FOR MANUFACTURING MICROFEATURE DEVICES
|
|
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Patent #:
|
|
Issue Dt:
|
05/23/2006
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Application #:
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10867378
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Filing Dt:
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06/14/2004
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Publication #:
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Pub Dt:
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01/27/2005
| | | | |
Title:
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FLASH MEMORY COMPRISING MEANS FOR CHECKING AND REFRESHING MEMORY CELLS IN THE ERASED STATE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2006
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Application #:
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10867381
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Filing Dt:
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06/14/2004
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Publication #:
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Pub Dt:
|
02/03/2005
| | | | |
Title:
|
WORD-PROGRAMMABLE FLASH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2007
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Application #:
|
10867530
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Filing Dt:
|
06/14/2004
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Publication #:
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Pub Dt:
|
11/25/2004
| | | | |
Title:
|
METHOD FOR FABRICATING SEMICONDUCTOR PACKAGE WITH MULTI-LAYER METAL BUMPS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2007
|
Application #:
|
10867800
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Filing Dt:
|
06/14/2004
|
Publication #:
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|
Pub Dt:
|
01/27/2005
| | | | |
Title:
|
NON-VOLATILE MEMORY CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/2005
|
Application #:
|
10868306
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Filing Dt:
|
06/15/2004
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Publication #:
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Pub Dt:
|
11/18/2004
| | | | |
Title:
|
PROGRAMMABLE SOFT-START CONTROL FOR CHARGE PUMP
|
|
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Patent #:
|
|
Issue Dt:
|
06/24/2008
|
Application #:
|
10869868
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Filing Dt:
|
06/18/2004
|
Publication #:
|
|
Pub Dt:
|
11/11/2004
| | | | |
Title:
|
IMAGER LIGHT SHIELD
|
|
|
Patent #:
|
|
Issue Dt:
|
01/09/2007
|
Application #:
|
10869976
|
Filing Dt:
|
06/16/2004
|
Publication #:
|
|
Pub Dt:
|
12/02/2004
| | | | |
Title:
|
INPUT SYSTEM FOR AN OPERATIONS CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2005
|
Application #:
|
10870130
|
Filing Dt:
|
06/16/2004
|
Publication #:
|
|
Pub Dt:
|
12/30/2004
| | | | |
Title:
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PREDECODE COLUMN ARCHITECTURE AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/2010
|
Application #:
|
10871153
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Filing Dt:
|
06/18/2004
|
Publication #:
|
|
Pub Dt:
|
12/22/2005
| | | | |
Title:
|
COMPLIANT SPRING CONTACT STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2011
|
Application #:
|
10871242
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Filing Dt:
|
06/18/2004
|
Publication #:
|
|
Pub Dt:
|
11/18/2004
| | | | |
Title:
|
ADVANCED VLSI METALLIZATION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2006
|
Application #:
|
10871918
|
Filing Dt:
|
06/18/2004
|
Publication #:
|
|
Pub Dt:
|
11/18/2004
| | | | |
Title:
|
NUCLEATION FOR IMPROVED FLASH ERASE CHARACTERISTICS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/2005
|
Application #:
|
10871919
|
Filing Dt:
|
06/18/2004
|
Publication #:
|
|
Pub Dt:
|
11/18/2004
| | | | |
Title:
|
NON-VOLATILE MEMORY ERASE CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/2009
|
Application #:
|
10872608
|
Filing Dt:
|
06/21/2004
|
Publication #:
|
|
Pub Dt:
|
12/22/2005
| | | | |
Title:
|
REAL TIME TESTING USING ON DIE TERMINATION (ODT) CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2007
|
Application #:
|
10872725
|
Filing Dt:
|
06/21/2004
|
Publication #:
|
|
Pub Dt:
|
05/05/2005
| | | | |
Title:
|
METHOD FOR MANUFACTURING FLASH MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2007
|
Application #:
|
10873112
|
Filing Dt:
|
06/23/2004
|
Publication #:
|
|
Pub Dt:
|
05/19/2005
| | | | |
Title:
|
SERIAL TRANSISTOR-CELL ARRAY ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2007
|
Application #:
|
10873226
|
Filing Dt:
|
06/23/2004
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
ISOLATION STRUCTURE FOR A MEMORY CELL USING AL2O3 DIELECTRIC
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2006
|
Application #:
|
10873230
|
Filing Dt:
|
06/23/2004
|
Publication #:
|
|
Pub Dt:
|
12/02/2004
| | | | |
Title:
|
METHOD OF FORMING ELECTRODE STRUCTURE FOR USE IN AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2006
|
Application #:
|
10873231
|
Filing Dt:
|
06/23/2004
|
Publication #:
|
|
Pub Dt:
|
11/18/2004
| | | | |
Title:
|
ELECTRODE STRUCTURE FOR USE IN AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2005
|
Application #:
|
10873512
|
Filing Dt:
|
06/21/2004
|
Publication #:
|
|
Pub Dt:
|
11/25/2004
| | | | |
Title:
|
METHOD AND CIRCUIT FOR ADJUSTING A VOLTAGE UPON DETECTION OF A COMMAND APPLIED TO AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/05/2008
|
Application #:
|
10873552
|
Filing Dt:
|
06/22/2004
|
Publication #:
|
|
Pub Dt:
|
11/18/2004
| | | | |
Title:
|
ELECTRICAL INTERCONNECT USING LOCALLY CONDUCTIVE ADHESIVE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2006
|
Application #:
|
10873689
|
Filing Dt:
|
06/22/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
METHOD OF FABRICATING A VERTICALLY INTEGRATED MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/03/2007
|
Application #:
|
10873692
|
Filing Dt:
|
06/22/2004
|
Publication #:
|
|
Pub Dt:
|
11/25/2004
| | | | |
Title:
|
METHODS FOR MEASURING PARASITIC CAPACITANCE AND INDUCTANCE OF I/O LEADS ON AN ELECTRICAL COMPONENT USING A NETWORK ANALYZER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2006
|
Application #:
|
10873817
|
Filing Dt:
|
06/21/2004
|
Publication #:
|
|
Pub Dt:
|
12/22/2005
| | | | |
Title:
|
GROUND PLANE FOR INTEGRATED CIRCUIT PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/23/2007
|
Application #:
|
10873968
|
Filing Dt:
|
06/22/2004
|
Publication #:
|
|
Pub Dt:
|
12/22/2005
| | | | |
Title:
|
APPARATUS AND METHOD FOR IMPROVING DYNAMIC REFRESH IN A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2006
|
Application #:
|
10874047
|
Filing Dt:
|
06/22/2004
|
Publication #:
|
|
Pub Dt:
|
11/18/2004
| | | | |
Title:
|
DIE STACKING SCHEME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2008
|
Application #:
|
10874226
|
Filing Dt:
|
06/24/2004
|
Publication #:
|
|
Pub Dt:
|
11/25/2004
| | | | |
Title:
|
METHOD OF FABRICATING AN ELECTRODE STRUCTURE FOR USE IN AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/27/2005
|
Application #:
|
10874369
|
Filing Dt:
|
06/24/2004
|
Publication #:
|
|
Pub Dt:
|
11/18/2004
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH NOVEL FILM COMPOSITION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/2006
|
Application #:
|
10874995
|
Filing Dt:
|
06/23/2004
|
Publication #:
|
|
Pub Dt:
|
11/18/2004
| | | | |
Title:
|
BIAS SENSING IN DRAM SENSE AMPLIFIERS THROUGH COUPLING AND DECOUPLING DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2007
|
Application #:
|
10874998
|
Filing Dt:
|
06/23/2004
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
QUEUE STRUCTURE WITH VALIDITY VECTOR AND ORDER ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/2009
|
Application #:
|
10875330
|
Filing Dt:
|
06/23/2004
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
PLASMA ETCHING METHODS AND CONTACT OPENING FORMING METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2005
|
Application #:
|
10875381
|
Filing Dt:
|
06/25/2004
|
Publication #:
|
|
Pub Dt:
|
11/18/2004
| | | | |
Title:
|
CHEMICAL VAPOR DEPOSITION METHOD FOR DEPOSITING A HIGH K DIELECTRIC FILM
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2007
|
Application #:
|
10875452
|
Filing Dt:
|
06/24/2004
|
Publication #:
|
|
Pub Dt:
|
11/25/2004
| | | | |
Title:
|
METHODS FOR NEUTRALIZING HOLES IN TUNNEL OXIDES OF FLOATING-GATE MEMORY CELLS AND DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/16/2006
|
Application #:
|
10875453
|
Filing Dt:
|
06/24/2004
|
Publication #:
|
|
Pub Dt:
|
11/25/2004
| | | | |
Title:
|
FLASH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
|
Application #:
|
10875534
|
Filing Dt:
|
06/24/2004
|
Publication #:
|
|
Pub Dt:
|
03/03/2005
| | | | |
Title:
|
PERMEABLE CAPACITOR ELECTRODE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2006
|
Application #:
|
10876184
|
Filing Dt:
|
06/24/2004
|
Publication #:
|
|
Pub Dt:
|
11/25/2004
| | | | |
Title:
|
METHODS FOR ERASING FLASH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2006
|
Application #:
|
10876333
|
Filing Dt:
|
06/24/2004
|
Publication #:
|
|
Pub Dt:
|
06/16/2005
| | | | |
Title:
|
METHOD OF FORMING ISOLATION FILM IN SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/28/2005
|
Application #:
|
10876664
|
Filing Dt:
|
06/28/2004
|
Publication #:
|
|
Pub Dt:
|
11/25/2004
| | | | |
Title:
|
CHALCOGENIDE GLASS CONSTANT CURRENT DEVICE, AND ITS METHOD OF FABRICATION AND OPERATION
|
|