skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:051028/0001   Pages: 834
Recorded: 11/12/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
03/15/2011
Application #:
11983201
Filing Dt:
11/07/2007
Publication #:
Pub Dt:
05/07/2009
Title:
HIGH SPEED, WIDE FREQUENCY-RANGE, DIGITAL PHASE MIXER AND METHODS OF OPERATION
2
Patent #:
Issue Dt:
02/22/2011
Application #:
11983241
Filing Dt:
11/07/2007
Publication #:
Pub Dt:
05/07/2009
Title:
CONTROLLING A MEMORY DEVICE RESPONSIVE TO DEGRADATION
3
Patent #:
Issue Dt:
11/03/2009
Application #:
11983617
Filing Dt:
11/09/2007
Publication #:
Pub Dt:
03/13/2008
Title:
LOCAL DIGIT LINE ARCHITECTURE AND METHOD FOR MEMORY DEVICES HAVING MULTI-BIT OR LOW CAPACITANCE MEMORY CELLS
4
Patent #:
Issue Dt:
11/17/2009
Application #:
11983618
Filing Dt:
11/09/2007
Publication #:
Pub Dt:
03/13/2008
Title:
SYSTEM AND METHOD FOR TESTING INTEGRATED CIRCUIT TIMING MARGINS
5
Patent #:
Issue Dt:
06/29/2010
Application #:
11984470
Filing Dt:
11/19/2007
Publication #:
Pub Dt:
05/29/2008
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
6
Patent #:
Issue Dt:
12/01/2009
Application #:
11984961
Filing Dt:
11/26/2007
Publication #:
Pub Dt:
05/29/2008
Title:
SEMICONDUCTOR MEMORY DEVICE
7
Patent #:
Issue Dt:
09/22/2009
Application #:
11986235
Filing Dt:
11/20/2007
Publication #:
Pub Dt:
03/27/2008
Title:
DETECTION OF ROW-TO-ROW SHORTS AND OTHER ROW DECODE DEFECTS IN MEMORY DEVICES
8
Patent #:
Issue Dt:
11/02/2010
Application #:
11986333
Filing Dt:
11/20/2007
Publication #:
Pub Dt:
05/21/2009
Title:
DEVICES AND METHODS FOR A THRESHOLD VOLTAGE DIFFERENCE COMPENSATED SENSE AMPLIFIER
9
Patent #:
Issue Dt:
10/19/2010
Application #:
11986334
Filing Dt:
11/20/2007
Publication #:
Pub Dt:
05/21/2009
Title:
DEVICES AND METHODS FOR REDUCING EFFECTS OF DEVICE MISMATCH IN TEMPERATURE SENSOR CIRCUITS
10
Patent #:
Issue Dt:
10/21/2008
Application #:
11987080
Filing Dt:
11/27/2007
Publication #:
Pub Dt:
05/29/2008
Title:
MEMORY MODULE
11
Patent #:
Issue Dt:
01/11/2011
Application #:
11987987
Filing Dt:
12/06/2007
Publication #:
Pub Dt:
04/17/2008
Title:
CONTROLLER FOR REFRESHING MEMORIES
12
Patent #:
Issue Dt:
05/24/2011
Application #:
11999359
Filing Dt:
12/04/2007
Publication #:
Pub Dt:
06/04/2009
Title:
SENSING MEMORY CELLS
13
Patent #:
Issue Dt:
09/06/2011
Application #:
12000373
Filing Dt:
12/12/2007
Publication #:
Pub Dt:
06/19/2008
Title:
REDUNDANCY CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE
14
Patent #:
Issue Dt:
12/30/2008
Application #:
12000472
Filing Dt:
12/13/2007
Publication #:
Pub Dt:
05/08/2008
Title:
SEMICONDUCTOR STORAGE DEVICE
15
Patent #:
Issue Dt:
11/30/2010
Application #:
12000714
Filing Dt:
12/17/2007
Publication #:
Pub Dt:
06/12/2008
Title:
SEMICONDUCTOR DEVICE
16
Patent #:
Issue Dt:
02/24/2015
Application #:
12001294
Filing Dt:
12/10/2007
Publication #:
Pub Dt:
05/01/2008
Title:
Method for performing error corrections of digital information codified as a symbol sequence
17
Patent #:
Issue Dt:
07/07/2009
Application #:
12001709
Filing Dt:
12/11/2007
Publication #:
Pub Dt:
06/26/2008
Title:
METHOD AND SYSTEM FOR CONTROLLING REFRESH TO AVOID MEMORY CELL DATA LOSSES
18
Patent #:
Issue Dt:
12/28/2010
Application #:
12002829
Filing Dt:
12/18/2007
Publication #:
Pub Dt:
06/18/2009
Title:
SYMMETRICALLY OPERATING SINGLE-ENDED INPUT BUFFER DEVICES AND METHODS
19
Patent #:
Issue Dt:
06/21/2011
Application #:
12002830
Filing Dt:
12/18/2007
Publication #:
Pub Dt:
06/18/2009
Title:
METHODS, DEVICES, AND SYSTEMS FOR EXPERIENCING REDUCED UNEQUAL TESTING DEGRADATION
20
Patent #:
Issue Dt:
06/29/2010
Application #:
12003573
Filing Dt:
12/28/2007
Publication #:
Pub Dt:
06/05/2008
Title:
DIFFERENTIAL NEGATIVE RESISTANCE MEMORY
21
Patent #:
Issue Dt:
09/06/2011
Application #:
12004034
Filing Dt:
12/20/2007
Publication #:
Pub Dt:
07/24/2008
Title:
METHOD AND STRUCTURE TO REDUCE OPTICAL CROSSTALK IN A SOLID STATE IMAGER
22
Patent #:
Issue Dt:
08/10/2010
Application #:
12006706
Filing Dt:
01/04/2008
Publication #:
Pub Dt:
05/08/2008
Title:
PROCESS FOR SELF-ALIGNED MANUFACTURE OF INTEGRATED ELECTRONIC DEVICES
23
Patent #:
Issue Dt:
07/06/2010
Application #:
12007556
Filing Dt:
01/11/2008
Publication #:
Pub Dt:
07/31/2008
Title:
METHOD OF FORMING A VARIABLE RESISTANCE MEMORY DEVICE COMPRISING TIN SELENIDE
24
Patent #:
Issue Dt:
10/19/2010
Application #:
12007758
Filing Dt:
01/15/2008
Publication #:
Pub Dt:
07/24/2008
Title:
SEMICONDUCTOR DEVICE INCLUDING GROUND AND POWER-SUPPLY PLANES AND A DIELECTRIC LAYER BETWEEN THE GROUND AND POWER-SUPPLY PLANES
25
Patent #:
Issue Dt:
06/29/2010
Application #:
12008416
Filing Dt:
01/10/2008
Publication #:
Pub Dt:
07/16/2009
Title:
SEMICONDUCTOR MEMORY DEVICE HAVING BIT LINE PRE-CHARGE UNIT SEPARATED FROM DATA REGISTER
26
Patent #:
Issue Dt:
08/16/2011
Application #:
12008417
Filing Dt:
01/10/2008
Publication #:
Pub Dt:
07/16/2009
Title:
SEMICONDUCTOR MEMORY COLUMN DECODER DEVICE AND METHOD
27
Patent #:
Issue Dt:
06/29/2010
Application #:
12008564
Filing Dt:
01/10/2008
Publication #:
Pub Dt:
07/16/2009
Title:
DATA BUS POWER-REDUCED SEMICONDUCTOR STORAGE APPARATUS
28
Patent #:
Issue Dt:
03/31/2009
Application #:
12009521
Filing Dt:
01/18/2008
Publication #:
Pub Dt:
06/12/2008
Title:
OPEN DIGIT LINE ARRAY ARCHITECTURE FOR A MEMORY ARRAY
29
Patent #:
Issue Dt:
02/16/2010
Application #:
12010109
Filing Dt:
01/22/2008
Publication #:
Pub Dt:
07/24/2008
Title:
POLISHING APPARATUS INCLUDING SEPARATE RETAINER RINGS
30
Patent #:
Issue Dt:
01/04/2011
Application #:
12010420
Filing Dt:
01/24/2008
Publication #:
Pub Dt:
08/07/2008
Title:
RESISTANCE VARIABLE MEMORY DEVICES WITH PASSIVATING MATERIAL
31
Patent #:
Issue Dt:
01/11/2011
Application #:
12010548
Filing Dt:
01/25/2008
Publication #:
Pub Dt:
07/31/2008
Title:
SEMICONDUCTOR DEVICE INCLUDING A PLURALITY OF FUSE ELEMENTS AND ATTENUATION MEMBERS BETWEEN OR AROUND THE PLURALITY OF FUSE ELEMENTS
32
Patent #:
Issue Dt:
12/01/2009
Application #:
12012840
Filing Dt:
02/06/2008
Publication #:
Pub Dt:
06/12/2008
Title:
METHOD AND APPARATUS FOR GENERATING AND DETECTING INITIALIZATION PATTERNS FOR HIGH SPEED DRAM SYSTEMS
33
Patent #:
Issue Dt:
08/11/2009
Application #:
12013205
Filing Dt:
01/11/2008
Publication #:
Pub Dt:
06/05/2008
Title:
SELF-IDENTIFYING STACKED DIE SEMICONDUCTOR COMPONENTS
34
Patent #:
Issue Dt:
03/02/2010
Application #:
12013598
Filing Dt:
01/14/2008
Publication #:
Pub Dt:
05/15/2008
Title:
NON-PLANAR FLASH MEMORY ARRAY WITH SHIELDED FLOATING GATES ON SILICON MESAS
35
Patent #:
Issue Dt:
06/30/2009
Application #:
12013963
Filing Dt:
01/14/2008
Publication #:
Pub Dt:
06/05/2008
Title:
SEMICONDUCTOR CONSTRUCTIONS
36
Patent #:
Issue Dt:
03/12/2013
Application #:
12014508
Filing Dt:
01/15/2008
Publication #:
Pub Dt:
07/16/2009
Title:
METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS, AND METHODS OF FORMING NAND UNIT CELLS
37
Patent #:
Issue Dt:
02/14/2012
Application #:
12014598
Filing Dt:
01/15/2008
Publication #:
Pub Dt:
07/16/2009
Title:
MEMORY APPARATUS AND METHOD USING ERASURE ERROR CORRECTION TO REDUCE POWER CONSUMPTION
38
Patent #:
Issue Dt:
07/13/2010
Application #:
12014658
Filing Dt:
01/15/2008
Publication #:
Pub Dt:
07/16/2009
Title:
SYSTEM AND DEVICES INCLUDING MEMORY RESISTANT TO PROGRAM DISTURB AND METHODS OF USING, MAKING, AND OPERATING THE SAME
39
Patent #:
Issue Dt:
03/01/2011
Application #:
12014854
Filing Dt:
01/16/2008
Publication #:
Pub Dt:
07/16/2009
Title:
MULTI-LEVEL PROGRAMMABLE PCRAM MEMORY
40
Patent #:
Issue Dt:
11/10/2009
Application #:
12015311
Filing Dt:
01/16/2008
Publication #:
Pub Dt:
07/16/2009
Title:
DATA BUS INVERSION APPARATUS, SYSTEMS, AND METHODS
41
Patent #:
Issue Dt:
08/23/2011
Application #:
12017308
Filing Dt:
01/21/2008
Publication #:
Pub Dt:
06/26/2008
Title:
SPINTRONIC DEVICES WITH INTEGRATED TRANSISTORS
42
Patent #:
Issue Dt:
04/17/2012
Application #:
12017905
Filing Dt:
01/22/2008
Publication #:
Pub Dt:
07/23/2009
Title:
CELL OPERATION MONITORING
43
Patent #:
Issue Dt:
07/26/2011
Application #:
12018254
Filing Dt:
01/23/2008
Publication #:
Pub Dt:
06/05/2008
Title:
METHOD TO REDUCE CHARGE BUILDUP DURING HIGH ASPECT RATIO CONTACT ETCH
44
Patent #:
Issue Dt:
01/05/2010
Application #:
12018375
Filing Dt:
01/23/2008
Publication #:
Pub Dt:
09/04/2008
Title:
REFERENCE VOLTAGE GENERATING CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
45
Patent #:
Issue Dt:
02/01/2011
Application #:
12018442
Filing Dt:
01/23/2008
Publication #:
Pub Dt:
07/23/2009
Title:
SYSTEM, APPARATUS, AND METHOD FOR SELECTABLE VOLTAGE REGULATION
46
Patent #:
Issue Dt:
11/24/2015
Application #:
12018550
Filing Dt:
01/23/2008
Publication #:
Pub Dt:
07/23/2009
Title:
NON-VOLATILE MEMORY WITH LPDRAM
47
Patent #:
Issue Dt:
04/19/2011
Application #:
12018612
Filing Dt:
01/23/2008
Publication #:
Pub Dt:
07/23/2009
Title:
METHODS OF FORMING PHOTOMASKS
48
Patent #:
Issue Dt:
01/19/2010
Application #:
12019920
Filing Dt:
01/25/2008
Publication #:
Pub Dt:
05/22/2008
Title:
VIAS HAVING VARYING DIAMETERS AND FILLS FOR USE WITH A SEMICONDUCTOR DEVICE AND METHODS OF FORMING SEMICONDUCTOR DEVICE STRUCTURES INCLUDING SAME
49
Patent #:
Issue Dt:
05/01/2012
Application #:
12020110
Filing Dt:
01/25/2008
Publication #:
Pub Dt:
07/30/2009
Title:
NAND FLASH CONTENT ADDRESSABLE MEMORY
50
Patent #:
Issue Dt:
11/09/2010
Application #:
12020289
Filing Dt:
01/25/2008
Publication #:
Pub Dt:
07/30/2009
Title:
COUPLING CANCELLATION SCHEME
51
Patent #:
Issue Dt:
03/29/2011
Application #:
12020460
Filing Dt:
01/25/2008
Publication #:
Pub Dt:
07/30/2009
Title:
RANDOM TELEGRAPH SIGNAL NOISE REDUCTION SCHEME FOR SEMICONDUCTOR MEMORIES
52
Patent #:
Issue Dt:
02/12/2013
Application #:
12020738
Filing Dt:
01/28/2008
Publication #:
Pub Dt:
06/12/2008
Title:
STACKED DIE IN DIE BGA PACKAGE
53
Patent #:
Issue Dt:
10/13/2009
Application #:
12020752
Filing Dt:
01/28/2008
Publication #:
Pub Dt:
05/22/2008
Title:
METHOD OF MANUFACTURING SIDEWALL SPACERS ON A MEMORY DEVICE, AND DEVICE COMPRISING SAME
54
Patent #:
Issue Dt:
06/06/2017
Application #:
12020899
Filing Dt:
01/28/2008
Publication #:
Pub Dt:
06/12/2008
Title:
CARRIERLESS CHIP PACKAGE FOR INTEGRATED CIRCUIT DEVICES, AND METHODS OF MAKING SAME
55
Patent #:
Issue Dt:
05/01/2012
Application #:
12020967
Filing Dt:
01/28/2008
Publication #:
Pub Dt:
07/30/2009
Title:
CIRCUIT AND METHODS TO PROTECT INPUT BUFFER
56
Patent #:
Issue Dt:
12/14/2010
Application #:
12022211
Filing Dt:
01/30/2008
Publication #:
Pub Dt:
06/19/2008
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT PACKAGE HAVING ELECTRICALLY DISCONNECTED SOLDER BALLS FOR MOUNTING
57
Patent #:
Issue Dt:
11/03/2009
Application #:
12022451
Filing Dt:
01/30/2008
Publication #:
Pub Dt:
06/12/2008
Title:
DRAM CELL DESIGN WITH FOLDED DIGITLINE ARCHITECTURE AND ANGLED ACTIVE AREAS
58
Patent #:
Issue Dt:
04/05/2011
Application #:
12025587
Filing Dt:
02/04/2008
Publication #:
Pub Dt:
08/06/2009
Title:
BAND-GAP REFERENCE VOLTAGE DETECTION CIRCUIT
59
Patent #:
Issue Dt:
11/24/2009
Application #:
12025623
Filing Dt:
02/04/2008
Publication #:
Pub Dt:
08/06/2009
Title:
WAFER PROCESSING INCLUDING DICING
60
Patent #:
Issue Dt:
07/13/2010
Application #:
12026155
Filing Dt:
02/05/2008
Publication #:
Pub Dt:
08/06/2009
Title:
DELAY LOCKED LOOP CIRCUIT AND METHOD
61
Patent #:
Issue Dt:
04/07/2015
Application #:
12026214
Filing Dt:
02/05/2008
Publication #:
Pub Dt:
12/16/2010
Title:
Method to Produce Nanometer-Sized Features with Directed Assembly of Block Copolymers
62
Patent #:
Issue Dt:
05/24/2011
Application #:
12026693
Filing Dt:
02/06/2008
Publication #:
Pub Dt:
08/06/2009
Title:
RANK SELECT USING A GLOBAL SELECT PIN
63
Patent #:
Issue Dt:
06/09/2009
Application #:
12026701
Filing Dt:
02/06/2008
Publication #:
Pub Dt:
06/05/2008
Title:
RESISTIVE MEMORY DEVICE
64
Patent #:
Issue Dt:
05/12/2009
Application #:
12027106
Filing Dt:
02/06/2008
Publication #:
Pub Dt:
06/12/2008
Title:
MICROELECTRONIC DEVICES AND METHODS FOR FORMING INTERCONNECTS IN MICROELECTRONIC DEVICES
65
Patent #:
Issue Dt:
05/03/2011
Application #:
12027124
Filing Dt:
02/06/2008
Publication #:
Pub Dt:
08/06/2009
Title:
APPARATUS AND METHOD FOR EXTERNAL TO INTERNAL CLOCK GENERATION
66
Patent #:
Issue Dt:
05/04/2010
Application #:
12027824
Filing Dt:
02/07/2008
Publication #:
Pub Dt:
08/13/2009
Title:
MAINTENANCE OF AMPLIFIED SIGNALS USING HIGH-VOLTAGE-THRESHOLD TRANSISTORS
67
Patent #:
Issue Dt:
02/02/2010
Application #:
12028211
Filing Dt:
02/08/2008
Publication #:
Pub Dt:
06/05/2008
Title:
PACKAGED MICROELECTRONIC DEVICES AND METHODS FOR PACKAGING MICROELECTRONIC DEVICES
68
Patent #:
Issue Dt:
01/24/2012
Application #:
12030562
Filing Dt:
02/13/2008
Publication #:
Pub Dt:
08/13/2009
Title:
ONE-DIMENSIONAL ARRAYS OF BLOCK COPOLYMER CYLINDERS AND APPLICATIONS THEREOF
69
Patent #:
Issue Dt:
12/06/2011
Application #:
12031015
Filing Dt:
02/14/2008
Publication #:
Pub Dt:
08/20/2009
Title:
METHODS OF FORMING DRAM ARRAYS
70
Patent #:
Issue Dt:
06/15/2010
Application #:
12032928
Filing Dt:
02/18/2008
Publication #:
Pub Dt:
03/12/2009
Title:
FUSE DATA ACQUISITION
71
Patent #:
Issue Dt:
01/05/2016
Application #:
12033684
Filing Dt:
02/19/2008
Publication #:
Pub Dt:
08/20/2009
Title:
MEMORY DEVICE WITH NETWORK ON CHIP METHODS, APPARATUS, AND SYSTEMS
72
Patent #:
Issue Dt:
10/21/2014
Application #:
12033780
Filing Dt:
02/19/2008
Publication #:
Pub Dt:
08/20/2009
Title:
DEVICES INCLUDING FIN TRANSISTORS ROBUST TO GATE SHORTS AND METHODS OF MAKING THE SAME
73
Patent #:
Issue Dt:
11/17/2015
Application #:
12033799
Filing Dt:
02/19/2008
Publication #:
Pub Dt:
08/20/2009
Title:
SYSTEMS AND DEVICES INCLUDING FIN FIELD-EFFECT TRANSISTORS EACH HAVING U-SHAPED SEMICONDUCTOR FIN
74
Patent #:
Issue Dt:
10/13/2009
Application #:
12033855
Filing Dt:
02/19/2008
Publication #:
Pub Dt:
07/03/2008
Title:
METHOD FOR MANAGING BAD MEMORY BLOCKS IN A NONVOLATILE-MEMORY DEVICE, AND NONVOLATILE-MEMORY DEVICE IMPLEMENTING THE MANAGEMENT METHOD
75
Patent #:
Issue Dt:
07/19/2011
Application #:
12035008
Filing Dt:
02/21/2008
Publication #:
Pub Dt:
08/27/2009
Title:
RHEOLOGICAL FLUIDS FOR PARTICLE REMOVAL
76
Patent #:
Issue Dt:
05/05/2009
Application #:
12035552
Filing Dt:
02/22/2008
Publication #:
Pub Dt:
06/19/2008
Title:
SINGLE LEVEL CELL PROGRAMMING IN A MULTIPLE LEVEL CELL NON-VOLATILE MEMORY DEVICE
77
Patent #:
Issue Dt:
04/20/2010
Application #:
12037560
Filing Dt:
02/26/2008
Publication #:
Pub Dt:
08/27/2009
Title:
METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
78
Patent #:
Issue Dt:
01/11/2011
Application #:
12037649
Filing Dt:
02/26/2008
Publication #:
Pub Dt:
08/27/2009
Title:
LOW VOLTAGE OPERATION BIAS CURRENT GENERATION CIRCUIT
79
Patent #:
Issue Dt:
04/06/2010
Application #:
12038445
Filing Dt:
02/27/2008
Publication #:
Pub Dt:
10/02/2008
Title:
NON-VOLATILE MULTILEVEL MEMORY CELL PROGRAMMING
80
Patent #:
Issue Dt:
03/23/2010
Application #:
12038704
Filing Dt:
02/27/2008
Publication #:
Pub Dt:
11/20/2008
Title:
READING NON-VOLATILE MULTILEVEL MEMORY CELLS
81
Patent #:
Issue Dt:
01/17/2012
Application #:
12039497
Filing Dt:
02/28/2008
Publication #:
Pub Dt:
07/03/2008
Title:
CONDUCTIVE SYSTEMS AND DEVICES INCLUDING WIRES COUPLED TO ANISOTROPIC CONDUCTIVE FILM, AND METHODS OF FORMING THE SAME
82
Patent #:
Issue Dt:
07/27/2010
Application #:
12041268
Filing Dt:
03/03/2008
Publication #:
Pub Dt:
09/03/2009
Title:
I/O CIRCUIT WITH PHASE MIXER FOR SLEW RATE CONTROL
83
Patent #:
Issue Dt:
10/19/2010
Application #:
12041755
Filing Dt:
03/04/2008
Publication #:
Pub Dt:
06/26/2008
Title:
METHOD AND APPARATUS FOR DATA TRANSFER
84
Patent #:
Issue Dt:
07/20/2010
Application #:
12041766
Filing Dt:
03/04/2008
Publication #:
Pub Dt:
09/10/2009
Title:
ADAPTIVE OPERATIONAL TRANSCONDUCTANCE AMPLIFIER LOAD COMPENSATION
85
Patent #:
Issue Dt:
08/25/2009
Application #:
12042021
Filing Dt:
03/04/2008
Publication #:
Pub Dt:
06/26/2008
Title:
SELECTIVE THRESHOLD VOLTAGE VERIFICATION AND COMPACTION
86
Patent #:
Issue Dt:
02/26/2013
Application #:
12042070
Filing Dt:
03/04/2008
Publication #:
Pub Dt:
06/26/2008
Title:
METHODS AND APPARATUS FOR WRITING DATA TO NON-VOLATILE MEMORY
87
Patent #:
Issue Dt:
09/06/2011
Application #:
12042505
Filing Dt:
03/05/2008
Publication #:
Pub Dt:
09/10/2009
Title:
DEVICES, SYSTEMS, AND METHODS FOR A POWER GENERATOR SYSTEM
88
Patent #:
Issue Dt:
10/25/2011
Application #:
12042518
Filing Dt:
03/05/2008
Publication #:
Pub Dt:
09/10/2009
Title:
METHOD AND MEMORY DEVICE PROVIDING REDUCED QUANTITY OF INTERCONNECTIONS
89
Patent #:
Issue Dt:
03/29/2011
Application #:
12043813
Filing Dt:
03/06/2008
Publication #:
Pub Dt:
09/10/2009
Title:
DEVICES WITH CAVITY-DEFINED GATES AND METHODS OF MAKING THE SAME
90
Patent #:
Issue Dt:
06/08/2010
Application #:
12043848
Filing Dt:
03/06/2008
Publication #:
Pub Dt:
09/10/2009
Title:
DEVICES AND METHODS FOR DRIVING A SIGNAL OFF AN INTEGRATED CIRCUIT
91
Patent #:
Issue Dt:
09/21/2010
Application #:
12045353
Filing Dt:
03/10/2008
Publication #:
Pub Dt:
09/10/2009
Title:
DIGIT LINE EQUILIBRATION USING ACCESS DEVICES AT THE EDGE OF SUB-ARRAYS
92
Patent #:
Issue Dt:
04/24/2012
Application #:
12045373
Filing Dt:
03/10/2008
Publication #:
Pub Dt:
09/10/2009
Title:
METHOD OF REDUCING PHOTORESIST DEFECTS DURING FABRICATION OF A SEMICONDUCTOR DEVICE
93
Patent #:
Issue Dt:
05/25/2010
Application #:
12045569
Filing Dt:
03/10/2008
Publication #:
Pub Dt:
06/26/2008
Title:
FLASH MEMORY WITH RECESSED FLOATING GATE
94
Patent #:
Issue Dt:
07/19/2011
Application #:
12045590
Filing Dt:
03/10/2008
Publication #:
Pub Dt:
06/26/2008
Title:
FLASH MEMORY WITH RECESSED FLOATING GATE
95
Patent #:
Issue Dt:
02/24/2009
Application #:
12046571
Filing Dt:
03/12/2008
Publication #:
Pub Dt:
07/03/2008
Title:
METHOD AND APPARATUS FOR SENSING FLASH MEMORY USING DELTA SIGMA MODULATION
96
Patent #:
Issue Dt:
04/13/2010
Application #:
12046614
Filing Dt:
03/12/2008
Publication #:
Pub Dt:
07/10/2008
Title:
MICROELECTRONIC COMPONENT ASSEMBLIES WITH RECESSED WIRE BONDS AND METHODS OF MAKING SAME
97
Patent #:
Issue Dt:
11/24/2009
Application #:
12046652
Filing Dt:
03/12/2008
Publication #:
Pub Dt:
06/26/2008
Title:
APPARATUS AND METHOD FOR CONTROLLING A DELAY- OR PHASE- LOCKED LOOP AS A FUNCTION OF LOOP FREQUENCY
98
Patent #:
Issue Dt:
03/15/2011
Application #:
12047414
Filing Dt:
03/13/2008
Publication #:
Pub Dt:
09/17/2009
Title:
MEMORY ARRAY WITH A PAIR OF MEMORY-CELL STRINGS TO A SINGLE CONDUCTIVE PILLAR
99
Patent #:
Issue Dt:
09/22/2009
Application #:
12047756
Filing Dt:
03/13/2008
Publication #:
Pub Dt:
07/03/2008
Title:
WRITE LATENCY TRACKING USING A DELAY LOCK LOOP IN A SYNCHRONOUS DRAM
100
Patent #:
Issue Dt:
06/08/2010
Application #:
12047841
Filing Dt:
03/13/2008
Publication #:
Pub Dt:
09/17/2009
Title:
REDUCTION OF PUNCH-THROUGH DISTURB DURING PROGRAMMING OF A MEMORY DEVICE
Assignor
1
Exec Dt:
07/31/2019
Assignees
1
8000 S FEDERAL WAY
BOISE, IDAHO 83707
2
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

Search Results as of: 05/31/2024 10:38 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT