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Patent Assignment Details
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Reel/Frame:054633/0001   Pages: 1245
Recorded: 11/02/2020
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 8468
Page 81 of 85
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85
1
Patent #:
10770374
Issue Dt:
09/08/2020
Application #:
16255505
Filing Dt:
01/23/2019
Publication #:
US20200235038
Pub Dt:
07/23/2020
Title:
THROUGH-SILICON VIAS FOR HETEROGENEOUS INTEGRATION OF SEMICONDUCTOR DEVICE STRUCTURES
2
Patent #:
10777637
Issue Dt:
09/15/2020
Application #:
16256252
Filing Dt:
01/24/2019
Publication #:
US20200243643
Pub Dt:
07/30/2020
Title:
INTEGRATED CIRCUIT PRODUCT WITH A MULTI-LAYER SINGLE DIFFUSION BREAK AND METHODS OF MAKING SUCH PRODUCTS
3
Patent #:
10910304
Issue Dt:
02/02/2021
Application #:
16256595
Filing Dt:
01/24/2019
Publication #:
US20200243439
Pub Dt:
07/30/2020
Title:
TIGHT PITCH WIRINGS AND CAPACITOR(S)
4
Patent #:
10903207
Issue Dt:
01/26/2021
Application #:
16258714
Filing Dt:
01/28/2019
Publication #:
US20190172846
Pub Dt:
06/06/2019
Title:
METHOD OF FORMING AN INTEGRATED CIRCUIT (IC) WITH SHALLOW TRENCH ISOLATION (STI) REGIONS AND THE RESULTING IC STRUCTURE
5
Patent #:
10644152
Issue Dt:
05/05/2020
Application #:
16258857
Filing Dt:
01/28/2019
Title:
BURIED-CHANNEL LOW NOISE TRANSISTORS AND METHODS OF MAKING SUCH DEVICES
6
Patent #:
10726896
Issue Dt:
07/28/2020
Application #:
16261617
Filing Dt:
01/30/2019
Publication #:
US20200243126
Pub Dt:
07/30/2020
Title:
RESISTIVE NONVOLATILE MEMORY STRUCTURE EMPLOYING A STATISTICAL SENSING SCHEME AND METHOD
7
Patent #:
10825897
Issue Dt:
11/03/2020
Application #:
16262052
Filing Dt:
01/30/2019
Publication #:
US20200243645
Pub Dt:
07/30/2020
Title:
FORMATION OF ENHANCED FACETED RAISED SOURCE/DRAIN EPI MATERIAL FOR TRANSISTOR DEVICES
8
Patent #:
10777642
Issue Dt:
09/15/2020
Application #:
16262105
Filing Dt:
01/30/2019
Publication #:
US20200243646
Pub Dt:
07/30/2020
Title:
FORMATION OF ENHANCED FACETED RAISED SOURCE/DRAIN EPI MATERIAL FOR TRANSISTOR DEVICES
9
Patent #:
10784143
Issue Dt:
09/22/2020
Application #:
16263650
Filing Dt:
01/31/2019
Publication #:
US20200251377
Pub Dt:
08/06/2020
Title:
TRENCH ISOLATION PRESERVATION DURING TRANSISTOR FABRICATION
10
Patent #:
10707303
Issue Dt:
07/07/2020
Application #:
16264273
Filing Dt:
01/31/2019
Title:
METHOD, APPARATUS, AND SYSTEM FOR IMPROVING SCALING OF ISOLATION STRUCTURES FOR GATE, SOURCE, AND/OR DRAIN CONTACTS
11
Patent #:
10923427
Issue Dt:
02/16/2021
Application #:
16266196
Filing Dt:
02/04/2019
Publication #:
US20190172789
Pub Dt:
06/06/2019
Title:
SOI WAFERS WITH BURIED DIELECTRIC LAYERS TO PREVENT CU DIFFUSION
12
Patent #:
10727253
Issue Dt:
07/28/2020
Application #:
16266307
Filing Dt:
02/04/2019
Publication #:
US20200251498
Pub Dt:
08/06/2020
Title:
SIMPLIFIED MEMORY CELLS BASED ON FULLY-DEPLETED SILICON-ON-INSULATOR TRANSISTORS
13
Patent #:
10707207
Issue Dt:
07/07/2020
Application #:
16277496
Filing Dt:
02/15/2019
Title:
METHOD, APPARATUS, AND SYSTEM FOR IMPROVED GATE CONNECTIONS ON ISOLATION STRUCTURES IN FINFET DEVICES
14
Patent #:
10354918
Issue Dt:
07/16/2019
Application #:
16279550
Filing Dt:
02/19/2019
Publication #:
US20190181044
Pub Dt:
06/13/2019
Title:
CONTACT ELEMENT STRUCTURE OF A SEMICONDUCTOR DEVICE
15
Patent #:
10825811
Issue Dt:
11/03/2020
Application #:
16280343
Filing Dt:
02/20/2019
Publication #:
US20200266286
Pub Dt:
08/20/2020
Title:
GATE CUT FIRST ISOLATION FORMATION WITH CONTACT FORMING PROCESS MASK PROTECTION
16
Patent #:
10909443
Issue Dt:
02/02/2021
Application #:
16283887
Filing Dt:
02/25/2019
Publication #:
US20200272880
Pub Dt:
08/27/2020
Title:
NEUROMORPHIC CIRCUIT STRUCTURE AND METHOD TO FORM SAME
17
Patent #:
10665669
Issue Dt:
05/26/2020
Application #:
16285657
Filing Dt:
02/26/2019
Title:
INSULATIVE STRUCTURE WITH DIFFUSION BREAK INTEGRAL WITH ISOLATION LAYER AND METHODS TO FORM SAME
18
Patent #:
10665281
Issue Dt:
05/26/2020
Application #:
16286942
Filing Dt:
02/27/2019
Title:
RESISTIVE NONVOLATILE MEMORY CELLS WITH SHARED ACCESS TRANSISTORS
19
Patent #:
NONE
Issue Dt:
Application #:
16287365
Filing Dt:
02/27/2019
Publication #:
US20200273953
Pub Dt:
08/27/2020
Title:
METHODS OF FORMING SHORT-CHANNEL AND LONG-CHANNEL TRANSISTOR DEVICES WITH DIFFERENT HEIGHTS OF WORK FUNCTION METAL AND THE RESULTING IC PRODUCTS
20
Patent #:
NONE
Issue Dt:
Application #:
16288152
Filing Dt:
02/28/2019
Publication #:
US20200279783
Pub Dt:
09/03/2020
Title:
PROCESS CONTROL OF SEMICONDUCTOR FABRICATION BASED ON LINKAGE BETWEEN DIFFERENT FABRICATION STEPS
21
Patent #:
10684530
Issue Dt:
06/16/2020
Application #:
16288634
Filing Dt:
02/28/2019
Title:
ELECTRO-OPTIC MODULATORS WITH LAYERED ARRANGEMENTS
22
Patent #:
10923389
Issue Dt:
02/16/2021
Application #:
16288780
Filing Dt:
02/28/2019
Publication #:
US20190198381
Pub Dt:
06/27/2019
Title:
AIR-GAP SPACERS FOR FIELD-EFFECT TRANSISTORS
23
Patent #:
10916470
Issue Dt:
02/09/2021
Application #:
16290178
Filing Dt:
03/01/2019
Publication #:
US20200279768
Pub Dt:
09/03/2020
Title:
MODIFIED DIELECTRIC FILL BETWEEN THE CONTACTS OF FIELD-EFFECT TRANSISTORS
24
Patent #:
10641956
Issue Dt:
05/05/2020
Application #:
16291346
Filing Dt:
03/04/2019
Title:
POLARIZERS AND POLARIZATION SPLITTERS PHASE-MATCHED WITH A BACK-END-OF-LINE LAYER
25
Patent #:
10649140
Issue Dt:
05/12/2020
Application #:
16291671
Filing Dt:
03/04/2019
Title:
BACK-END-OF-LINE BLOCKING STRUCTURES ARRANGED OVER A WAVEGUIDE CORE
26
Patent #:
10622357
Issue Dt:
04/14/2020
Application #:
16294117
Filing Dt:
03/06/2019
Publication #:
US20190206868
Pub Dt:
07/04/2019
Title:
FINFET INCLUDING TUNABLE FIN HEIGHT AND TUNABLE FIN WIDTH RATIO
27
Patent #:
10818674
Issue Dt:
10/27/2020
Application #:
16295485
Filing Dt:
03/07/2019
Publication #:
US20200286900
Pub Dt:
09/10/2020
Title:
STRUCTURES AND SRAM BIT CELLS INTEGRATING COMPLEMENTARY FIELD-EFFECT TRANSISTORS
28
Patent #:
11315835
Issue Dt:
04/26/2022
Application #:
16296469
Filing Dt:
03/08/2019
Publication #:
US20200286790
Pub Dt:
09/10/2020
Title:
METHODS OF FORMING AN IC PRODUCT COMPRISING TRANSISTOR DEVICES WITH DIFFERENT THRESHOLD VOLTAGE LEVELS
29
Patent #:
11101364
Issue Dt:
08/24/2021
Application #:
16296769
Filing Dt:
03/08/2019
Publication #:
US20200287019
Pub Dt:
09/10/2020
Title:
FIELD-EFFECT TRANSISTORS WITH DIFFUSION BLOCKING SPACER SECTIONS
30
Patent #:
10804170
Issue Dt:
10/13/2020
Application #:
16298309
Filing Dt:
03/11/2019
Publication #:
US20200294868
Pub Dt:
09/17/2020
Title:
DEVICE/HEALTH OF LINE (HOL) AWARE EBEAM BASED OVERLAY (EBO OVL) STRUCTURE
31
Patent #:
10690845
Issue Dt:
06/23/2020
Application #:
16298354
Filing Dt:
03/11/2019
Title:
THREE DIMENSIONAL OPTICAL INTERCONNECTS
32
Patent #:
11621269
Issue Dt:
04/04/2023
Application #:
16298413
Filing Dt:
03/11/2019
Publication #:
US20200295017
Pub Dt:
09/17/2020
Title:
MULTI-LEVEL FERROELECTRIC MEMORY CELL
33
Patent #:
10649245
Issue Dt:
05/12/2020
Application #:
16298446
Filing Dt:
03/11/2019
Title:
ELECTRO-OPTIC MODULATORS WITH STACKED METAL, DIELECTRIC, AND ACTIVE LAYERS
34
Patent #:
10777558
Issue Dt:
09/15/2020
Application #:
16352420
Filing Dt:
03/13/2019
Publication #:
US20200295004
Pub Dt:
09/17/2020
Title:
CMOS-BASED INTEGRATED CIRCUIT PRODUCTS WITH ISOLATED P-WELLS FOR BODY-BIASING TRANSISTOR DEVICES
35
Patent #:
11482456
Issue Dt:
10/25/2022
Application #:
16360183
Filing Dt:
03/21/2019
Publication #:
US20200303261
Pub Dt:
09/24/2020
Title:
FORMING TWO PORTION SPACER AFTER METAL GATE AND CONTACT FORMATION, AND RELATED IC STRUCTURE
36
Patent #:
10896874
Issue Dt:
01/19/2021
Application #:
16363585
Filing Dt:
03/25/2019
Publication #:
US20200312764
Pub Dt:
10/01/2020
Title:
INTERCONNECTS SEPARATED BY A DIELECTRIC REGION FORMED USING REMOVABLE SACRIFICIAL PLUGS
37
Patent #:
10636698
Issue Dt:
04/28/2020
Application #:
16364465
Filing Dt:
03/26/2019
Publication #:
US20190221473
Pub Dt:
07/18/2019
Title:
SKIP VIA STRUCTURES
38
Patent #:
11651884
Issue Dt:
05/16/2023
Application #:
16365121
Filing Dt:
03/26/2019
Publication #:
US20200312514
Pub Dt:
10/01/2020
Title:
PEAKING INDUCTOR EMBEDDED WITHIN A T-COIL
39
Patent #:
10997498
Issue Dt:
05/04/2021
Application #:
16366187
Filing Dt:
03/27/2019
Publication #:
US20200311533
Pub Dt:
10/01/2020
Title:
APPARATUS AND METHOD FOR IN-MEMORY BINARY CONVOLUTION FOR ACCELERATING DEEP BINARY NEURAL NETWORKS BASED ON A NON-VOLATILE MEMORY STRUCTURE
40
Patent #:
10644374
Issue Dt:
05/05/2020
Application #:
16366447
Filing Dt:
03/27/2019
Title:
MULTI-CHANNEL POWER COMBINER WITH PHASE ADJUSTMENT
41
Patent #:
10784402
Issue Dt:
09/22/2020
Application #:
16366811
Filing Dt:
03/27/2019
Publication #:
US20190221708
Pub Dt:
07/18/2019
Title:
NANOWIRE FORMATION METHODS
42
Patent #:
10680557
Issue Dt:
06/09/2020
Application #:
16367113
Filing Dt:
03/27/2019
Publication #:
US20190267946
Pub Dt:
08/29/2019
Title:
METHOD AND APPARATUS FOR USING BACK GATE BIASING FOR POWER AMPLIFIERS FOR MILLIMETER WAVE DEVICES
43
Patent #:
11450570
Issue Dt:
09/20/2022
Application #:
16367733
Filing Dt:
03/28/2019
Publication #:
US20200312718
Pub Dt:
10/01/2020
Title:
SINGLE DIFFUSION CUT FOR GATE STRUCTURES
44
Patent #:
NONE
Issue Dt:
Application #:
16368836
Filing Dt:
03/28/2019
Publication #:
US20200312775
Pub Dt:
10/01/2020
Title:
SEMICONDUCTOR DEVICE HAVING A BARRIER LAYER MADE OF TWO DIMENSIONAL MATERIALS
45
Patent #:
NONE
Issue Dt:
Application #:
16369050
Filing Dt:
03/29/2019
Publication #:
US20190229059
Pub Dt:
07/25/2019
Title:
METHODS OF PATTERNING DIELECTRIC LAYERS FOR METALLIZATION AND RELATED STRUCTURES
46
Patent #:
10797046
Issue Dt:
10/06/2020
Application #:
16369788
Filing Dt:
03/29/2019
Publication #:
US20200312947
Pub Dt:
10/01/2020
Title:
RESISTOR STRUCTURE FOR INTEGRATED CIRCUIT, AND RELATED METHODS
47
Patent #:
11245032
Issue Dt:
02/08/2022
Application #:
16373620
Filing Dt:
04/02/2019
Publication #:
US20200321466
Pub Dt:
10/08/2020
Title:
ASYMMETRIC FET FOR FDSOI DEVICES
48
Patent #:
11127683
Issue Dt:
09/21/2021
Application #:
16374969
Filing Dt:
04/04/2019
Publication #:
US20190229063
Pub Dt:
07/25/2019
Title:
SEMICONDUCTOR STRUCTURE WITH SUBSTANTIALLY STRAIGHT CONTACT PROFILE
49
Patent #:
10991689
Issue Dt:
04/27/2021
Application #:
16376234
Filing Dt:
04/05/2019
Publication #:
US20200321332
Pub Dt:
10/08/2020
Title:
ADDITIONAL SPACER FOR SELF-ALIGNED CONTACT FOR ONLY HIGH VOLTAGE FINFETS
50
Patent #:
10699949
Issue Dt:
06/30/2020
Application #:
16379066
Filing Dt:
04/09/2019
Publication #:
US20190237365
Pub Dt:
08/01/2019
Title:
MECHANICALLY STABLE COBALT CONTACTS
51
Patent #:
11056591
Issue Dt:
07/06/2021
Application #:
16382184
Filing Dt:
04/11/2019
Publication #:
US20200328306
Pub Dt:
10/15/2020
Title:
EPITAXIAL STRUCTURES OF SEMICONDUCTOR DEVICES THAT ARE INDEPENDENT OF LOCAL PATTERN DENSITY
52
Patent #:
10896953
Issue Dt:
01/19/2021
Application #:
16382718
Filing Dt:
04/12/2019
Publication #:
US20200328272
Pub Dt:
10/15/2020
Title:
DIODE STRUCTURES
53
Patent #:
10784342
Issue Dt:
09/22/2020
Application #:
16385197
Filing Dt:
04/16/2019
Title:
SINGLE DIFFUSION BREAKS FORMED WITH LINER PROTECTION FOR SOURCE AND DRAIN REGIONS
54
Patent #:
10833171
Issue Dt:
11/10/2020
Application #:
16385436
Filing Dt:
04/16/2019
Publication #:
US20200335600
Pub Dt:
10/22/2020
Title:
SPACER STRUCTURES ON TRANSISTOR DEVICES
55
Patent #:
10833160
Issue Dt:
11/10/2020
Application #:
16386363
Filing Dt:
04/17/2019
Publication #:
US20200335591
Pub Dt:
10/22/2020
Title:
FIELD-EFFECT TRANSISTORS WITH SELF-ALIGNED AND NON-SELF-ALIGNED CONTACT OPENINGS
56
Patent #:
10825910
Issue Dt:
11/03/2020
Application #:
16386545
Filing Dt:
04/17/2019
Publication #:
US20200335594
Pub Dt:
10/22/2020
Title:
SHAPED GATE CAPS IN DIELECTRIC-LINED OPENINGS
57
Patent #:
11171237
Issue Dt:
11/09/2021
Application #:
16386902
Filing Dt:
04/17/2019
Publication #:
US20200335619
Pub Dt:
10/22/2020
Title:
MIDDLE OF LINE GATE STRUCTURES
58
Patent #:
10916642
Issue Dt:
02/09/2021
Application #:
16388500
Filing Dt:
04/18/2019
Publication #:
US20200335612
Pub Dt:
10/22/2020
Title:
HETEROJUNCTION BIPOLAR TRANSISTOR WITH EMITTER BASE JUNCTION OXIDE INTERFACE
59
Patent #:
10672465
Issue Dt:
06/02/2020
Application #:
16388607
Filing Dt:
04/18/2019
Title:
NEUROMORPHIC MEMORY DEVICE
60
Patent #:
10777607
Issue Dt:
09/15/2020
Application #:
16389331
Filing Dt:
04/19/2019
Title:
BITCELLS FOR A NON-VOLATILE MEMORY DEVICE
61
Patent #:
10497798
Issue Dt:
12/03/2019
Application #:
16390232
Filing Dt:
04/22/2019
Publication #:
US20190252267
Pub Dt:
08/15/2019
Title:
VERTICAL FIELD EFFECT TRANSISTOR WITH SELF-ALIGNED CONTACTS
62
Patent #:
10833169
Issue Dt:
11/10/2020
Application #:
16390473
Filing Dt:
04/22/2019
Publication #:
US20200335602
Pub Dt:
10/22/2020
Title:
METAL GATE FOR A FIELD EFFECT TRANSISTOR AND METHOD
63
Patent #:
10439053
Issue Dt:
10/08/2019
Application #:
16394421
Filing Dt:
04/25/2019
Publication #:
US20190252530
Pub Dt:
08/15/2019
Title:
CASCODE HETEROJUNCTION BIPOLAR TRANSISTORS
64
Patent #:
10896853
Issue Dt:
01/19/2021
Application #:
16396775
Filing Dt:
04/29/2019
Publication #:
US20200343142
Pub Dt:
10/29/2020
Title:
MASK-FREE METHODS OF FORMING STRUCTURES IN A SEMICONDUCTOR DEVICE
65
Patent #:
10923482
Issue Dt:
02/16/2021
Application #:
16396916
Filing Dt:
04/29/2019
Publication #:
US20200343248
Pub Dt:
10/29/2020
Title:
IC PRODUCT WITH A NOVEL BIT CELL DESIGN AND A MEMORY ARRAY COMPRISING SUCH BIT CELLS
66
Patent #:
10719657
Issue Dt:
07/21/2020
Application #:
16398312
Filing Dt:
04/30/2019
Title:
PROCESS DESIGN KIT (PDK) WITH DESIGN SCAN SCRIPT
67
Patent #:
11037821
Issue Dt:
06/15/2021
Application #:
16400481
Filing Dt:
05/01/2019
Publication #:
US20200350202
Pub Dt:
11/05/2020
Title:
MULTIPLE PATTERNING WITH SELF-ALIGNMENT PROVIDED BY SPACERS
68
Patent #:
10833072
Issue Dt:
11/10/2020
Application #:
16404161
Filing Dt:
05/06/2019
Publication #:
US20200357796
Pub Dt:
11/12/2020
Title:
HETEROJUNCTION BIPOLAR TRANSISTORS HAVING BASES WITH DIFFERENT ELEVATIONS
69
Patent #:
11450753
Issue Dt:
09/20/2022
Application #:
16404881
Filing Dt:
05/07/2019
Publication #:
US20200357897
Pub Dt:
11/12/2020
Title:
EDGE CELL SIGNAL LINE ANTENNA DIODES
70
Patent #:
11355409
Issue Dt:
06/07/2022
Application #:
16405325
Filing Dt:
05/07/2019
Publication #:
US20190267304
Pub Dt:
08/29/2019
Title:
CHIP PACKAGE WITH EMITTER FINGER CELLS SPACED BY DIFFERENT SPACINGS FROM A HEAT SINK TO PROVIDE REDUCED TEMPERATURE VARIATION
71
Patent #:
10818763
Issue Dt:
10/27/2020
Application #:
16405368
Filing Dt:
05/07/2019
Publication #:
US20200357889
Pub Dt:
11/12/2020
Title:
FIELD-EFFECT TRANSISTORS WITH LATERALLY-SERPENTINE GATES
72
Patent #:
11081561
Issue Dt:
08/03/2021
Application #:
16405469
Filing Dt:
05/07/2019
Publication #:
US20200357892
Pub Dt:
11/12/2020
Title:
FIELD-EFFECT TRANSISTORS WITH VERTICALLY-SERPENTINE GATES
73
Patent #:
NONE
Issue Dt:
Application #:
16406071
Filing Dt:
05/08/2019
Publication #:
US20200357911
Pub Dt:
11/12/2020
Title:
GATE-ALL-AROUND FIELD EFFECT TRANSISTORS HAVING END PORTIONS OF NANOSHEET CHANNEL LAYERS ADJACENT TO SOURCE/DRAIN REGIONS BEING WIDER THAN THE CENTER PORTIONS
74
Patent #:
10818498
Issue Dt:
10/27/2020
Application #:
16407744
Filing Dt:
05/09/2019
Publication #:
US20200357647
Pub Dt:
11/12/2020
Title:
SHAPED GATE CAPS IN SPACER-LINED OPENINGS
75
Patent #:
11107880
Issue Dt:
08/31/2021
Application #:
16408536
Filing Dt:
05/10/2019
Publication #:
US20200357880
Pub Dt:
11/12/2020
Title:
CAPACITOR STRUCTURE FOR INTEGRATED CIRCUIT, AND RELATED METHODS
76
Patent #:
10658294
Issue Dt:
05/19/2020
Application #:
16411237
Filing Dt:
05/14/2019
Publication #:
US20190333853
Pub Dt:
10/31/2019
Title:
STRUCTURE AND METHOD FOR FLEXIBLE POWER STAPLE INSERTION
77
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10741439
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08/11/2020
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16411775
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05/14/2019
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US20190267281
Pub Dt:
08/29/2019
Title:
MERGE MANDREL FEATURES
78
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11043588
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06/22/2021
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16413168
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05/15/2019
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Pub Dt:
11/19/2020
Title:
VERTICAL FIELD EFFECT TRANSISTOR
79
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10818570
Issue Dt:
10/27/2020
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16413613
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05/16/2019
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Pub Dt:
11/19/2020
Title:
STACKED SEMICONDUCTOR DEVICES HAVING DISSIMILAR-SIZED DIES
80
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10658388
Issue Dt:
05/19/2020
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16414203
Filing Dt:
05/16/2019
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US20190280010
Pub Dt:
09/12/2019
Title:
METHODS OF FORMING STACKED SOI SEMICONDUCTOR DEVICES WITH BACK BIAS MECHANISM
81
Patent #:
NONE
Issue Dt:
Application #:
16415519
Filing Dt:
05/17/2019
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US20190273148
Pub Dt:
09/05/2019
Title:
FIELD-EFFECT TRANSISTORS WITH FINS FORMED BY A DAMASCENE-LIKE PROCESS
82
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11031406
Issue Dt:
06/08/2021
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16416477
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05/20/2019
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US20190312042
Pub Dt:
10/10/2019
Title:
SEMICONDUCTOR DEVICES HAVING SILICON/GERMANIUM ACTIVE REGIONS WITH DIFFERENT GERMANIUM CONCENTRATIONS
83
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10795430
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10/06/2020
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05/24/2019
Title:
ACTIVITY-AWARE SUPPLY VOLTAGE AND BIAS VOLTAGE COMPENSATION
84
Patent #:
NONE
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16423035
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05/26/2019
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11/26/2020
Title:
CONTACT STRUCTURES OVER AN ACTIVE REGION OF A SEMICONDUCTOR DEVICE
85
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10600474
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03/24/2020
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16424605
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Pub Dt:
09/12/2019
Title:
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86
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11056535
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07/06/2021
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16425360
Filing Dt:
05/29/2019
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Pub Dt:
12/03/2020
Title:
NON-VOLATILE MEMORY ELEMENT ARRAYS IN A WHEATSTONE BRIDGE ARRANGEMENT
87
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10796973
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10/06/2020
Application #:
16425387
Filing Dt:
05/29/2019
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US20200152531
Pub Dt:
05/14/2020
Title:
TEST STRUCTURES CONNECTED WITH THE LOWEST METALLIZATION LEVELS IN AN INTERCONNECT STRUCTURE
88
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10795083
Issue Dt:
10/06/2020
Application #:
16426551
Filing Dt:
05/30/2019
Title:
HETEROGENEOUS DIRECTIONAL COUPLERS FOR PHOTONICS CHIPS
89
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11266940
Issue Dt:
03/08/2022
Application #:
16427500
Filing Dt:
05/31/2019
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US20200376423
Pub Dt:
12/03/2020
Title:
VACUUM SYSTEM FOR REMOVING CAUSTIC PARTICULATE MATTER FROM VARIOUS ENVIRONMENTS
90
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10483917
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11/19/2019
Application #:
16428842
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05/31/2019
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US20190288646
Pub Dt:
09/19/2019
Title:
POWER AMPLIFIER FOR MILLIMETER WAVE DEVICES
91
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10530373
Issue Dt:
01/07/2020
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16428975
Filing Dt:
06/01/2019
Title:
METHOD AND SYSTEM FOR GENERATING A SAW-TOOTH SIGNAL WITH FAST FLY BACK INTERVAL
92
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10831977
Issue Dt:
11/10/2020
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16429536
Filing Dt:
06/03/2019
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US20200380089
Pub Dt:
12/03/2020
Title:
CURVILINEAR MASK MODELS
93
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10734999
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08/04/2020
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16429547
Filing Dt:
06/03/2019
Title:
MEASUREMENT CIRCUITS FOR LOGIC PATHS
94
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10949005
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03/16/2021
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16429702
Filing Dt:
06/03/2019
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US20200379585
Pub Dt:
12/03/2020
Title:
ABSOLUTE PHASE MEASUREMENT TESTING DEVICE AND TECHNIQUE
95
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11133397
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09/28/2021
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16430843
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06/04/2019
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US20200388696
Pub Dt:
12/10/2020
Title:
METHOD FOR FORMING LATERAL HETEROJUNCTION BIPOLAR DEVICES AND THE RESULTING DEVICES
96
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11004748
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05/11/2021
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16432899
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06/05/2019
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US20200388540
Pub Dt:
12/10/2020
Title:
SEMICONDUCTOR DEVICES WITH WIDE GATE-TO-GATE SPACING
97
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10756213
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08/25/2020
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16433626
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06/06/2019
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US20190326436
Pub Dt:
10/24/2019
Title:
FINFET WITH MULTILAYER FINS FOR MULTI-VALUE LOGIC (MVL) APPLICATIONS
98
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11094827
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08/17/2021
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16434136
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06/06/2019
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12/10/2020
Title:
SEMICONDUCTOR DEVICES WITH UNIFORM GATE HEIGHT AND METHOD OF FORMING SAME
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11164954
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11/02/2021
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16435563
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06/10/2019
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US20200388693
Pub Dt:
12/10/2020
Title:
GATE CAPPING LAYERS OF SEMICONDUCTOR DEVICES
100
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11114338
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09/07/2021
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16436117
Filing Dt:
06/10/2019
Publication #:
US20190311948
Pub Dt:
10/10/2019
Title:
FULLY ALIGNED VIA IN GROUND RULE REGION
Assignor
1
GLOBALFOUNDRIES INC.
Exec Dt:
10/22/2020
Assignee
1
GLOBALFOUNDRIES U.S. INC.
2600 GREAT AMERICA WAY
SANTA CLARA, CALIFORNIA 95054
Correspondence name and address
GLOBALFOUNDRIES SINGAPORE PTE. LTD.
60 WOODLANDS INDUSTRIAL PARK D STREET 2,
SINGAPORE, 738406 SINGAPORE

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