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Patent #:
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|
Issue Dt:
|
06/20/2000
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Application #:
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08818325
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Filing Dt:
|
03/14/1997
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Title:
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ETCHING PROCESS USING A BUFFER LAYER
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Patent #:
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Issue Dt:
|
02/15/2000
|
Application #:
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08818456
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Filing Dt:
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03/17/1997
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Title:
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DIRECT CONNECT INTERCONNECT FOR TESTING SEMICONDUCTOR DICE AND WAFERS
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Patent #:
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Issue Dt:
|
07/28/1998
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Application #:
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08818597
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Filing Dt:
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03/14/1997
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Title:
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METHOD OF MAKING A CAPACITOR
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Patent #:
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Issue Dt:
|
02/09/1999
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Application #:
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08818629
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Filing Dt:
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03/14/1997
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Title:
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SEMICONDUCTOR PROCESSING METHODS OF FORMING A CONTACT OPENING TO A SEMICONDUCTOR SUBSTRATE
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Patent #:
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Issue Dt:
|
06/27/2000
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Application #:
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08818636
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Filing Dt:
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03/14/1997
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Title:
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COMBINATION OF SEMICONDUCTOR INTERCONNECT
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Patent #:
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Issue Dt:
|
08/31/1999
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Application #:
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08818637
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Filing Dt:
|
03/14/1997
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Title:
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METHOD OF FORMING A LOCAL INTERCONNECT BETWEEN ELECTRONIC DEVICES ON A SEMICONTDUCTOR SUBSTRATE
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Patent #:
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Issue Dt:
|
12/12/2000
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Application #:
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08819172
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Filing Dt:
|
03/17/1997
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Title:
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GRADED LDD IMPLANT PROCESS FOR SUB-HALF-MICRON MOS DEVICES
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Patent #:
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Issue Dt:
|
09/28/1999
|
Application #:
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08819519
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Filing Dt:
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03/17/1997
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Title:
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CIRCUIT FOR DETECTING THE COINCIDENCE BETWEEN A BINARY INFORMATION UNIT STORED THEREIN AND AN EXTERNAL DATUM
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Patent #:
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Issue Dt:
|
10/05/1999
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Application #:
|
08819618
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Filing Dt:
|
03/17/1997
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Title:
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METHOD FOR FORMING FIELD OXIDE OR OTHER INSULATORS DURING THE FORMATION OF A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
|
07/28/1998
|
Application #:
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08819991
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Filing Dt:
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03/18/1997
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Title:
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METHOD AND APPARATUS FOR READING OUT A PROGRAMMABLE RESISTOR MEMORY
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Patent #:
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Issue Dt:
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02/09/1999
|
Application #:
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08820267
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Filing Dt:
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03/17/1997
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Title:
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METHOD OF FORMING A CAPACITOR
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Patent #:
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|
Issue Dt:
|
08/14/2007
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Application #:
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08820374
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Filing Dt:
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03/12/1997
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Title:
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THREE-LAYER LOWER CAPACITOR ELECTRODE
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Patent #:
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Issue Dt:
|
08/03/1999
|
Application #:
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08820815
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Filing Dt:
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03/19/1997
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Title:
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DISPLAY DEVICE WITH GRILLE HAVING GETTER MATERIAL
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Patent #:
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Issue Dt:
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04/07/1998
|
Application #:
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08821244
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Filing Dt:
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03/20/1997
|
Title:
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METHODS OF FORMING NON-VOLATILE MEMORY ARRAYS
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Patent #:
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Issue Dt:
|
02/15/2000
|
Application #:
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08821468
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Filing Dt:
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03/21/1997
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Title:
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HYBRID INTERCONNECT AND SYSTEM FOR TESTING SEMICONDUCTOR DICE
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Patent #:
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Issue Dt:
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08/28/2001
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Application #:
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08821611
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Filing Dt:
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03/20/1997
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Title:
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SPREAD SPECTRUM CODES FOR USE IN COMMUNICATION
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Patent #:
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Issue Dt:
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12/29/1998
|
Application #:
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08821804
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Filing Dt:
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03/21/1997
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Title:
|
SECTORIZED ELECTRICALLY ERASABLE AND PROGRAMMABLE NON-VOLATILE MEMORY DEVICE WITH REDUNDANCY
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Patent #:
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Issue Dt:
|
04/25/2000
|
Application #:
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08821805
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Filing Dt:
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03/21/1997
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Title:
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APPARATUS AND METHOD FOR MAINTAINING SYNCHRONISM BETWEEN A PICTURE SIGNAL AND A MATRIX SCANNED ARRAY
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Patent #:
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Issue Dt:
|
08/15/2000
|
Application #:
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08822074
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Filing Dt:
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03/20/1997
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Title:
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METHODS FOR TESTING SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
|
01/05/1999
|
Application #:
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08822731
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Filing Dt:
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03/24/1997
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Title:
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METHOD FOR CONTINUOUS, NON LOT-BASED INTEGRATED CIRCUIT MANUFACTURING
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Patent #:
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Issue Dt:
|
09/29/1998
|
Application #:
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08822743
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Filing Dt:
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03/25/1997
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Title:
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PACKAGING MULTIPLE DIES ON A BALL GRID ARRAY SUBSTRATE
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Patent #:
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Issue Dt:
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05/26/1998
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Application #:
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08822991
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Filing Dt:
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03/21/1997
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Title:
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METHOD OF JOINTLY FORMING STACKED CAPACITORS AND ANTIFUSES
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Patent #:
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Issue Dt:
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07/04/2000
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Application #:
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08823020
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Filing Dt:
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03/21/1997
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Title:
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METHOD OF REDUCING CARBON INCORPORATION INTO FILMS PRODUCED BY CHEMICAL VAPOR DEPOSITION INVOLVING ORGANIC PRECURSOR COMPOUNDS
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Patent #:
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Issue Dt:
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03/23/1999
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Application #:
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08823214
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Filing Dt:
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03/24/1997
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Title:
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METHOD AND APPARATUS FOR APPLICATION OF DE-WETTING MATERIAL FOR GLOB TOP APPLICATIONS
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Patent #:
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Issue Dt:
|
10/26/1999
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Application #:
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08823234
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Filing Dt:
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03/20/1997
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Title:
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COMMUNICATION CONTROL FOR A USER OF A CENTRAL COMMUNICATION CENTER
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Patent #:
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Issue Dt:
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01/18/2000
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Application #:
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08823490
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Filing Dt:
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03/25/1997
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Title:
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METHOD, APPARATUS AND SYSTEM FOR TESTING BUMPED SEMICONDUCTOR COMPONENTS
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Patent #:
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Issue Dt:
|
08/01/2000
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Application #:
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08823609
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Filing Dt:
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03/25/1997
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Title:
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SELF-ALIGNED ISOLATION TRENCH
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Patent #:
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Issue Dt:
|
08/22/2000
|
Application #:
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08823799
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Filing Dt:
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03/24/1997
|
Title:
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TEMPERTURE CONTROLLED SPIN CHUCK
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Patent #:
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Issue Dt:
|
09/21/1999
|
Application #:
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08823815
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Filing Dt:
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03/24/1997
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Title:
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SOFT IMPACT DISPENSE NOZZLE
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Patent #:
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Issue Dt:
|
02/17/2004
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Application #:
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08824110
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Filing Dt:
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03/25/1997
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Title:
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ELECTRONIC TOY USING PRERECORDED MESSAGES
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Patent #:
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Issue Dt:
|
12/08/1998
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Application #:
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08824616
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Filing Dt:
|
03/27/1997
|
Title:
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ROW DECODING CIRCUIT FOR SEMICONDUCTOR NON-VOLATILE ELECTRICALLY PROGRAMMABLE MEMORY AND CORRESPONDING METHOD
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Patent #:
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Issue Dt:
|
11/02/1999
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Application #:
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08824888
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Filing Dt:
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03/18/1997
|
Title:
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HIGH-VOLTAGE-RESISTANT MOS TRANSISTOR, AND CORRESPONDING MANUFACTURING PROCESS
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Patent #:
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Issue Dt:
|
09/08/1998
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Application #:
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08824958
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Filing Dt:
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03/27/1997
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Title:
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VOLTAGE BOOSTER FOR MEMORY DEVICES
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Patent #:
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Issue Dt:
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03/09/1999
|
Application #:
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08825098
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Filing Dt:
|
03/27/1997
|
Title:
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DATA SENSING TIMING MODULATING CIRCUIT, PARTICULARLY FOR NON-VOLATILE MEMORIES
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|
Patent #:
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Issue Dt:
|
03/23/1999
|
Application #:
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08825138
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Filing Dt:
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03/28/1997
|
Title:
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CIRCUIT AND METHOD TO ADJUST MEMORY TIMING
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|
Patent #:
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Issue Dt:
|
11/03/1998
|
Application #:
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08825327
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Filing Dt:
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03/28/1997
|
Title:
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CIRCUIT AND METHOD FOR REGULATING A VOLTAGE
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Patent #:
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Issue Dt:
|
02/02/1999
|
Application #:
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08825644
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Filing Dt:
|
04/03/1997
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Title:
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SEMICONDUCTOR PROCESSING METHOD OF FORMING A CONTACT OPENING TO A REGION ADJACENT A FIELD ISOLATION MASS
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Patent #:
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Issue Dt:
|
09/29/1998
|
Application #:
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08825871
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Filing Dt:
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04/02/1997
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Title:
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MODULAR MEMORY CIRCUIT AND METHOD FOR FORMING SAME
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Patent #:
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Issue Dt:
|
03/30/1999
|
Application #:
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08826008
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Filing Dt:
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03/27/1997
|
Title:
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STANDBY VOLTAGE BOOSTING STAGE AND METHOD FOR A MEMORY DEVICE
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Patent #:
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Issue Dt:
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01/12/1999
|
Application #:
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08826009
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Filing Dt:
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03/27/1997
|
Title:
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PULSE GENERATION CIRCUIT AND METHOD FOR SYNCHRONIZED DATA LOADING IN AN OUTPUT PRE-BUFFER
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Patent #:
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Issue Dt:
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05/12/1998
|
Application #:
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08826223
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Filing Dt:
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03/27/1997
|
Title:
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DRIVER DEVICE FOR SELECTION LINES FOR A MULTIPLEXER, TO BE USED IN A WIDE RANGE OF SUPPLY VOLTAGES, PARTICULARLY FOR NON-VOLATILE MEMORIES
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Patent #:
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Issue Dt:
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08/31/1999
|
Application #:
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08826489
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Filing Dt:
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03/27/1997
|
Title:
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NONVOLATILE MEMORY DEVICE CAPABLE OF READING DATA WITH AN APPROPRIATE SELF-TIMING AND A REDUCED NUMBER OF REFERENCE LINES
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Patent #:
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Issue Dt:
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10/31/2000
|
Application #:
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08826548
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Filing Dt:
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04/03/1997
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Title:
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METHOD AND SYSTEM FOR AVOIDING LIVELOCK CONDITIONS ON A COMPUTER BUS BY INSURING THAT THE FIRST RETIRED BUS MASTER IS THE FIRST TO RESUBMIT ITS RETIRED TRANSACTION
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Patent #:
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Issue Dt:
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12/07/1999
|
Application #:
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08827022
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Filing Dt:
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03/25/1997
|
Title:
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MATRIX DISPLAY WITH PERIPHERAL DRIVE SIGNAL SOURCES
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Patent #:
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Issue Dt:
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01/11/2000
|
Application #:
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08827042
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Filing Dt:
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03/25/1997
|
Title:
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METHOD AND APPARATUS FOR SELECTIVELY DISPLAYING A PARAMETER IN A SEPARATE PANEL
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Patent #:
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|
Issue Dt:
|
01/26/1999
|
Application #:
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08827409
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Filing Dt:
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03/27/1997
|
Title:
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SYSTEM FOR DETERMINING THE PROGRAMMED/NON PROGRAMMED STATUS OF A MEMORY CELL
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Patent #:
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Issue Dt:
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08/07/2001
|
Application #:
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08827886
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Filing Dt:
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04/07/1997
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Title:
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INTERDIGITATED LEADS-OVER-CHIP LEAD FRAME, DEVICE, AND METHOD FOR SUPPORTING AN INTEGRATED CIRCUIT DIE
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Patent #:
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Issue Dt:
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11/17/1998
|
Application #:
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08828039
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Filing Dt:
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03/27/1997
|
Title:
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METHOD AND APPARATUS FOR REDUNDANCY MANAGEMENT OF NON-VOLATILE MEMORIES
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Patent #:
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Issue Dt:
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07/27/1999
|
Application #:
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08828255
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Filing Dt:
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03/26/1997
|
Title:
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PROJECTED CONTACT STRUCTURE FOR BUMPED SEMICONDUCTOR DEVICE AND RESULTING ARTICLES AND ASSEMBLIES
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Patent #:
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|
Issue Dt:
|
12/01/1998
|
Application #:
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08828364
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Filing Dt:
|
03/28/1997
|
Title:
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METHOD AND APPARATUS FOR PROGRAMMING ANTI-FUSES
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Patent #:
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Issue Dt:
|
05/04/1999
|
Application #:
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08828790
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Filing Dt:
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03/27/1997
|
Title:
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GAIN MODULATED SENSE AMPLIFIER
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|
Patent #:
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Issue Dt:
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09/28/1999
|
Application #:
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08828791
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Filing Dt:
|
03/27/1997
|
Title:
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CIRCUIT AND METHOD FOR GENERATING A POWER-ON RESET SIGNAL
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Patent #:
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Issue Dt:
|
10/10/2000
|
Application #:
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08828877
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Filing Dt:
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03/31/1997
|
Title:
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BONDING AND INSPECTION SYSTEM
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Patent #:
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Issue Dt:
|
10/05/1999
|
Application #:
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08829193
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Filing Dt:
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03/31/1997
|
Title:
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INLTERCONNECT HAVING RECESSED CONTACT MEMBERS WITH PENETRATING BLADES FOR TESTING SEMICONDUCTOR DICE AND PACKAGES WITH CONTACT BUMPS
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Patent #:
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Issue Dt:
|
06/02/1998
|
Application #:
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08829403
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Filing Dt:
|
03/31/1997
|
Title:
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METHOD FOR MAKING MULTI-PHASE, PHASE SHIFTING MASKS
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Patent #:
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Issue Dt:
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07/20/1999
|
Application #:
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08829594
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Filing Dt:
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03/31/1997
|
Title:
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PERIPHERAL DEVICE PREVENTING POST-SCAN MODIFICATION
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Patent #:
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Issue Dt:
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02/20/2001
|
Application #:
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08829608
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Filing Dt:
|
03/31/1997
|
Title:
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EMPLOYING A LOOK-UP SERVICE AND A CALLEE CONNECTION SERVICE TO ESTABLISH A NETWORK PHONE CALL BETWEEN A CALLER AND A CALLEE
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Patent #:
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Issue Dt:
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12/14/1999
|
Application #:
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08829856
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Filing Dt:
|
04/01/1997
|
Title:
|
METHOD FOR PERFORMING COMMON SUBEXPRESSION ELIMINATION ON A RACK-N STATIC SINGLE ASSIGNMENT LANGUAGE
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Patent #:
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Issue Dt:
|
12/22/1998
|
Application #:
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08831066
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Filing Dt:
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04/01/1997
|
Title:
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ATOM LITHOGRAPHIC MASK HAVING DIFFRACTION GRATING AND ATTENUATED PHASE SHIFTERS
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|
Patent #:
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|
Issue Dt:
|
05/25/1999
|
Application #:
|
08831266
|
Filing Dt:
|
03/31/1997
|
Title:
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MOVING SECTORS WITHIN A BLOCK OF INFORMATION IN A FLASH MEMORY MASS STORAGE ARCHITECTURE
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|
Patent #:
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|
Issue Dt:
|
07/20/1999
|
Application #:
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08831529
|
Filing Dt:
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04/01/1997
|
Title:
|
SEMICONDUCTOR WAFER WAFER ALIGNMENT PATTERNS
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|
|
Patent #:
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|
Issue Dt:
|
06/16/1998
|
Application #:
|
08831578
|
Filing Dt:
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04/09/1997
|
Title:
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METHOD AND APPARATUS FOR CONNECTING A TELEPHONE TO A VOICE CAPABLE MODEM
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|
Patent #:
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|
Issue Dt:
|
10/05/1999
|
Application #:
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08831611
|
Filing Dt:
|
04/10/1997
|
Title:
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METHOD FOR CLEANING SEMICONDUCTOR WAFERS
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|
|
Patent #:
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|
Issue Dt:
|
01/18/2000
|
Application #:
|
08831739
|
Filing Dt:
|
04/01/1997
|
Title:
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METHOD FOR USING STATIC SINGLE ASSIGNMENT TO COLOR OUT ARTIFICIAL REGISTER DEPENDENCIES
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|
Patent #:
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|
Issue Dt:
|
11/10/1998
|
Application #:
|
08832039
|
Filing Dt:
|
04/03/1997
|
Title:
|
CIRCUIT AND METHOD FOR GENERATING A CONTROL SIGNAL FOR A MEMORY DEVICE
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|
Patent #:
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|
Issue Dt:
|
09/15/1998
|
Application #:
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08832387
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Filing Dt:
|
04/02/1997
|
Title:
|
CONTACT OPENINGS AND AN ELECTRONIC COMPONENT FORMED FROM THE SAME
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|
Patent #:
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|
Issue Dt:
|
09/22/1998
|
Application #:
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08832437
|
Filing Dt:
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04/03/1997
|
Title:
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INTEGRATED CIRCUIT CLOCK INPUT BUFFER
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|
Patent #:
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|
Issue Dt:
|
07/18/2000
|
Application #:
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08832979
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Filing Dt:
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04/04/1997
|
Title:
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POLISHING PAD, METHODS OF MANUFACTURING AND USE
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Patent #:
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|
Issue Dt:
|
01/16/2001
|
Application #:
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08833336
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Filing Dt:
|
04/04/1997
|
Title:
|
VOLTAGE REGULATOR FOR PROGRAMMING ELECTRICALLY PROGRAMMABLE NON-VOLATILE MEMORY CELLS IN A CELL MATRIX
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Patent #:
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|
Issue Dt:
|
06/23/1998
|
Application #:
|
08833863
|
Filing Dt:
|
04/10/1997
|
Title:
|
METHOD OF LEADS BETWEEN CHIPS ASSEMBLY
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|
|
Patent #:
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|
Issue Dt:
|
12/15/1998
|
Application #:
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08833925
|
Filing Dt:
|
04/10/1997
|
Title:
|
FLASH-EPROM WITH EMBEDDED EEPROM
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|
|
Patent #:
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|
Issue Dt:
|
08/03/1999
|
Application #:
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08834026
|
Filing Dt:
|
04/11/1997
|
Title:
|
SELF-CONFIGURING INTERFACE ARCHITECTURE ON FLASH MEMORIES
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|
|
Patent #:
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|
Issue Dt:
|
09/30/2003
|
Application #:
|
08834029
|
Filing Dt:
|
04/11/1997
|
Title:
|
SELF-CONTAINING INPUT BUFFER ON FLASH MEMORIES
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|
|
Patent #:
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|
Issue Dt:
|
05/11/1999
|
Application #:
|
08834032
|
Filing Dt:
|
04/11/1997
|
Title:
|
SELF-CONFIGURING OUTPUT BUFFER ON FLASH MEMORIES
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|
|
Patent #:
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Issue Dt:
|
05/16/2000
|
Application #:
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08834524
|
Filing Dt:
|
04/04/1997
|
Title:
|
VARIABLE ABRASIVE POLISHING PAD FOR MECHANICAL AND CHEMICAL-MECHANICAL PLANARIZATION
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Patent #:
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Issue Dt:
|
11/14/2000
|
Application #:
|
08835030
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Filing Dt:
|
03/28/1997
|
Title:
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A MEMORY UNDER TEST PROGRAMMING AND READING DEVICE
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|
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Patent #:
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|
Issue Dt:
|
09/01/1998
|
Application #:
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08835031
|
Filing Dt:
|
03/27/1997
|
Title:
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CIRCUIT FOR THE GENERATION OF A VOLTAGE AS A FUNCTION OF THE CONDUCTIVITY OF AN ELEMENTARY CELL OF A NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
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05/19/1998
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Application #:
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08835033
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Filing Dt:
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03/27/1997
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Title:
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REFERENCE WORD LINE AND DATA PROPAGATION REPRODUCTION CIRCUIT FOR MEMORIES PROVIDED WITH HIERARCHICAL DECODERS
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Patent #:
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Issue Dt:
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04/06/1999
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Application #:
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08835155
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Filing Dt:
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04/04/1997
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Title:
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FIELD EMISSION DISPLAY WITH SELF-ALIGNED GRID
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Patent #:
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Issue Dt:
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05/19/1998
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Application #:
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08835294
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Filing Dt:
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04/07/1997
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Title:
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CIRCUIT FOR THE SWITCHING OF SUPPLY VOLTAGES IN ELECTRICALLY PROGRAMMABLE AND CANCELABLE NON-VOLATILE SEMICONDUCTOR MEMORY DEVICES
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Patent #:
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Issue Dt:
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09/12/2000
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Application #:
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08835295
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Filing Dt:
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04/07/1997
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Title:
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BLACK MATRIX MATERIAL AND METHODS RELATED THERETO
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Patent #:
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Issue Dt:
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01/26/1999
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Application #:
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08835296
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Filing Dt:
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04/07/1997
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Title:
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AUTO-SAVING CIRCUIT FOR PROGRAMMING CONFIGURATION ELEMENTS IN NON-VOLATILE MEMORY DEVICES
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Patent #:
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Issue Dt:
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05/09/2000
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Application #:
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08835347
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Filing Dt:
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04/07/1997
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Title:
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PRE-CHARGE STEP DETERMINING CIRCUIT OF A GENERIC BIT LINE PARTICULARLY FOR NON-VOLATILE MEMORIES
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Patent #:
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Issue Dt:
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02/02/1999
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Application #:
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08835763
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Filing Dt:
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04/08/1997
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Title:
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SWITCH FOR MINIMIZING TRANSISTOR EXPOSURE TO HIGH VOLTAGE
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Patent #:
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Issue Dt:
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02/29/2000
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Application #:
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08837820
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Filing Dt:
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04/22/1997
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Title:
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APPARATUS AND METHOD IMPLEMENTING REPAIRS ON A MEMORY DEVICE
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Patent #:
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Issue Dt:
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06/20/2000
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Application #:
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08839033
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Filing Dt:
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04/23/1997
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Title:
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MEMORY SYSTEM HAVING FLEXIBLE ADDRESSING AND METHOD USING TAG AND DATA BUS COMMUNICATION
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Patent #:
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Issue Dt:
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06/06/2000
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Application #:
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08839034
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Filing Dt:
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04/23/1997
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Title:
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MEMORY SYSTEM HAVING FLEXIBLE ARCHITECTURE AND METHOD
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Patent #:
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Issue Dt:
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01/18/2000
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Application #:
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08840022
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Filing Dt:
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04/24/1997
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Title:
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VOIDLESS METALLIZATION ON TITANIUM ALUMINIDE IN AN INTERCONNECT
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Patent #:
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Issue Dt:
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03/02/1999
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Application #:
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08840056
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Filing Dt:
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04/24/1997
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Title:
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CIRCUITS AND METHODS FOR READ-ENABLING MEMORY DEVICES SYNCHRONOUSLY WITHTHE REACHING OF THE MINIMUM FUNCTIONALITY CONDITIONS OF THE MEMORY CELLS AND READING CIRCUITS, PARTICULARLY FOR NON-VOLATILE MEMORIES
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Patent #:
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Issue Dt:
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06/02/1998
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Application #:
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08840084
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Filing Dt:
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04/09/1997
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Title:
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PROCESS FOR PREPARING A PRASEODYMIUM-MANGANESE OXIDE MATERIAL FOR USE IN FIELD EMISSION DISPLAYS
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Patent #:
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Issue Dt:
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01/25/2000
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Application #:
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08840403
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Filing Dt:
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04/29/1997
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Title:
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METHOD OF ATTACHING A LEADFRAME TO SINGULATED SEMICONDUCTOR DICE
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Patent #:
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Issue Dt:
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05/08/2001
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Application #:
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08840503
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Filing Dt:
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04/21/1997
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Title:
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CIRCUIT AND METHOD FOR MEASURING AND FORCING AN INTERNAL VOLTAGE OF AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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01/05/1999
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Application #:
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08840599
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Filing Dt:
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04/22/1997
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Title:
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LOW VOLTAGE DYNAMIC MEMORY
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Patent #:
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Issue Dt:
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05/11/1999
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Application #:
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08841524
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Filing Dt:
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04/23/1997
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Title:
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CONDUCTIVE BUMPS ON DIE FOR FLIP CHIP APPLICATION
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Patent #:
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Issue Dt:
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11/21/2000
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Application #:
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08841886
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Filing Dt:
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05/05/1997
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Title:
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SUPERCRITICAL ETCHING COMPOSITIONS AND METHOD OF USING SAME
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Patent #:
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Issue Dt:
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09/22/1998
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Application #:
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08841903
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Filing Dt:
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04/17/1997
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Title:
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REDUNDANCY MEMORY REGISTER
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Patent #:
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Issue Dt:
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11/17/1998
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Application #:
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08841904
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Filing Dt:
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04/17/1997
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Title:
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METHOD FOR DETECTING REDUNDED DEFECTIVE ADDRESSES IN A MEMORY DEVICE WITH REDUNDANCY
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Patent #:
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Issue Dt:
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04/22/2003
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Application #:
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08841908
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Filing Dt:
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04/17/1997
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Title:
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METHOD FOR IMPROVING THICKNESS UNIFORMITY OF DEPOSITED OZONE-TEOS SILICATE GLASS LAYERS
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Patent #:
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Issue Dt:
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01/16/2001
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Application #:
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08842030
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Filing Dt:
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04/23/1997
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Title:
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MEMORY SYSTEM HAVING SERIAL SELECTION OF MEMORY DEVICES AND METHOD
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Patent #:
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Issue Dt:
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03/30/1999
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Application #:
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08842835
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Filing Dt:
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04/17/1997
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Title:
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SEMICONDUCTOR MEMORY DEVICE WITH ROW REDUNDANCY
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