Total properties:
51
|
|
Patent #:
|
|
Issue Dt:
|
08/18/2009
|
Application #:
|
10721916
|
Filing Dt:
|
11/24/2003
|
Publication #:
|
|
Pub Dt:
|
05/26/2005
| | | | |
Title:
|
FABRICATION METHOD FOR SEMICONDUCTOR PACKAGE HEAT SPREADERS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2008
|
Application #:
|
11626232
|
Filing Dt:
|
01/23/2007
|
Publication #:
|
|
Pub Dt:
|
05/24/2007
| | | | |
Title:
|
METHOD OF FABRICATING A SEMICONDUCTOR ASSEMBLY INCLUDING CHIP SCALE PACKAGE AND SECOND SUBSTRATE WITH EXPOSED SUBSTRATE SURFACES ON UPPER AND LOWER SIDES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/2015
|
Application #:
|
11694913
|
Filing Dt:
|
03/30/2007
|
Publication #:
|
|
Pub Dt:
|
10/02/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOUNTING FEATURES FOR CLEARANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/2015
|
Application #:
|
11754603
|
Filing Dt:
|
05/29/2007
|
Publication #:
|
|
Pub Dt:
|
12/06/2007
| | | | |
Title:
|
STACKABLE MULTI-CHIP PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2015
|
Application #:
|
12055526
|
Filing Dt:
|
03/26/2008
|
Publication #:
|
|
Pub Dt:
|
10/01/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PLANAR INTERCONNECT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/2015
|
Application #:
|
12131037
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE SYSTEM WITH CUT MULTIPLE LEAD PADS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2015
|
Application #:
|
12146192
|
Filing Dt:
|
06/25/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LOCKING TERMINAL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/2015
|
Application #:
|
12487925
|
Filing Dt:
|
06/19/2009
|
Publication #:
|
|
Pub Dt:
|
12/23/2010
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH BUMPS AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2015
|
Application #:
|
12561897
|
Filing Dt:
|
09/17/2009
|
Publication #:
|
|
Pub Dt:
|
03/17/2011
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FAN-IN PACKAGE AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2010
|
Application #:
|
12699787
|
Filing Dt:
|
02/03/2010
|
Publication #:
|
|
Pub Dt:
|
06/03/2010
| | | | |
Title:
|
METHOD FOR MAKING SEMICONDUCTOR MULTIPACKAGE MODULE INCLUDING DIE AND INVERTED LAND GRID ARRAY PACKAGE STACKED OVER BALL GRID ARRAY PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/11/2011
|
Application #:
|
12709073
|
Filing Dt:
|
02/19/2010
|
Publication #:
|
|
Pub Dt:
|
06/10/2010
| | | | |
Title:
|
LARGE DIE PACKAGE STRUCTURES AND FABRICATION METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2015
|
Application #:
|
12709425
|
Filing Dt:
|
02/19/2010
|
Publication #:
|
|
Pub Dt:
|
06/17/2010
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING WAFER LEVEL CHIP SCALE PACKAGING
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13163523
|
Filing Dt:
|
06/17/2011
|
Publication #:
|
|
Pub Dt:
|
12/20/2012
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PADS AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2015
|
Application #:
|
13166438
|
Filing Dt:
|
06/22/2011
|
Publication #:
|
|
Pub Dt:
|
12/27/2012
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EXPOSED VERTICAL INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13166679
|
Filing Dt:
|
06/22/2011
|
Publication #:
|
|
Pub Dt:
|
12/27/2012
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2015
|
Application #:
|
13187505
|
Filing Dt:
|
07/20/2011
|
Publication #:
|
|
Pub Dt:
|
01/26/2012
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ISLAND TERMINALS AND EMBEDDED PADDLE AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/2015
|
Application #:
|
13221894
|
Filing Dt:
|
08/30/2011
|
Publication #:
|
|
Pub Dt:
|
02/28/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH REDISTRIBUTION LAYER AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13243555
|
Filing Dt:
|
09/23/2011
|
Publication #:
|
|
Pub Dt:
|
03/28/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2017
|
Application #:
|
13325881
|
Filing Dt:
|
12/14/2011
|
Publication #:
|
|
Pub Dt:
|
06/20/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE TRACE AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/2015
|
Application #:
|
13326806
|
Filing Dt:
|
12/15/2011
|
Publication #:
|
|
Pub Dt:
|
06/20/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TERMINALS AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2017
|
Application #:
|
13327609
|
Filing Dt:
|
12/15/2011
|
Publication #:
|
|
Pub Dt:
|
06/20/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONDUCTIVE PILLARS AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13366768
|
Filing Dt:
|
02/06/2012
|
Publication #:
|
|
Pub Dt:
|
08/16/2012
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TERMINAL LOCKS AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2015
|
Application #:
|
13407554
|
Filing Dt:
|
02/28/2012
|
Publication #:
|
|
Pub Dt:
|
08/29/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECTS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/12/2016
|
Application #:
|
13424968
|
Filing Dt:
|
03/20/2012
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TERMINALS AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2016
|
Application #:
|
13425286
|
Filing Dt:
|
03/20/2012
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EXTERNAL INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2017
|
Application #:
|
13425768
|
Filing Dt:
|
03/21/2012
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SUPPORT STRUCTURE AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13427221
|
Filing Dt:
|
03/22/2012
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SUPPORT STRUCTURE AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2017
|
Application #:
|
13428251
|
Filing Dt:
|
03/23/2012
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A GRID ARRAY WITH A LEADFRAME AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/2016
|
Application #:
|
13488812
|
Filing Dt:
|
06/05/2012
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SUBSTRATE AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/2015
|
Application #:
|
13489282
|
Filing Dt:
|
06/05/2012
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH HEATSINK CAP AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/2015
|
Application #:
|
13489850
|
Filing Dt:
|
06/06/2012
|
Publication #:
|
|
Pub Dt:
|
12/12/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13494721
|
Filing Dt:
|
06/12/2012
|
Publication #:
|
|
Pub Dt:
|
12/12/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FILM ASSIST AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2016
|
Application #:
|
13526802
|
Filing Dt:
|
06/19/2012
|
Publication #:
|
|
Pub Dt:
|
04/25/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PLANARITY CONTROL AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2015
|
Application #:
|
13589018
|
Filing Dt:
|
08/17/2012
|
Publication #:
|
|
Pub Dt:
|
12/06/2012
| | | | |
Title:
|
EXPOSED INTERCONNECT FOR A PACKAGE ON PACKAGE SYSTEM
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13714815
|
Filing Dt:
|
12/14/2012
|
Publication #:
|
|
Pub Dt:
|
06/19/2014
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE GRID ARRAY LEAD FRAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2016
|
Application #:
|
13714865
|
Filing Dt:
|
12/14/2012
|
Publication #:
|
|
Pub Dt:
|
06/19/2014
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TRANSFERABLE TRACE LEAD FRAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/2015
|
Application #:
|
13716479
|
Filing Dt:
|
12/17/2012
|
Publication #:
|
|
Pub Dt:
|
05/23/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT HAVING STAGGERED BOND PADS AND I/O CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/2015
|
Application #:
|
13842305
|
Filing Dt:
|
03/15/2013
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH UNDERFILL AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/2015
|
Application #:
|
13844160
|
Filing Dt:
|
03/15/2013
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE UNDERFILL AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
03/28/2017
|
Application #:
|
13928754
|
Filing Dt:
|
06/27/2013
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EMBEDDED PAD ON LAYERED SUBSTRATE AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/2015
|
Application #:
|
13949432
|
Filing Dt:
|
07/24/2013
|
Title:
|
LEADFRAME SYSTEM WITH WARP CONTROL MECHANISM AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/2015
|
Application #:
|
14037320
|
Filing Dt:
|
09/25/2013
|
Title:
|
DUAL-SIDED FILM-ASSIST MOLDING PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2015
|
Application #:
|
14037838
|
Filing Dt:
|
09/26/2013
|
Publication #:
|
|
Pub Dt:
|
03/26/2015
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SIDE SOLDERABLE LEADS AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14136274
|
Filing Dt:
|
12/20/2013
|
Publication #:
|
|
Pub Dt:
|
06/25/2015
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONDUCTIVE INK AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14136513
|
Filing Dt:
|
12/20/2013
|
Publication #:
|
|
Pub Dt:
|
06/25/2015
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH VIALESS SUBSTRATE AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2015
|
Application #:
|
14137352
|
Filing Dt:
|
12/20/2013
|
Title:
|
METHOD OF MANUFACTURE OF INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PLASMA PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2017
|
Application #:
|
14139614
|
Filing Dt:
|
12/23/2013
|
Publication #:
|
|
Pub Dt:
|
06/25/2015
| | | | |
Title:
|
Semiconductor Device and Method of Forming Fine Pitch RDL Over Semiconductor Die in Fan-Out Package
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/2015
|
Application #:
|
14214765
|
Filing Dt:
|
03/15/2014
|
Publication #:
|
|
Pub Dt:
|
09/25/2014
| | | | |
Title:
|
CORELESS INTEGRATED CIRCUIT PACKAGING SYSTEM AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2015
|
Application #:
|
14556992
|
Filing Dt:
|
12/01/2014
|
Publication #:
|
|
Pub Dt:
|
06/18/2015
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EMBEDDED COMPONENT AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/2017
|
Application #:
|
14616942
|
Filing Dt:
|
02/09/2015
|
Publication #:
|
|
Pub Dt:
|
06/04/2015
| | | | |
Title:
|
Semiconductor Device and Method of Forming Repassivation Layer for Robust Low Cost Fan-Out Semiconductor Package
|
|
|
Patent #:
|
|
Issue Dt:
|
11/14/2017
|
Application #:
|
14624136
|
Filing Dt:
|
02/17/2015
|
Publication #:
|
|
Pub Dt:
|
06/25/2015
| | | | |
Title:
|
Semiconductor Device and Method of Forming Build-Up Interconnect Structures Over a Temporary Substrate
|
|