Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 057601/0001 | |
| Pages: | 9 |
| | Recorded: | 09/24/2021 | | |
| Attorney Dkt #: | QCOM-4494US (2101378) |
| Conveyance: | CORRECTIVE ASSIGNMENT TO CORRECT THE THIRD INVENTOR'S EXECTUION DATE IN THE ASSIGNMENT DOCUMENT PREVIOUSLY RECORDED AT REEL: 056304 FRAME: 0307. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT . |
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Total properties:
1
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Patent #:
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Issue Dt:
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12/06/2022
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Application #:
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17307842
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Filing Dt:
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05/04/2021
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Publication #:
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Pub Dt:
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11/10/2022
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Title:
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I2C BUS ARCHITECTURE USING SHARED CLOCK AND DEDICATED DATA LINES
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Assignee
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| 5775 MOREHOUSE DRIVE |
| SAN DIEGO, CALIFORNIA 92121-1714 |
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Correspondence name and address
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LOZA & LOZA LLP
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305 NORTH SECOND AVENUE #127
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UPLAND, CA 91786
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