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Patent #:
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Issue Dt:
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01/25/2011
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Application #:
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11255740
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Filing Dt:
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10/21/2005
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Publication #:
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Pub Dt:
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08/17/2006
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Title:
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STACKED INTEGRATED CIRCUIT AND PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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09/07/2010
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Application #:
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11276727
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Filing Dt:
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03/10/2006
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Publication #:
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Pub Dt:
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09/13/2007
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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11/09/2010
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Application #:
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11278411
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Filing Dt:
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04/01/2006
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Publication #:
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Pub Dt:
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10/11/2007
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH NET SPACER
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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11278414
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Filing Dt:
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04/01/2006
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Publication #:
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Pub Dt:
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10/11/2007
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WIRE BOND PATTERN
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Patent #:
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Issue Dt:
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12/14/2010
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Application #:
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11279131
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Filing Dt:
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04/10/2006
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Publication #:
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Pub Dt:
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05/17/2007
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM USING HEAT SLUG
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Patent #:
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Issue Dt:
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08/03/2010
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Application #:
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11326211
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Filing Dt:
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01/04/2006
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Publication #:
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Pub Dt:
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07/12/2007
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Title:
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MULTI-CHIP PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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12/28/2010
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Application #:
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11379332
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Filing Dt:
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04/19/2006
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Publication #:
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Pub Dt:
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10/25/2007
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Title:
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EMBEDDED INTEGRATED CIRCUIT PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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07/27/2010
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Application #:
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11381683
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Filing Dt:
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05/04/2006
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Publication #:
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Pub Dt:
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11/09/2006
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Title:
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STACKED PACKAGE SEMICONDUCTOR MODULE HAVING PACKAGES STACKED IN A CAVITY IN THE MODULE SUBSTRATE
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Patent #:
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Issue Dt:
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11/16/2010
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Application #:
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11462247
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Filing Dt:
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08/03/2006
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Publication #:
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Pub Dt:
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02/07/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DOWN-SET DIE PAD AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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03/08/2011
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Application #:
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11464726
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Filing Dt:
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08/15/2006
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Publication #:
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Pub Dt:
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02/21/2008
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Title:
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STRUCTURE FOR BUMPED WAFER TEST
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Patent #:
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Issue Dt:
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08/31/2010
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Application #:
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11532455
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Filing Dt:
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09/15/2006
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Publication #:
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Pub Dt:
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05/17/2007
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Title:
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INTEGRATED CIRCUIT SYSTEM WITH WAFER TRIMMING
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Patent #:
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Issue Dt:
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08/10/2010
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Application #:
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11608827
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Filing Dt:
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12/09/2006
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Publication #:
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Pub Dt:
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06/12/2008
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Title:
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STACKED INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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08/17/2010
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Application #:
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11670862
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Filing Dt:
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02/02/2007
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Publication #:
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Pub Dt:
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08/07/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTEGRAL INNER LEAD AND PADDLE
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Patent #:
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Issue Dt:
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11/23/2010
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Application #:
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11745045
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Filing Dt:
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05/07/2007
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Publication #:
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Pub Dt:
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11/13/2008
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Title:
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ULTRA THIN BUMPED WAFER WITH UNDER-FILM
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Patent #:
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Issue Dt:
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11/09/2010
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Application #:
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11766787
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Filing Dt:
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06/21/2007
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Publication #:
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Pub Dt:
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12/25/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING DEVICE STACKING
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Patent #:
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Issue Dt:
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02/08/2011
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Application #:
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11768640
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Filing Dt:
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06/26/2007
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Publication #:
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Pub Dt:
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01/01/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DUAL SIDE CONNECTION
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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11769512
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Filing Dt:
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06/27/2007
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Publication #:
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Pub Dt:
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01/01/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OVERHANGING CONNECTION STACK
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Patent #:
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Issue Dt:
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09/21/2010
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Application #:
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11771086
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Filing Dt:
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06/29/2007
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Publication #:
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Pub Dt:
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01/01/2009
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Title:
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STACKABLE PACKAGE BY USING INTERNAL STACKING MODULES
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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11833646
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Filing Dt:
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08/03/2007
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Publication #:
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Pub Dt:
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02/07/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOLDING VENTS
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Patent #:
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Issue Dt:
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04/05/2011
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Application #:
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11833898
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Filing Dt:
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08/03/2007
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Publication #:
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Pub Dt:
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02/05/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE DEVICES
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Patent #:
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Issue Dt:
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01/11/2011
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Application #:
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11839020
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Filing Dt:
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08/15/2007
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Publication #:
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Pub Dt:
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11/29/2007
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Title:
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WIRE BONDING STRUCTURE AND METHOD THAT ELIMINATES SPECIAL WIRE BONDABLE FINISH AND REDUCES BONDING PITCH ON SUBSTRATES
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Patent #:
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Issue Dt:
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10/12/2010
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Application #:
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11849087
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Filing Dt:
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08/31/2007
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Publication #:
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Pub Dt:
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03/05/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM WITH SIDE-BY-SIDE AND OFFSET STACKING
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Patent #:
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Issue Dt:
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02/22/2011
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Application #:
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11852771
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Filing Dt:
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09/10/2007
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Publication #:
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Pub Dt:
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03/12/2009
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Title:
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METHOD FOR DIRECTIONAL GRINDING ON BACKSIDE OF A SEMICONDUCTOR WAFER
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Patent #:
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Issue Dt:
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01/11/2011
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Application #:
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11854934
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Filing Dt:
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09/13/2007
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Publication #:
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Pub Dt:
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03/19/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM WITH LEADS
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Patent #:
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Issue Dt:
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02/22/2011
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Application #:
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11858554
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Filing Dt:
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09/20/2007
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Publication #:
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Pub Dt:
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03/26/2009
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Title:
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METHOD OF MANUFACTURING INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WARP-FREE CHIP
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Patent #:
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Issue Dt:
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03/29/2011
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Application #:
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11862406
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Filing Dt:
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09/27/2007
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Publication #:
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Pub Dt:
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04/02/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADFRAME ARRAY
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Patent #:
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Issue Dt:
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03/29/2011
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Application #:
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11864826
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Filing Dt:
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09/28/2007
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Publication #:
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Pub Dt:
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04/02/2009
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH BASE STRUCTURE DEVICE
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Patent #:
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Issue Dt:
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03/08/2011
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Application #:
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11952951
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Filing Dt:
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12/07/2007
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Publication #:
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Pub Dt:
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06/11/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM FOR ELECTROMAGNETIC ISOLATION
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Patent #:
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Issue Dt:
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08/24/2010
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Application #:
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11954613
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Filing Dt:
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12/12/2007
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Publication #:
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Pub Dt:
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06/18/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OFFSET STACKING AND ANTI-FLASH STRUCTURE
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Patent #:
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Issue Dt:
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08/03/2010
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Application #:
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11957101
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Filing Dt:
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12/14/2007
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Publication #:
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Pub Dt:
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06/18/2009
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE FOR ENCAPSULATED DIE HAVING PRE-APPLIED PROTECTIVE LAYER
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Patent #:
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Issue Dt:
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09/07/2010
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Application #:
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11958603
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Filing Dt:
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12/18/2007
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Publication #:
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Pub Dt:
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06/18/2009
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTEGRATED PASSIVE DEVICE MODULE
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Patent #:
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Issue Dt:
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03/22/2011
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Application #:
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11965621
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Filing Dt:
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12/27/2007
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Publication #:
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Pub Dt:
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07/02/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE WITH IMPROVED CONNECTIONS
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Patent #:
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Issue Dt:
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09/21/2010
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Application #:
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11965641
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Filing Dt:
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12/27/2007
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Publication #:
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Pub Dt:
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07/02/2009
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Title:
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MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKING INTERPOSER
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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12036056
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Filing Dt:
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02/22/2008
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Publication #:
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Pub Dt:
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08/27/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH EXTERNAL INTERCONNECTS WITHIN A DIE PLATFORM
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Patent #:
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Issue Dt:
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02/22/2011
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Application #:
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12042903
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Filing Dt:
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03/05/2008
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Publication #:
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Pub Dt:
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09/10/2009
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Title:
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SEMICONDUCTOR PACKAGE WITH STACKED SEMICONDUCTOR DIE EACH HAVING IPD AND METHOD OF REDUCING MUTUAL INDUCTIVE COUPLING BY PROVIDING SELECTABLE VERTICAL AND LATERAL SEPARATION BETWEEN IPD
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Patent #:
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Issue Dt:
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01/25/2011
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Application #:
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12045646
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Filing Dt:
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03/10/2008
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Publication #:
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Pub Dt:
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09/10/2009
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Title:
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INTEGRATED CIRCUIT WITH STEP MOLDED INNER STACKING MODULE PACKAGE IN PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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12050400
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Filing Dt:
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03/18/2008
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Publication #:
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Pub Dt:
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09/24/2009
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Title:
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BALL GRID ARRAY PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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03/08/2011
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Application #:
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12051280
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Filing Dt:
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03/19/2008
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Publication #:
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Pub Dt:
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09/24/2009
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Title:
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PACKAGE-ON-PACKAGE SYSTEM WITH INTERNAL STACKING MODULE INTERPOSER
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Patent #:
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Issue Dt:
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12/14/2010
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Application #:
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12051349
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Filing Dt:
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03/19/2008
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Publication #:
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Pub Dt:
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09/24/2009
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING OXIDE LAYER ON SIGNAL TRACES FOR ELECTRICAL ISOLATION IN FINE PITCH BONDING
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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12051625
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Filing Dt:
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03/19/2008
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Publication #:
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Pub Dt:
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09/24/2009
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Title:
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PACKAGE-ON-PACKAGE SYSTEM WITH VIA Z-INTERCONNECTIONS
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Patent #:
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Issue Dt:
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04/05/2011
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Application #:
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12052910
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Filing Dt:
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03/21/2008
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Publication #:
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Pub Dt:
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09/24/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM FOR STACKABLE DEVICES
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Patent #:
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Issue Dt:
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09/28/2010
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Application #:
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12053760
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Filing Dt:
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03/24/2008
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Publication #:
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Pub Dt:
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09/24/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKING MODULE
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Patent #:
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Issue Dt:
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08/31/2010
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Application #:
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12054682
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Filing Dt:
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03/25/2008
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Publication #:
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Pub Dt:
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10/01/2009
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Title:
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MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH EXPOSED EXTERNAL INTERCONNECTS
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Patent #:
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Issue Dt:
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12/21/2010
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Application #:
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12054701
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Filing Dt:
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03/25/2008
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Publication #:
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Pub Dt:
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10/01/2009
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Title:
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MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SUBSTRATE
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Patent #:
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Issue Dt:
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01/18/2011
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Application #:
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12055642
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Filing Dt:
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03/26/2008
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Publication #:
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Pub Dt:
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10/01/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH RIGID LOCKING LEAD
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Patent #:
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Issue Dt:
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12/21/2010
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Application #:
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12057299
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Filing Dt:
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03/27/2008
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Publication #:
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Pub Dt:
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07/31/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH AN ENCAPSULANT CAVITY AND METHOD OF FABRICATION THEREOF
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Patent #:
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Issue Dt:
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12/28/2010
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Application #:
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12122631
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Filing Dt:
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05/16/2008
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Publication #:
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Pub Dt:
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11/19/2009
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Title:
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PACKAGE SYSTEM INCORPORATING A FLIP-CHIP ASSEMBLY
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Patent #:
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Issue Dt:
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03/15/2011
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Application #:
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12128116
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Filing Dt:
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05/28/2008
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Publication #:
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Pub Dt:
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12/03/2009
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING HOLES IN SUBSTRATE TO INTERCONNECT TOP SHIELD AND GROUND SHIELD
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Patent #:
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Issue Dt:
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08/17/2010
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Application #:
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12132121
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Filing Dt:
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06/03/2008
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Publication #:
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Pub Dt:
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12/11/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADED PACKAGE
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Patent #:
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Issue Dt:
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08/10/2010
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Application #:
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12133133
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Filing Dt:
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06/04/2008
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Publication #:
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Pub Dt:
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12/10/2009
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Title:
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SEMICONDUCTOR DEVICE HAVING ELECTRICAL DEVICES MOUNTED TO IPD STRUCTURE AND METHOD OF SHIELDING ELECTROMAGNETIC INTERFERENCE
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Patent #:
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Issue Dt:
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12/14/2010
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Application #:
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12136723
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Filing Dt:
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06/10/2008
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Publication #:
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Pub Dt:
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12/10/2009
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF CONNECTING A SHIELDING LAYER TO GROUND THROUGH CONDUCTIVE VIAS
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Patent #:
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Issue Dt:
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11/09/2010
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Application #:
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12146101
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Filing Dt:
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06/25/2008
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Publication #:
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Pub Dt:
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12/31/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM STACKABLE DEVICES
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Patent #:
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Issue Dt:
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01/18/2011
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Application #:
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12146411
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Filing Dt:
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06/25/2008
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Publication #:
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Pub Dt:
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12/31/2009
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Title:
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STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTRA-STACK ENCAPSULATION
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Patent #:
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Issue Dt:
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03/01/2011
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Application #:
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12171890
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Filing Dt:
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07/11/2008
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Publication #:
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Pub Dt:
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01/14/2010
| | | | |
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Title:
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PACKAGE STACKING SYSTEM WITH MOLD CONTAMINATION PREVENTION
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Patent #:
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Issue Dt:
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11/30/2010
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Application #:
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12173504
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Filing Dt:
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07/15/2008
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Publication #:
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Pub Dt:
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01/21/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING A THERMAL DISSIPATION PATH THROUGH RDL AND CONDUCTIVE VIA
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Patent #:
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Issue Dt:
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01/18/2011
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Application #:
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12201896
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Filing Dt:
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08/29/2008
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Publication #:
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Pub Dt:
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03/05/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING AN OFFSET STACKED CONFIGURATION
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Patent #:
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Issue Dt:
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11/16/2010
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Application #:
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12203332
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Filing Dt:
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09/03/2008
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Publication #:
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Pub Dt:
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05/21/2009
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Title:
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DROP-MOLD CONFORMABLE MATERIAL AS AN ENCAPSULATION FOR AN INTEGRATED CIRCUIT PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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11/09/2010
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Application #:
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12205695
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Filing Dt:
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09/05/2008
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Publication #:
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Pub Dt:
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03/26/2009
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF LASER-MARKING WAFERS WITH TAPE APPLIED TO ITS ACTIVE SURFACE
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Patent #:
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Issue Dt:
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01/18/2011
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Application #:
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12206383
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Filing Dt:
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09/08/2008
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Publication #:
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Pub Dt:
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03/11/2010
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Title:
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BALL GRID ARRAY PACKAGE STACKING SYSTEM
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Patent #:
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Issue Dt:
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10/12/2010
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Application #:
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12207459
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Filing Dt:
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09/09/2008
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Publication #:
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Pub Dt:
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03/11/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REDISTRIBUTION LAYER
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Patent #:
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Issue Dt:
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03/01/2011
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Application #:
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12207986
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Filing Dt:
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09/10/2008
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Publication #:
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Pub Dt:
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03/11/2010
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Title:
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METHOD OF FORMING VERTICALLY OFFSET BOND ON TRACE INTERCONNECTS ON RECESSED AND RAISED BOND FINGERS
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Patent #:
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Issue Dt:
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08/10/2010
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Application #:
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12212524
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Filing Dt:
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09/17/2008
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Publication #:
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Pub Dt:
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03/18/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING HIGH-FREQUENCY CIRCUIT STRUCTURE AND METHOD THEREOF
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Patent #:
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Issue Dt:
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02/15/2011
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Application #:
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12235000
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Filing Dt:
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09/22/2008
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Publication #:
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Pub Dt:
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03/25/2010
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Title:
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METHOD OF FORMING A WAFER LEVEL PACKAGE WITH RDL [[BUMP]] INTERCONNECTION OVER ENCAPSULANT BETWEEN BUMP AND SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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03/22/2011
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Application #:
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12235144
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Filing Dt:
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09/22/2008
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Publication #:
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Pub Dt:
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03/25/2010
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Title:
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SEMICONDUCTOR PACKAGE SYSTEM WITH DIE SUPPORT PAD
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Patent #:
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Issue Dt:
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08/17/2010
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Application #:
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12236437
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Filing Dt:
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09/23/2008
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Publication #:
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Pub Dt:
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03/25/2010
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Title:
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QUAD FLAT PACK IN QUAD FLAT PACK INTEGRATED CIRCUIT PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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01/18/2011
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Application #:
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12237291
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Filing Dt:
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09/24/2008
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Publication #:
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Pub Dt:
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01/15/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE MOLDING
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Patent #:
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Issue Dt:
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03/22/2011
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Application #:
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12238153
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Filing Dt:
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09/25/2008
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Publication #:
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Pub Dt:
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03/25/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM HAVING PLANAR INTERCONNECT
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Patent #:
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Issue Dt:
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12/28/2010
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Application #:
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12238183
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Filing Dt:
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09/25/2008
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Publication #:
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Pub Dt:
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03/25/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM FOR STACKABLE DEVICES
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Patent #:
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Issue Dt:
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11/30/2010
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Application #:
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12266313
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Filing Dt:
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11/06/2008
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Publication #:
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Pub Dt:
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01/14/2010
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Title:
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EMBEDDED SEMICONDUCTOR DIE PACKAGE AND METHOD OF MAKING THE SAME USING METAL FRAME CARRIER
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Patent #:
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Issue Dt:
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11/30/2010
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12276297
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Filing Dt:
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11/21/2008
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Pub Dt:
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05/27/2010
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Title:
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ENCAPSULANT INTERPOSER SYSTEM WITH INTEGRATED PASSIVE DEVICES AND MANUFACTURING METHOD THEREFOR
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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12329482
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Filing Dt:
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12/05/2008
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Publication #:
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Pub Dt:
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06/10/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A PROTRUSION ON AN INNER STACKING MODULE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/28/2010
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Application #:
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12329778
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Filing Dt:
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12/08/2008
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Publication #:
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Pub Dt:
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06/10/2010
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Title:
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SEMICONDUCTOR PACKAGE WITH SEMICONDUCTOR CORE STRUCTURE AND METHOD OF FORMING SAME
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Patent #:
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Issue Dt:
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04/05/2011
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Application #:
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12331416
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Filing Dt:
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12/09/2008
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Publication #:
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Pub Dt:
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06/10/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EXPOSED TERMINAL INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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08/17/2010
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Application #:
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12331682
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Filing Dt:
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12/10/2008
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Publication #:
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Pub Dt:
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06/10/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE PILLARS IN RECESSED REGION OF PERIPHERAL AREA AROUND THE DEVICE FOR ELECTRICAL INTERCONNECTION TO OTHER DEVICES
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Issue Dt:
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12/28/2010
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Application #:
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12333297
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Filing Dt:
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12/11/2008
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Pub Dt:
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06/17/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM HAVING THROUGH SILICON VIA WITH DIRECT INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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08/31/2010
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Application #:
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12340638
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Filing Dt:
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12/19/2008
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Publication #:
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Pub Dt:
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06/24/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/28/2010
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Application #:
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12353020
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Filing Dt:
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01/13/2009
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Publication #:
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Pub Dt:
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06/04/2009
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Title:
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LEADED STACKED PACKAGES HAVING ELEVATED DIE PADDLE
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Patent #:
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Issue Dt:
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02/08/2011
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Application #:
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12360644
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Filing Dt:
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01/27/2009
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Publication #:
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Pub Dt:
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05/28/2009
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CARRIER AND METHOD OF MANUFACTURE THEREOF
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Issue Dt:
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03/22/2011
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12391807
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Filing Dt:
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02/24/2009
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Pub Dt:
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06/18/2009
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER
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Issue Dt:
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01/04/2011
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12408662
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03/20/2009
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Pub Dt:
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09/23/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LAYERED PACKAGING AND METHOD OF MANUFACTURE THEREOF
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Issue Dt:
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12/07/2010
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Application #:
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12412064
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Filing Dt:
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03/26/2009
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Publication #:
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Pub Dt:
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09/30/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
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Issue Dt:
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04/12/2011
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Application #:
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12413302
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03/27/2009
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Pub Dt:
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09/30/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM HAVING DUAL SIDED CONNECTION AND METHOD OF MANUFACTURE THEREOF
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03/08/2011
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12472236
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05/26/2009
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Pub Dt:
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09/17/2009
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Title:
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BUMP-ON-LEAD FLIP CHIP INTERCONNECTION
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01/04/2011
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12473239
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05/27/2009
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Pub Dt:
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09/17/2009
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ETCHED RING AND DIE PADDLE AND METHOD OF MANUFACTURE THEREOF
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03/08/2011
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12484131
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06/12/2009
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Pub Dt:
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10/08/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTERCONNECTION SUPPORT AND METHOD OF MANUFACTURE THEREOF
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01/04/2011
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12538098
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08/07/2009
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A TIERED SUBSTRATE PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Issue Dt:
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04/12/2011
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Application #:
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12557481
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09/10/2009
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Pub Dt:
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03/10/2011
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONDUCTIVE PILLARS AND METHOD OF MANUFACTURE THEREOF
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Issue Dt:
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01/11/2011
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Application #:
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12562702
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Filing Dt:
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09/18/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH THROUGH SEMICONDUCTOR VIAS AND METHOD OF MANUFACTURE THEREOF
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Issue Dt:
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04/05/2011
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Application #:
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12562722
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Filing Dt:
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09/18/2009
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Pub Dt:
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03/24/2011
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CIRCUITRY STACKING AND METHOD OF MANUFACTURE THEREOF
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01/25/2011
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Application #:
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12571234
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09/30/2009
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Pub Dt:
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01/28/2010
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Title:
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STANDOFF HEIGHT IMPROVEMENT FOR BUMPING TECHNOLOGY USING SOLDER RESIST
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02/01/2011
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12572568
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10/02/2009
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Pub Dt:
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01/28/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING SHIELDING ALONG A PROFILE DISPOSED IN PERIPHERAL REGION AROUND THE DEVICE
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Issue Dt:
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01/04/2011
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Application #:
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12612630
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Filing Dt:
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11/04/2009
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Pub Dt:
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03/04/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE SUBSTRATE HAVING CORNER CONTACTS AND METHOD OF MANUFACTURE THEREOF
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Issue Dt:
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03/29/2011
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12615195
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11/09/2009
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Pub Dt:
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03/04/2010
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Title:
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STACKABLE MULTI-CHIP PACKAGE SYSTEM WITH SUPPORT STRUCTURE
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Patent #:
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Issue Dt:
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11/23/2010
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Application #:
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12623351
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Filing Dt:
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11/20/2009
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Pub Dt:
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03/18/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH IMAGE SENSOR SYSTEM
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Issue Dt:
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12/28/2010
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12627884
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Filing Dt:
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11/30/2009
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Pub Dt:
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03/25/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING EMBEDDED PASSIVE CIRCUIT ELEMENTS INTERCONNECTED TO THROUGH HOLE VIAS
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Issue Dt:
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08/31/2010
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12631476
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12/04/2009
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Pub Dt:
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04/01/2010
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Title:
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STACKED DIE SEMICONDUCTOR DEVICE HAVING CIRCUIT TAPE
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Issue Dt:
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04/05/2011
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Application #:
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12690092
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01/19/2010
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Pub Dt:
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05/13/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ENCAPSULATION LOCK AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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01/11/2011
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Application #:
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12730171
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Filing Dt:
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03/23/2010
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Pub Dt:
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07/15/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE STACKING SYSTEM
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Issue Dt:
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03/22/2011
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Application #:
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12767670
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Filing Dt:
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04/26/2010
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Pub Dt:
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08/12/2010
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Title:
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METHOD OF MANUFACTURING A SEMICONDUCTOR PACKAGE WITH FINE PITCH LEAD FINGERS
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Issue Dt:
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03/29/2011
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Application #:
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12784434
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Filing Dt:
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05/20/2010
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Pub Dt:
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09/23/2010
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Title:
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METHOD FOR MAKING A STACKED PACKAGE SEMICONDUCTOR MODULE HAVING PACKAGES STACKED IN A CAVITY IN THE MODULE SUBSTRATE
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