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Total properties:
14
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Patent #:
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Issue Dt:
|
03/26/1991
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Application #:
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07493546
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Filing Dt:
|
03/14/1990
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Title:
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DIGITAL PHASE LOCK LOOP DECODER
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Patent #:
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Issue Dt:
|
11/10/1998
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Application #:
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07563216
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Filing Dt:
|
08/06/1990
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Title:
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A MEMORY SYSTEM WITH WRITE BUFFER, PREFETCH AND INTERNAL CACHES
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|
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Patent #:
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Issue Dt:
|
11/08/1994
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Application #:
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07752371
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Filing Dt:
|
08/30/1991
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Title:
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INTERNAL BUS FOR WORK STATION INTERFACING MEANS
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Patent #:
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Issue Dt:
|
08/08/1995
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Application #:
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07752407
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Filing Dt:
|
08/30/1991
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Title:
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WORK STATION AND METHOD FOR TRANSFERRING DATA BETWEEN AN EXTERNAL BUS AND A MEMORY UNIT
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Patent #:
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Issue Dt:
|
06/17/1997
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Application #:
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07752819
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Filing Dt:
|
08/30/1991
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Title:
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WORK STATION ARCHITECTURE WITH SELECTABLE CPU
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Patent #:
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Issue Dt:
|
06/27/1995
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Application #:
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07753273
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Filing Dt:
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08/30/1991
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Title:
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WORK STATION INCLUDING A DIRECT MEMORY ACCESS CONTROLLER AND INTERFACING MEANS TO A DATA CHANNEL
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Patent #:
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Issue Dt:
|
11/01/1994
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Application #:
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07929551
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Filing Dt:
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08/14/1992
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Title:
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VIA PROGRAMMING FOR MULTICHIP MODULES
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|
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Patent #:
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Issue Dt:
|
02/21/1995
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Application #:
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07996276
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Filing Dt:
|
12/24/1992
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Title:
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MULTI-PORT PROCESSOR WITH PERIPHERAL COMPONENT INTERCONNECT PORT AND RAMBUS PORT
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|
|
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Patent #:
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|
Issue Dt:
|
06/18/1996
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Application #:
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07996277
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Filing Dt:
|
12/24/1992
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Title:
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BUS SYSTEM WITH CACHE SNOOPING SIGNALS HAVING A TURNAROUND TIME BETWEEN AGENTS DRIVING THE BUS FOR KEEPING THE BUS FROM FLOATING FOR AN EXTENDED PERIOD
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|
|
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Patent #:
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|
Issue Dt:
|
03/26/1996
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Application #:
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07997427
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Filing Dt:
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12/28/1992
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Title:
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PERIPHERAL COMPONENT INTERCONNECT "ALWAYS ON" PROTOCOL
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|
|
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Patent #:
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|
Issue Dt:
|
01/31/1995
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Application #:
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08098763
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Filing Dt:
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07/28/1993
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Title:
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METHOD AND APPARATUS FOR TRANSFERRING DATA WITHIN A COMPUTER USING A BURST SEQUENCE WHICH INCLUDES MODIFIED BYTES AND A MINIMUM NUMBER OF UNMODIFIED BYTES
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|
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Patent #:
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|
Issue Dt:
|
09/14/1999
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Application #:
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08132421
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Filing Dt:
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10/05/1993
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Title:
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COMPUTER MEMORY SYSTEM HAVING PROGRAMMABLE OPERATIONAL CHARACTERISTICS BASED ON CHARACTERISTICS OF A CENTRAL PROCESSOR
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|
|
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Patent #:
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|
Issue Dt:
|
01/27/1998
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Application #:
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08580000
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Filing Dt:
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12/19/1995
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|
Title:
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ASYNCHRONOUS PCI-TO-PCI BRIDGE
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|
|
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Patent #:
|
|
Issue Dt:
|
06/29/1999
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Application #:
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08772039
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Filing Dt:
|
12/19/1996
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Title:
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PROMOTING LOCAL MEMORY ACCESSING AND DATA MIGRATION IN NON-UNIFORM MEMORY ACCESS SYSTEM ARCHITECTURES
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|
