Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 020280/0016 | |
| Pages: | 6 |
| | Recorded: | 12/20/2007 | | |
| Attorney Dkt #: | QIM 2007 VJ 31543 (VJP) |
| Conveyance: | CORRECTIVE ASSIGNMENT TO CORRECT THE SECOND ASSIGNEE INFORMATION PREVIOUSLY RECORDED ON REEL 020231 FRAME 0562. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF ASSIGNOR'S INTEREST. |
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Total properties:
1
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Patent #:
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Issue Dt:
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04/13/2010
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Application #:
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11873289
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Filing Dt:
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10/16/2007
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Publication #:
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Pub Dt:
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04/16/2009
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Title:
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INTEGRATED CIRCUIT, MEMORY CELL, MEMORY MODULE, METHOD OF OPERATING AN INTEGRATED CIRCUIT, AND METHOD OF MANUFACTURING A MEMORY CELL
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Assignees
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| GUSTAV-HEINEMANN-RING 212 |
| MUNICH, GERMANY 81739 |
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| 224 BLD. JOHN KENNEDY |
| CORBEIL ESSONNES CEDEX, FRANCE ZIP 31 P 91105 |
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Correspondence name and address
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SLATER & MATSIL, L.L.P
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17950 PRESTON RD.
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SUITE 1000
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DALLAS, TX 75252
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