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Reel/Frame:026577/0017   Pages: 6
Recorded: 07/12/2011
Attorney Dkt #:X-2742-1D US
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
03/27/2012
Application #:
13180782
Filing Dt:
07/12/2011
Title:
LATCH BASED OPTIMIZATION DURING IMPLEMENTATION OF CIRCUIT DESIGNS FOR PROGRAMMABLE LOGIC DEVICES
Assignors
1
Exec Dt:
04/16/2008
2
Exec Dt:
04/16/2008
3
Exec Dt:
04/17/2008
4
Exec Dt:
05/06/2008
5
Exec Dt:
05/27/2008
Assignee
1
2100 LOGIC DRIVE
SAN JOSE, CALIFORNIA 95124
Correspondence name and address
XILINX, INC.
2100 LOGIC DR
ATTN: LEGAL DEPT
SAN JOSE, CA 95124

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