|
|
Patent #:
|
|
Issue Dt:
|
10/16/2012
|
Application #:
|
13252632
|
Filing Dt:
|
10/04/2011
|
Publication #:
|
|
Pub Dt:
|
01/26/2012
| | | | |
Title:
|
METHODS FOR AVOIDING PARASITIC CAPACITANCE IN AN INTEGRATED CIRCUIT PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2013
|
Application #:
|
13253554
|
Filing Dt:
|
10/05/2011
|
Publication #:
|
|
Pub Dt:
|
02/16/2012
| | | | |
Title:
|
MASKLESS VORTEX PHASE SHIFT OPTICAL DIRECT WRITE LITHOGRAPHY
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13292170
|
Filing Dt:
|
11/09/2011
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
LOCATION-BASED SEARCH-RESULT RANKING FOR BLOG DOCUMENTS AND THE LIKE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2012
|
Application #:
|
13311299
|
Filing Dt:
|
12/05/2011
|
Publication #:
|
|
Pub Dt:
|
03/29/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND PROCESS FOR REDUCING DAMAGING BREAKDOWN IN GATE DIELECTRICS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13344207
|
Filing Dt:
|
01/05/2012
|
Publication #:
|
|
Pub Dt:
|
05/10/2012
| | | | |
Title:
|
ALUMINUM BOND PADS WITH ENHANCED WIRE BOND STABILITY
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13348415
|
Filing Dt:
|
01/11/2012
|
Publication #:
|
|
Pub Dt:
|
05/10/2012
| | | | |
Title:
|
BIPOLAR JUNCTION TRANSISTOR HAVING A HIGH GERMANIUM CONCENTRATION IN A SILICON-GERMANIUM LAYER AND A METHOD FOR FORMING THE BIPOLAR JUNCTION TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
13367094
|
Filing Dt:
|
02/06/2012
|
Publication #:
|
|
Pub Dt:
|
08/08/2013
| | | | |
Title:
|
SYSTEM AND METHOD FOR MANAGING TIMING MARGIN IN A HIERARCHICAL INTEGRATED CIRCUIT DESIGN PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/14/2013
|
Application #:
|
13368985
|
Filing Dt:
|
02/08/2012
|
Publication #:
|
|
Pub Dt:
|
06/07/2012
| | | | |
Title:
|
CIRCUITS AND METHODS FOR IMPROVED FET MATCHING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2013
|
Application #:
|
13398656
|
Filing Dt:
|
02/16/2012
|
Publication #:
|
|
Pub Dt:
|
06/14/2012
| | | | |
Title:
|
PORTABLE CELL PHONE AND A PROIMITY REGULATION SYSTEM FOR USE WITH A PORTABLE CELL PHONE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/2013
|
Application #:
|
13407830
|
Filing Dt:
|
02/29/2012
|
Publication #:
|
|
Pub Dt:
|
06/21/2012
| | | | |
Title:
|
LOW DEPTH CIRCUIT DESIGN
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13418967
|
Filing Dt:
|
03/13/2012
|
Publication #:
|
|
Pub Dt:
|
04/25/2013
| | | | |
Title:
|
Method and Apparatus for Channel Traffic Congestion Avoidance in a Mobile Communication System
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
13421710
|
Filing Dt:
|
03/15/2012
|
Publication #:
|
|
Pub Dt:
|
07/05/2012
| | | | |
Title:
|
METHOD FOR DESIGNING INTEGRATED CIRCUITS EMPLOYING A PARTITIONED HIERARCHICAL DESIGN FLOW AND AN APPARATUS EMPLOYING THE METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2014
|
Application #:
|
13428540
|
Filing Dt:
|
03/23/2012
|
Publication #:
|
|
Pub Dt:
|
07/12/2012
| | | | |
Title:
|
METAL-OXIDE-SEMICONDUCTOR DEVICE HAVING TRENCHED DIFFUSION REGION AND METHOD OF FORMING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2013
|
Application #:
|
13442099
|
Filing Dt:
|
04/09/2012
|
Publication #:
|
|
Pub Dt:
|
08/02/2012
| | | | |
Title:
|
AUTOMATION OF TIE CELL INSERTION, OPTIMIZATION AND REPLACEMENT BY SCAN FLIP-FLOPS TO INCREASE FAULT COVERAGE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13443691
|
Filing Dt:
|
04/10/2012
|
Publication #:
|
|
Pub Dt:
|
08/02/2012
| | | | |
Title:
|
INPUT/OUTPUT CORE DESIGN AND METHOD OF MANUFACTURE THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2014
|
Application #:
|
13453289
|
Filing Dt:
|
04/23/2012
|
Publication #:
|
|
Pub Dt:
|
08/16/2012
| | | | |
Title:
|
CIRCUIT TIMING ANALYSIS INCORPORATING THE EFFECTS OF TEMPERATURE INVERSION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2013
|
Application #:
|
13467696
|
Filing Dt:
|
05/09/2012
|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
Title:
|
MULTI-PASS ROUTING TO REDUCE CROSSTALK
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13472780
|
Filing Dt:
|
05/16/2012
|
Publication #:
|
|
Pub Dt:
|
09/06/2012
| | | | |
Title:
|
Cordless Telephone With Digital Audio Player Capability
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2013
|
Application #:
|
13472940
|
Filing Dt:
|
05/16/2012
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
Title:
|
SYSTEM AND METHOD FOR CONSERVING BATTERY POWER IN A MOBILE STATION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2014
|
Application #:
|
13489169
|
Filing Dt:
|
06/05/2012
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
Title:
|
METHOD AND APPARATUS FOR DUAL FREQUENCY TIMING ACQUISITION FOR COMPRESSED WCDMA COMMUNICATION NETWORKS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/2015
|
Application #:
|
13492279
|
Filing Dt:
|
06/08/2012
|
Publication #:
|
|
Pub Dt:
|
05/02/2013
| | | | |
Title:
|
Methods and Systems for Pre-Emphasis of an Envelope Tracking Power Amplifier Supply Voltage
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2013
|
Application #:
|
13534538
|
Filing Dt:
|
06/27/2012
|
Publication #:
|
|
Pub Dt:
|
10/25/2012
| | | | |
Title:
|
LOW POWER PROTOCOL FOR WIRELESS TERMINAL PEER-TO-PEER COMMUNICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2013
|
Application #:
|
13544632
|
Filing Dt:
|
07/09/2012
|
Publication #:
|
|
Pub Dt:
|
11/01/2012
| | | | |
Title:
|
A METHOD AND COMPUTER PROGRAM FOR GENERATING GROUNDED SHIELDING WIRES FOR SIGNAL WIRING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2013
|
Application #:
|
13547884
|
Filing Dt:
|
07/12/2012
|
Publication #:
|
|
Pub Dt:
|
11/01/2012
| | | | |
Title:
|
METHOD AND APPARATUS FOR GENERATING MEMORY MODELS AND TIMING DATABASE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2014
|
Application #:
|
13549599
|
Filing Dt:
|
07/16/2012
|
Publication #:
|
|
Pub Dt:
|
11/01/2012
| | | | |
Title:
|
Characterizing Performance of an Electronic System
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13552266
|
Filing Dt:
|
07/18/2012
|
Publication #:
|
|
Pub Dt:
|
11/08/2012
| | | | |
Title:
|
SOLDERING METHOD AND RELATED DEVICE FOR IMPROVED RESISTANCE TO BRITTLE FRACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2013
|
Application #:
|
13588297
|
Filing Dt:
|
08/17/2012
|
Publication #:
|
|
Pub Dt:
|
12/06/2012
| | | | |
Title:
|
METHOD AND SYSTEM FOR INTERFERENCE SUPPRESSION IN WCDMA SYSTEMS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13599549
|
Filing Dt:
|
08/30/2012
|
Publication #:
|
|
Pub Dt:
|
02/28/2013
| | | | |
Title:
|
SYSTEMATIC, NORMALIZED METRIC FOR ANALYZING AND COMPARING OPTIMIZATION TECHNIQUES FOR INTEGRATED CIRCUITS EMPLOYING VOLTAGE SCALING AND INTEGRATED CIRCUITS DESIGNED THEREBY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2013
|
Application #:
|
13627054
|
Filing Dt:
|
09/26/2012
|
Title:
|
CIRCUITS AND METHODS FOR EFFICIENT CLOCK AND DATA DELAY CONFIGURATION FOR FASTER TIMING CLOSURE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2013
|
Application #:
|
13649909
|
Filing Dt:
|
10/11/2012
|
Publication #:
|
|
Pub Dt:
|
02/07/2013
| | | | |
Title:
|
NOVEL MODELING APPROACH FOR TIMING CLOSURE IN HIERARCHICAL DESIGNS LEVERAGING THE SEPARATION OF HORIZONTAL AND VERTICAL ASPECTS OF THE DESIGN FLOW
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
13649996
|
Filing Dt:
|
10/11/2012
|
Publication #:
|
|
Pub Dt:
|
04/25/2013
| | | | |
Title:
|
SYSTEMATIC BENCHMARKING SYSTEM AND METHOD FOR STANDARDIZED DATA CREATION, ANALYSIS AND COMPARISON OF SEMICONDUCTOR TECHNOLOGY NODE CHARACTERISTICS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13656092
|
Filing Dt:
|
10/19/2012
|
Publication #:
|
|
Pub Dt:
|
03/07/2013
| | | | |
Title:
|
ROUTING UNDER BOND PAD FOR THE REPLACEMENT OF AN INTERCONNECT LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2014
|
Application #:
|
13657000
|
Filing Dt:
|
10/22/2012
|
Publication #:
|
|
Pub Dt:
|
02/21/2013
| | | | |
Title:
|
METHOD AND APPARATUS OF CORE TIMING PREDICTION OF CORE LOGIC IN THE CHIP-LEVEL IMPLEMENTATION PROCESS THROUGH AN OVER-CORE WINDOW ON A CHIP-LEVEL ROUTING LAYER
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13658336
|
Filing Dt:
|
10/23/2012
|
Publication #:
|
|
Pub Dt:
|
02/21/2013
| | | | |
Title:
|
Staged Scenario Generation
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2014
|
Application #:
|
13677547
|
Filing Dt:
|
11/15/2012
|
Publication #:
|
|
Pub Dt:
|
03/21/2013
| | | | |
Title:
|
METHOD OF MANUFACTURING AN ELECTRONIC DEVICE PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2014
|
Application #:
|
13681283
|
Filing Dt:
|
11/19/2012
|
Publication #:
|
|
Pub Dt:
|
03/28/2013
| | | | |
Title:
|
IMPLEMENTING AND CHECKING ELECTRONIC CIRCUITS WITH FLEXIBLE RAMPTIME LIMITS AND TOOLS FOR PERFORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/21/2016
|
Application #:
|
13706009
|
Filing Dt:
|
12/05/2012
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
Enhanced Higher Priority Public Land Mobile Network (HPPLMN) Search
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/2015
|
Application #:
|
13722648
|
Filing Dt:
|
12/20/2012
|
Publication #:
|
|
Pub Dt:
|
05/02/2013
| | | | |
Title:
|
Maskless Vortex Phase Shift Optical Direct Write Lithography
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2014
|
Application #:
|
13729881
|
Filing Dt:
|
12/28/2012
|
Publication #:
|
|
Pub Dt:
|
05/23/2013
| | | | |
Title:
|
FEEDBACK OF CHANNEL INFORMATION IN A CLOSED LOOP BEAMFORMING WIRELESS COMMUNICATION SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2013
|
Application #:
|
13752524
|
Filing Dt:
|
01/29/2013
|
Publication #:
|
|
Pub Dt:
|
06/13/2013
| | | | |
Title:
|
SOLDER INTERCONNECT BY ADDITION OF COPPER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2014
|
Application #:
|
13761828
|
Filing Dt:
|
02/07/2013
|
Publication #:
|
|
Pub Dt:
|
06/13/2013
| | | | |
Title:
|
OPTIMIZATION OF LIBRARY SLEW RATIO BASED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/18/2014
|
Application #:
|
13775922
|
Filing Dt:
|
02/25/2013
|
Publication #:
|
|
Pub Dt:
|
07/04/2013
| | | | |
Title:
|
METHOD FOR HEAT DISSIPATION ON SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13781869
|
Filing Dt:
|
03/01/2013
|
Publication #:
|
|
Pub Dt:
|
07/17/2014
| | | | |
Title:
|
CHANNEL TRAFFIC CONGESTION AVOIDANCE IN A MOBILE COMMUNICATION SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2013
|
Application #:
|
13856708
|
Filing Dt:
|
04/04/2013
|
Publication #:
|
|
Pub Dt:
|
08/22/2013
| | | | |
Title:
|
METHOD AND SYSTEM FOR FRAME FORMATS FOR MIMO CHANNEL MEASUREMENT EXCHANGE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/2016
|
Application #:
|
13871742
|
Filing Dt:
|
04/26/2013
|
Publication #:
|
|
Pub Dt:
|
11/28/2013
| | | | |
Title:
|
PHOTOELECTRIC CONVERSION APPARATUS WITH GATE CONTROL LINES AND WIRING AT SAME HEIGHT
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/2015
|
Application #:
|
13921707
|
Filing Dt:
|
06/19/2013
|
Publication #:
|
|
Pub Dt:
|
10/24/2013
| | | | |
Title:
|
STACKED INTERCONNECT HEAT SINK
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/2015
|
Application #:
|
13931136
|
Filing Dt:
|
06/28/2013
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
LOW POWER PROTOCOL FOR WIRELESS TERMINAL PEER-TO-PEER COMMUNICATIONS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13934110
|
Filing Dt:
|
07/02/2013
|
Publication #:
|
|
Pub Dt:
|
01/16/2014
| | | | |
Title:
|
CONTACT SUPPORT PILLAR STRUCTURE FOR FLIP CHIP SEMICONDUCTOR DEVICES AND METHOD OF MANUFACTURE THEREFORE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2016
|
Application #:
|
13947182
|
Filing Dt:
|
07/22/2013
|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
Title:
|
Idle mode power consumption reduction in wireless communications
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2014
|
Application #:
|
13971560
|
Filing Dt:
|
08/20/2013
|
Publication #:
|
|
Pub Dt:
|
12/19/2013
| | | | |
Title:
|
HIERARCHICAL DESIGN FLOW GENERATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2014
|
Application #:
|
14010842
|
Filing Dt:
|
08/27/2013
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
Title:
|
INTELLIGENT TIMING ANALYSIS AND CONSTRAINT GENERATION GUI
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14045081
|
Filing Dt:
|
10/03/2013
|
Publication #:
|
|
Pub Dt:
|
01/30/2014
| | | | |
Title:
|
ALTERNATE PAD STRUCTURES/PASSIVATION INTEGRATION SCHEMES TO REDUCE OR ELIMINATE IMC CRACKING IN POST WIRE BONDED DIES DURING CU/LOW-K BEOL PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/2015
|
Application #:
|
14050922
|
Filing Dt:
|
10/10/2013
|
Publication #:
|
|
Pub Dt:
|
04/16/2015
| | | | |
Title:
|
IQ IMBALANCE ESTIMATION USING BROADCAST SIGNALS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14053194
|
Filing Dt:
|
10/14/2013
|
Publication #:
|
|
Pub Dt:
|
02/06/2014
| | | | |
Title:
|
TOTAL POWER OPTIMIZATION FOR A LOGIC INTEGRATED CIRCUIT
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14057441
|
Filing Dt:
|
10/18/2013
|
Publication #:
|
|
Pub Dt:
|
03/27/2014
| | | | |
Title:
|
CIRCUITS AND METHODS FOR EFFICIENT CLOCK AND DATA DELAY CONFIGURATION FOR FASTER TIMING CLOSURE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/2016
|
Application #:
|
14062554
|
Filing Dt:
|
10/24/2013
|
Publication #:
|
|
Pub Dt:
|
04/30/2015
| | | | |
Title:
|
Adaptive Infinite Impulse Response (IIR)-Based Code Detection for Symbol-Level Equalizer
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14073526
|
Filing Dt:
|
11/06/2013
|
Publication #:
|
|
Pub Dt:
|
03/06/2014
| | | | |
Title:
|
ALLOTROPIC OR MORPHOLOGIC CHANGE IN SILICON INDUCED BY ELECTROMAGNETIC RADIATION FOR RESISTANCE TURNING OF INTEGRATED CIRCUITS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14093189
|
Filing Dt:
|
11/29/2013
|
Publication #:
|
|
Pub Dt:
|
03/27/2014
| | | | |
Title:
|
Circuit Timing Analysis Incorporating the Effects of Temperature Inversion
|
|
|
Patent #:
|
|
Issue Dt:
|
02/16/2016
|
Application #:
|
14094107
|
Filing Dt:
|
12/02/2013
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
Method and Apparatus for Wide Bandwidth Mixed-Mode Wireless Communications
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14232586
|
Filing Dt:
|
04/14/2014
|
Publication #:
|
|
Pub Dt:
|
08/07/2014
| | |
PCT #:
|
IB2012000507
|
Title:
|
FILTERING UNIT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/04/2017
|
Application #:
|
14251258
|
Filing Dt:
|
04/11/2014
|
Publication #:
|
|
Pub Dt:
|
08/07/2014
| | | | |
Title:
|
INTEGRATION OF SHALLOW TRENCH ISOLATION AND THROUGH-SUBSTRATE VIAS INTO INTEGRATED CIRCUIT DESIGNS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14305794
|
Filing Dt:
|
06/16/2014
|
Publication #:
|
|
Pub Dt:
|
10/02/2014
| | | | |
Title:
|
METHODS FOR DESIGNING INTEGRATED CIRCUITS EMPLOYING VOLTAGE SCALING AND INTEGRATED CIRCUITS DESIGNED THEREBY
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14678223
|
Filing Dt:
|
04/03/2015
|
Publication #:
|
|
Pub Dt:
|
07/30/2015
| | | | |
Title:
|
STACKED INTERCONNECT HEAT SINK
|
|