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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:045216/0020   Pages: 334
Recorded: 02/01/2018
Attorney Dkt #:43172.01200
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 3463
Page 6 of 35
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
1
Patent #:
Issue Dt:
02/01/2000
Application #:
08769605
Filing Dt:
12/18/1996
Title:
METHOD OF INTEGRATED CIRCUIT FABRICATION
2
Patent #:
Issue Dt:
11/17/1998
Application #:
08769717
Filing Dt:
12/18/1996
Title:
METHOD OF FORMING PLANARIZED LAYERS IN AN INTEGRATED CIRCUIT
3
Patent #:
Issue Dt:
01/30/2001
Application #:
08770046
Filing Dt:
12/19/1996
Title:
FETS HAVING LIGHTLY DOPED DRAIN REGIONS THAT ARE SHAPED WITH COUNTER AND NONCOUNTER DOPANT ELEMENTS
4
Patent #:
Issue Dt:
10/05/1999
Application #:
08770109
Filing Dt:
12/19/1996
Title:
METHOD OF FORMING RETROGRADE WELL STRUCTURES AND PUNCH-THROUGH BARRIERS USING LOW ENERGY IMPLANTS
5
Patent #:
Issue Dt:
08/22/2000
Application #:
08770535
Filing Dt:
12/20/1996
Title:
METHOD OF MAKING AN ORGANIC THIN FILM TRANSISTOR
6
Patent #:
Issue Dt:
09/29/1998
Application #:
08770872
Filing Dt:
12/20/1996
Title:
STACKED INTEGRATED CHIP PACKAGE AND METHOD OF MAKING SAME
7
Patent #:
Issue Dt:
04/27/1999
Application #:
08771004
Filing Dt:
12/23/1996
Title:
METHOD FOR DETECTING BUS SHORTS IN SEMICONDUCTOR DEVICES
8
Patent #:
Issue Dt:
09/28/1999
Application #:
08771472
Filing Dt:
12/23/1996
Title:
NOVEL METHOD TO IMPROVE UNIFORMITY/PLANARITY ON THE EDGE DIE AND ALSO REMOVE THE TUNGSTEN STRINGERS FROM WAFER CHEMI- MECHANICAL POLISHING
9
Patent #:
Issue Dt:
10/26/1999
Application #:
08771636
Filing Dt:
12/20/1996
Title:
APPARATUS AND METHOD FOR STACKABLE MOLDED LEAD FRAME BALL GRID ARRAY PACKAGING OF INTEGRATED CIRCUITS
10
Patent #:
Issue Dt:
07/07/1998
Application #:
08771955
Filing Dt:
12/23/1996
Title:
USE OF PLASMA ACTIVATED NF3 TO CLEAN SOLDER BUMPS ON A DEVICE
11
Patent #:
Issue Dt:
09/08/1998
Application #:
08772309
Filing Dt:
12/23/1996
Title:
PHOTOMASK INSPECTION METHOD AND INSPECTION TAPE THEREFOR
12
Patent #:
Issue Dt:
06/23/1998
Application #:
08772310
Filing Dt:
12/23/1996
Title:
ON THE USE OF NON-SPHERICAL CARRIERS FOR SUBSTRATE CHEMI-MECHANICAL POLISHING
13
Patent #:
Issue Dt:
10/26/1999
Application #:
08772400
Filing Dt:
12/23/1996
Title:
INTERMEDIATE TEST FILE CONVERSION AND COMPARISION
14
Patent #:
Issue Dt:
11/30/1999
Application #:
08773469
Filing Dt:
12/23/1996
Title:
METHOD FOR CAPTURING ASIC I/O PIN DATA FOR TESTER COMPATIBILITY ANALYSIS
15
Patent #:
Issue Dt:
10/05/1999
Application #:
08773471
Filing Dt:
12/23/1996
Title:
METHOD FOR TUNGSTEN NUCLEATION FROM WF6 USING TITANIUM AS A REDUCING AGENT
16
Patent #:
Issue Dt:
11/02/1999
Application #:
08774036
Filing Dt:
12/27/1996
Title:
METHOD FOR BI-LAYER PROGRAMMABLE RESISTOR
17
Patent #:
Issue Dt:
07/21/1998
Application #:
08774281
Filing Dt:
12/20/1996
Title:
METHOD FOR ESTIMATING ROUTABILITY AND CONGESTION IN A CELL PLACEMENT FOR INTEGRATED CIRCUIT CHIP
18
Patent #:
Issue Dt:
01/25/2000
Application #:
08775490
Filing Dt:
12/31/1996
Title:
INTEGRATED CIRCUIT WITH TWIN TUB
19
Patent #:
Issue Dt:
09/28/1999
Application #:
08775790
Filing Dt:
12/31/1996
Title:
METHOD OF MAKING A DIELECTRIC FOR AN INTERGRATED CIRCUIT
20
Patent #:
Issue Dt:
11/03/1998
Application #:
08777008
Filing Dt:
01/07/1997
Title:
RESIST MATERIALS
21
Patent #:
Issue Dt:
01/25/2000
Application #:
08778123
Filing Dt:
01/02/1997
Title:
LINEARIZATION OF RESISTANCE
22
Patent #:
Issue Dt:
07/28/1998
Application #:
08778909
Filing Dt:
01/03/1997
Title:
METHOD OF MOUNTING A FLIP-CHIP
23
Patent #:
Issue Dt:
03/23/1999
Application #:
08779628
Filing Dt:
01/07/1997
Title:
FLIP-FLOP FOR SCAN TEST CHAIN
24
Patent #:
Issue Dt:
04/07/1998
Application #:
08781992
Filing Dt:
01/06/1997
Title:
POLYMORPHIC RECTILINEAR THIEVING PAD
25
Patent #:
Issue Dt:
11/28/2000
Application #:
08782010
Filing Dt:
01/07/1997
Title:
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES HAVING IMPROVED POLYCIDE INTEGRITY THROUGH INTRODUCTION OF A SILICON LAYER WITHIN THE POLYCIDE STRUCTURE
26
Patent #:
Issue Dt:
03/27/2001
Application #:
08782355
Filing Dt:
01/13/1997
Title:
METHOD AND APPARATUS FOR ENHANCING TRANSMITTER CIRCUIT EFFICIENCY OF MOBILE RADIO UNITS BY SELECTABLE SWITCHING OF POWER AMPLIFIER
27
Patent #:
Issue Dt:
04/27/1999
Application #:
08782585
Filing Dt:
01/13/1997
Title:
INTEGRATED CIRCUIT DEVICE HAVING A SWITCHED ROUTING NETWORK
28
Patent #:
Issue Dt:
02/09/1999
Application #:
08786695
Filing Dt:
01/22/1997
Title:
SIMPLIFIED HOLE INTERCONNECT PROCESS
29
Patent #:
Issue Dt:
01/04/2000
Application #:
08787992
Filing Dt:
01/23/1997
Title:
PROCESS FOR FORMING METAL SILICIDE CONTACTS USING AMORPHIZATION OF EXPOSED SILICON WHILE MINIMIZING DEVICE DEGRADATION
30
Patent #:
Issue Dt:
04/14/1998
Application #:
08788403
Filing Dt:
01/27/1997
Title:
OXIDE FORMED IN SEMICONDUCTOR SUBSTRATE BY IMPLANTATION OF SUBSTRATE WITH A NOBLE GAS PRIOR TO OXIDATION
31
Patent #:
Issue Dt:
11/30/1999
Application #:
08789353
Filing Dt:
01/27/1997
Title:
METHOD AND APPARATUS FOR EFFICIENT DESIGN AND ANALYSIS OF INTEGRATED CIRCUITS USING MULTIPLE TIME SCALES
32
Patent #:
Issue Dt:
12/23/1997
Application #:
08789892
Filing Dt:
01/29/1997
Title:
APPARATUS AND METHOD FOR MAKING INTEGRATED CIRCUITS
33
Patent #:
Issue Dt:
09/12/2000
Application #:
08791244
Filing Dt:
01/30/1997
Title:
METHOD OF FABRICATING INSULATED-GATE FILED-EFFECT TRANSISTORS HAVING DIFFERENT GATE CAPACITANCES
34
Patent #:
Issue Dt:
07/14/1998
Application #:
08791283
Filing Dt:
01/30/1997
Title:
MOSFET DEVICE WITH IMPROVED LDD REGION AND METHOD OF MAKING SAME
35
Patent #:
Issue Dt:
06/30/1998
Application #:
08792479
Filing Dt:
01/31/1997
Title:
MICROELECTRONIC CIRCUIT INCLUDING SILICIDED FIELD-EFFECT TRANSISTOR ELEMENTS THAT BIFUNCTION AS INTERCONNECTS
36
Patent #:
Issue Dt:
09/08/1998
Application #:
08796945
Filing Dt:
02/07/1997
Title:
MULTISTEP TUNGSTEN CVD PROCESS WITH AMORPHIZATION STEP
37
Patent #:
Issue Dt:
08/17/1999
Application #:
08798327
Filing Dt:
02/10/1997
Title:
FIELD-EFFECT PHOTO-TRANSISTOR
38
Patent #:
Issue Dt:
06/16/1998
Application #:
08798580
Filing Dt:
02/10/1997
Title:
APPARATUS AND METHOD FOR MEASURING THE ORIENTATION OF A SINGLE CRYSTAL SURFACE
39
Patent #:
Issue Dt:
05/23/2000
Application #:
08798598
Filing Dt:
02/11/1997
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM
40
Patent #:
Issue Dt:
01/12/1999
Application #:
08798648
Filing Dt:
02/11/1997
Title:
EFFICIENT MULTIPROCESSING FOR CELL PLACEMENT OF INTEGRATED CIRCUITS
41
Patent #:
Issue Dt:
04/27/1999
Application #:
08798652
Filing Dt:
02/11/1997
Title:
INTEGRATED CIRCUIT FLOOR PLAN OPTIMIZATION SYSTEM
42
Patent #:
Issue Dt:
02/23/1999
Application #:
08798653
Filing Dt:
02/11/1997
Title:
INTEGRATED CIRCUIT CELL PLACEMENT PARALLELIZATION WITH MINIMAL NUMBER OF CONFLICTS
43
Patent #:
Issue Dt:
07/27/1999
Application #:
08798880
Filing Dt:
02/11/1997
Title:
PARALLEL PROCESSOR IMPLEMENTATION OF NET ROUTING
44
Patent #:
Issue Dt:
01/12/1999
Application #:
08801668
Filing Dt:
02/18/1997
Title:
USE OF MEV IMPLANTATION TO FORM VERTICALLY MODULATED N+ BURIED LAYER IN AN NPN BIPOLAR TRANSISTOR
45
Patent #:
Issue Dt:
07/14/1998
Application #:
08803474
Filing Dt:
02/20/1997
Title:
CLEANING SOLDER-BONDED FLIP-CHIP ASSEMBLIES
46
Patent #:
Issue Dt:
12/01/1998
Application #:
08803703
Filing Dt:
02/21/1997
Title:
ENERGY-SENSITIVE RESIST MATERIAL AND A PROCESS FOR DEVICE FABRICATION USING AN ENERGY-SENSITIVE RESIST MATERIAL
47
Patent #:
Issue Dt:
05/11/1999
Application #:
08804782
Filing Dt:
02/24/1997
Title:
GAAS-BASED MOSFET, AND METHOD OF MAKING SAME
48
Patent #:
Issue Dt:
08/14/2001
Application #:
08805404
Filing Dt:
02/24/1997
Title:
SHADOW MASK DEPOSITION
49
Patent #:
Issue Dt:
01/19/1999
Application #:
08807209
Filing Dt:
02/28/1997
Title:
FIELD EFFECT DEVICES AND CAPACITORS WITH IMPROVED THIN FILM DIELECTRICS AND METHOD FOR MAKING SAME
50
Patent #:
Issue Dt:
05/26/1998
Application #:
08807310
Filing Dt:
02/27/1997
Title:
MECHANISM FOR CHANGING A PROBE BALANCE BEAM IN A SCANNING PROBE MICROSCOPE
51
Patent #:
Issue Dt:
08/04/1998
Application #:
08811818
Filing Dt:
03/04/1997
Title:
METHOD FOR ELIMINATING PEELING AT END EDGE OF SEMICONDUCTOR SUBSTRATE IN METAL ORGANIC CHEMICAL VAPOR DEPOSITION OF TITANIUM NITRIDE
52
Patent #:
Issue Dt:
07/10/2001
Application #:
08813340
Filing Dt:
03/07/1997
Title:
METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT USING PREDEFINED AND PREVERIFIED CORE MODULES HAVING A PLURALITY OF MATCHED CLOCK INPUTS
53
Patent #:
Issue Dt:
03/09/1999
Application #:
08813732
Filing Dt:
03/07/1997
Title:
ENERGY-SENSITIVE RESIST MATERIAL AND A PROCESS FOR DEVICE FABRICATION USING AN ENERGY-SENSITIVE RESIST MATERIAL
54
Patent #:
Issue Dt:
08/10/1999
Application #:
08814051
Filing Dt:
03/06/1997
Title:
THIN FILM TANTALUM OXIDE CAPACITORS AND RESULTING PRODUCT
55
Patent #:
Issue Dt:
08/17/1999
Application #:
08814670
Filing Dt:
03/11/1997
Title:
METHOD FOR FORMING A HIGH QUALITY ULTRATHIN GATE OXIDE LAYER
56
Patent #:
Issue Dt:
08/11/1998
Application #:
08814817
Filing Dt:
03/11/1997
Title:
SUBSTRATE ISOLATION FOR ANALOG/DIGITAL IC CHIPS
57
Patent #:
Issue Dt:
01/12/1999
Application #:
08816185
Filing Dt:
03/12/1997
Title:
INTEGRATED CIRCUIT HAVING AMORPHOOUS SILICIDE LAYER IN CONTACTS AND VIAS AND METHOD OF MANUFACTURE THEREOF
58
Patent #:
Issue Dt:
09/14/1999
Application #:
08818640
Filing Dt:
03/14/1997
Title:
YIELD IMPROVEMENT TECHNIQUES THROUGH LAYOUT OPTIMIZATION
59
Patent #:
Issue Dt:
04/27/1999
Application #:
08818813
Filing Dt:
03/14/1997
Title:
METHOD FOR FORMING INTEGRATED COMPOSITE SEMICONDUCTOR DEVICES
60
Patent #:
Issue Dt:
09/28/1999
Application #:
08819299
Filing Dt:
03/18/1997
Title:
SEMICONDUCTOR DIE HAVING ON-DIE DE-COUPLING CAPACITANCE
61
Patent #:
Issue Dt:
01/11/2000
Application #:
08819828
Filing Dt:
03/18/1997
Title:
SEMICONDUCTOR STRUCTURE FOR THERMAL SHUTDOWN PROTECTION
62
Patent #:
Issue Dt:
11/03/1998
Application #:
08819856
Filing Dt:
03/17/1997
Title:
METHOD AND APPARATUS FOR SCAN CHAIN WITH REDUCED DELAY PENALTY
63
Patent #:
Issue Dt:
06/15/1999
Application #:
08820063
Filing Dt:
03/18/1997
Title:
SEMICONDUCTOR DEVICE HAVING ALUMINUM CONTACTS OR VIAS AND METHOD OF MANUFACTURE THEREFOR
64
Patent #:
Issue Dt:
01/19/1999
Application #:
08822078
Filing Dt:
03/20/1997
Title:
POLISHING COMPOSITION FOR CMP OPERATIONS
65
Patent #:
Issue Dt:
04/03/2001
Application #:
08823305
Filing Dt:
03/21/1997
Title:
TUNABLE DIELECTRIC CONSTANT OXIDE AND METHOD OF MANUFACTURE
66
Patent #:
Issue Dt:
10/06/1998
Application #:
08823829
Filing Dt:
03/25/1997
Title:
PRODUCT RESULTING FROM SELECTIVE DEPOSITION OF POLYSILICON OVER SINGLE CRYSTAL SILICON SUBSTRATE
67
Patent #:
Issue Dt:
11/02/1999
Application #:
08824574
Filing Dt:
03/26/1997
Title:
APPARATUS FOR VISUALLY READING SEMICONDUCTOR WAFER IDENTIFICATION INDICIA
68
Patent #:
Issue Dt:
05/18/1999
Application #:
08825923
Filing Dt:
04/02/1997
Title:
FLIP CHIP METALLIZATION
69
Patent #:
Issue Dt:
07/21/1998
Application #:
08826606
Filing Dt:
04/03/1997
Title:
COMPLIANT BUMP TECHNOLOGY
70
Patent #:
Issue Dt:
09/21/1999
Application #:
08828155
Filing Dt:
03/27/1997
Title:
PROCESS FOR PRODUCING MULTI-LEVEL METALLIZATION IN AN INTEGRATED CIRCUIT
71
Patent #:
Issue Dt:
11/02/1999
Application #:
08829520
Filing Dt:
03/28/1997
Title:
HIGH DENSITY GATE ARRAY CELL ARCHITECTURE WITH SHARING OF WELL TAPS BETWEEN CELLS
72
Patent #:
Issue Dt:
07/14/1998
Application #:
08832245
Filing Dt:
04/03/1997
Title:
PROCESS FOR FABRICATING A MODERATE-DEPTH DIFFUSED EMITTER BIPOLAR TRANSISTOR IN A BICMOS DEVICE WITHOUT USING AN ADDITIONAL MASK
73
Patent #:
Issue Dt:
02/02/1999
Application #:
08832487
Filing Dt:
04/02/1997
Title:
EFFICIENT FREQUENCY DOMAIN ANALYSIS OF LARGE NONLINEAR ANALOG CIRCUITS USING COMPRESSED MATRIX STORAGE
74
Patent #:
Issue Dt:
05/11/1999
Application #:
08833597
Filing Dt:
04/07/1997
Title:
PROCESS FOR FORMING IMPROVED COBALT SILICIDE LAYER ON INTEGRATED CIRCUIT STRUCTURE USING TWO CAPPING LAYERS
75
Patent #:
Issue Dt:
05/11/1999
Application #:
08834261
Filing Dt:
04/15/1997
Title:
SYSTEMS AND METHODS FOR DETERMINING SEMICONDUCTOR WAFER TEMPERATURE AND CALIBRATING A VAPOR DEPOSITION DEVICE
76
Patent #:
Issue Dt:
11/24/1998
Application #:
08837530
Filing Dt:
04/21/1997
Title:
BALL GRID ARRAY PACKAGE EMPLOYING RAISED METAL CONTACT RINGS
77
Patent #:
Issue Dt:
07/07/1998
Application #:
08837570
Filing Dt:
04/21/1997
Title:
LOW PROFILE VARIABLE WIDTH INPUT/OUTPUT CELLS
78
Patent #:
Issue Dt:
07/13/1999
Application #:
08837618
Filing Dt:
04/21/1997
Title:
SEMICONDUCTOR DIE HAVING SACRIFICIAL BOND PADS FOR DIE TEST
79
Patent #:
Issue Dt:
11/24/1998
Application #:
08837685
Filing Dt:
04/21/1997
Title:
BALL GRID ARRAY PACKAGE EMPLOYING SOLID CORE SOLDER BALLS
80
Patent #:
Issue Dt:
08/28/2001
Application #:
08838536
Filing Dt:
04/09/1997
Title:
CIRCUIT AND METHOD FOR PROVIDING INTERCONNECTIONS AMONG INDIVIDUAL INTEGRATED CIRCUIT CHIPS IN A MULTI- CHIP MODULE
81
Patent #:
Issue Dt:
08/10/1999
Application #:
08839103
Filing Dt:
04/23/1997
Title:
GATE ARRAY LAYOUT TO ACCOMMODATE MULTI ANGLE ION IMPLANTATION
82
Patent #:
Issue Dt:
03/06/2001
Application #:
08840948
Filing Dt:
04/21/1997
Title:
CAPACITORS WITH SILICIZED POLYSILICON SHIELDING IN DIGITAL CMOS PROCESS
83
Patent #:
Issue Dt:
12/01/1998
Application #:
08841298
Filing Dt:
04/29/1997
Title:
SYSTEMS AND METHODS FOR DETERMINING CHARACTERISTICS OF A SINGULAR CIRCUIT
84
Patent #:
Issue Dt:
11/23/1999
Application #:
08841947
Filing Dt:
04/08/1997
Title:
PRE-CONDITIONING POLISHING PADS FOR CHEMICAL-MECHANICAL POLISHING
85
Patent #:
Issue Dt:
05/02/2000
Application #:
08842379
Filing Dt:
04/23/1997
Title:
HIGH POWER DISSIPATING TAPE BALL GRID ARRAY PACKAGE
86
Patent #:
Issue Dt:
04/20/1999
Application #:
08843427
Filing Dt:
04/15/1997
Title:
FAULT SIMULATOR FOR DIGITAL CIRCUITRY
87
Patent #:
Issue Dt:
11/02/1999
Application #:
08845696
Filing Dt:
04/25/1997
Title:
STIFFENER WITH SLOTS FOR CLIP-ON HEAT SINK ATTACHMENT
88
Patent #:
Issue Dt:
07/27/1999
Application #:
08845963
Filing Dt:
04/30/1997
Title:
SYSTEMS AND METHODS FOR TESTING AND MANUFACTURING LARGE-SCALE TRANSISTOR -BASED NONLINEAR CIRCUITS
89
Patent #:
Issue Dt:
08/24/1999
Application #:
08846769
Filing Dt:
04/30/1997
Title:
PHOTOSENSING DEVICE WITH IMPROVED SPECTRAL RESPONSE AND LOW TRERMAL LEAKAGE
90
Patent #:
Issue Dt:
10/19/1999
Application #:
08846967
Filing Dt:
04/29/1997
Title:
INTEGRATED PHOTOSENSING DEVICE FOR ACTIVE PIXEL SENSOR IMAGERS
91
Patent #:
Issue Dt:
02/08/2000
Application #:
08847704
Filing Dt:
04/28/1997
Title:
DEUTERATED DIELECTRIC AND POLYSILICON FILM-BASED SEMICONDUCTOR DEVICES AND METHOD OF MANUFACTURE THEREOF
92
Patent #:
Issue Dt:
02/15/2000
Application #:
08848109
Filing Dt:
04/28/1997
Title:
USE OF SID4 FOR DEPOSITION OF ULTRA THIN AND CONTROLLABLE OXIDES
93
Patent #:
Issue Dt:
11/09/1999
Application #:
08848113
Filing Dt:
04/28/1997
Title:
DEUTERATED BIPOLAR TRANSISTOR AND METHOD OF MANUFACTURE THEREOF
94
Patent #:
Issue Dt:
04/25/2000
Application #:
08848141
Filing Dt:
04/28/1997
Title:
COMPLEMENTARY FIELD EFFECT DEVICES FOR ELIMINATING OR REDUCING DIODE EFFECT
95
Patent #:
Issue Dt:
08/17/1999
Application #:
08850076
Filing Dt:
05/02/1997
Title:
STIFFENER WITH INTEGRATED HEAT SINK ATTACHMENT
96
Patent #:
Issue Dt:
01/04/2000
Application #:
08850292
Filing Dt:
05/05/1997
Title:
STIFFENER RING ATTACHMENT WITH HOLES AND REMOVABLE SNAP-IN HEAT SINK OR HEATSPREADER/LID
97
Patent #:
Issue Dt:
04/27/1999
Application #:
08851607
Filing Dt:
05/05/1997
Title:
METHOD OF USING A TEST RETICLE TO OPTIMIZE ALIGNMENT OF INTEGRATED CIRCUIT PROCESS LAYERS
98
Patent #:
Issue Dt:
12/29/1998
Application #:
08851846
Filing Dt:
05/06/1997
Title:
GAS CONTROL TECHNIQUE FOR LIMITING SURGING OF GAS INTO A CVD CHAMBER
99
Patent #:
Issue Dt:
10/26/1999
Application #:
08852597
Filing Dt:
05/07/1997
Title:
PBGA STIFFENER PACKAGE
100
Patent #:
Issue Dt:
09/12/2000
Application #:
08853154
Filing Dt:
05/08/1997
Title:
MISREGISTRATION FIDUTIAL
Assignors
1
Exec Dt:
01/24/2018
2
Exec Dt:
01/24/2018
3
Exec Dt:
01/24/2018
Assignee
1
225 W. WASHINGTON ST., 9TH FLOOR
CHICAGO, ILLINOIS 60606
Correspondence name and address
JAVIER J. RAMOS
1850 K STREET, NW, SUITE 1100
MILBANK, TWEED, HADLEY & MCCLOY, LLP
WASHINGTON, DC 20006

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