|
|
Patent #:
|
|
Issue Dt:
|
02/01/2000
|
Application #:
|
08769605
|
Filing Dt:
|
12/18/1996
|
Title:
|
METHOD OF INTEGRATED CIRCUIT FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/1998
|
Application #:
|
08769717
|
Filing Dt:
|
12/18/1996
|
Title:
|
METHOD OF FORMING PLANARIZED LAYERS IN AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/30/2001
|
Application #:
|
08770046
|
Filing Dt:
|
12/19/1996
|
Title:
|
FETS HAVING LIGHTLY DOPED DRAIN REGIONS THAT ARE SHAPED WITH COUNTER AND NONCOUNTER DOPANT ELEMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/1999
|
Application #:
|
08770109
|
Filing Dt:
|
12/19/1996
|
Title:
|
METHOD OF FORMING RETROGRADE WELL STRUCTURES AND PUNCH-THROUGH BARRIERS USING LOW ENERGY IMPLANTS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/2000
|
Application #:
|
08770535
|
Filing Dt:
|
12/20/1996
|
Title:
|
METHOD OF MAKING AN ORGANIC THIN FILM TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/29/1998
|
Application #:
|
08770872
|
Filing Dt:
|
12/20/1996
|
Title:
|
STACKED INTEGRATED CHIP PACKAGE AND METHOD OF MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/1999
|
Application #:
|
08771004
|
Filing Dt:
|
12/23/1996
|
Title:
|
METHOD FOR DETECTING BUS SHORTS IN SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/1999
|
Application #:
|
08771472
|
Filing Dt:
|
12/23/1996
|
Title:
|
NOVEL METHOD TO IMPROVE UNIFORMITY/PLANARITY ON THE EDGE DIE AND ALSO REMOVE THE TUNGSTEN STRINGERS FROM WAFER CHEMI- MECHANICAL POLISHING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/1999
|
Application #:
|
08771636
|
Filing Dt:
|
12/20/1996
|
Title:
|
APPARATUS AND METHOD FOR STACKABLE MOLDED LEAD FRAME BALL GRID ARRAY PACKAGING OF INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/1998
|
Application #:
|
08771955
|
Filing Dt:
|
12/23/1996
|
Title:
|
USE OF PLASMA ACTIVATED NF3 TO CLEAN SOLDER BUMPS ON A DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/1998
|
Application #:
|
08772309
|
Filing Dt:
|
12/23/1996
|
Title:
|
PHOTOMASK INSPECTION METHOD AND INSPECTION TAPE THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/1998
|
Application #:
|
08772310
|
Filing Dt:
|
12/23/1996
|
Title:
|
ON THE USE OF NON-SPHERICAL CARRIERS FOR SUBSTRATE CHEMI-MECHANICAL POLISHING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/1999
|
Application #:
|
08772400
|
Filing Dt:
|
12/23/1996
|
Title:
|
INTERMEDIATE TEST FILE CONVERSION AND COMPARISION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/1999
|
Application #:
|
08773469
|
Filing Dt:
|
12/23/1996
|
Title:
|
METHOD FOR CAPTURING ASIC I/O PIN DATA FOR TESTER COMPATIBILITY ANALYSIS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/1999
|
Application #:
|
08773471
|
Filing Dt:
|
12/23/1996
|
Title:
|
METHOD FOR TUNGSTEN NUCLEATION FROM WF6 USING TITANIUM AS A REDUCING AGENT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08774036
|
Filing Dt:
|
12/27/1996
|
Title:
|
METHOD FOR BI-LAYER PROGRAMMABLE RESISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/1998
|
Application #:
|
08774281
|
Filing Dt:
|
12/20/1996
|
Title:
|
METHOD FOR ESTIMATING ROUTABILITY AND CONGESTION IN A CELL PLACEMENT FOR INTEGRATED CIRCUIT CHIP
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2000
|
Application #:
|
08775490
|
Filing Dt:
|
12/31/1996
|
Title:
|
INTEGRATED CIRCUIT WITH TWIN TUB
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/1999
|
Application #:
|
08775790
|
Filing Dt:
|
12/31/1996
|
Title:
|
METHOD OF MAKING A DIELECTRIC FOR AN INTERGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/1998
|
Application #:
|
08777008
|
Filing Dt:
|
01/07/1997
|
Title:
|
RESIST MATERIALS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2000
|
Application #:
|
08778123
|
Filing Dt:
|
01/02/1997
|
Title:
|
LINEARIZATION OF RESISTANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/1998
|
Application #:
|
08778909
|
Filing Dt:
|
01/03/1997
|
Title:
|
METHOD OF MOUNTING A FLIP-CHIP
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/1999
|
Application #:
|
08779628
|
Filing Dt:
|
01/07/1997
|
Title:
|
FLIP-FLOP FOR SCAN TEST CHAIN
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/1998
|
Application #:
|
08781992
|
Filing Dt:
|
01/06/1997
|
Title:
|
POLYMORPHIC RECTILINEAR THIEVING PAD
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2000
|
Application #:
|
08782010
|
Filing Dt:
|
01/07/1997
|
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES HAVING IMPROVED POLYCIDE INTEGRITY THROUGH INTRODUCTION OF A SILICON LAYER WITHIN THE POLYCIDE STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2001
|
Application #:
|
08782355
|
Filing Dt:
|
01/13/1997
|
Title:
|
METHOD AND APPARATUS FOR ENHANCING TRANSMITTER CIRCUIT EFFICIENCY OF MOBILE RADIO UNITS BY SELECTABLE SWITCHING OF POWER AMPLIFIER
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/1999
|
Application #:
|
08782585
|
Filing Dt:
|
01/13/1997
|
Title:
|
INTEGRATED CIRCUIT DEVICE HAVING A SWITCHED ROUTING NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/1999
|
Application #:
|
08786695
|
Filing Dt:
|
01/22/1997
|
Title:
|
SIMPLIFIED HOLE INTERCONNECT PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2000
|
Application #:
|
08787992
|
Filing Dt:
|
01/23/1997
|
Title:
|
PROCESS FOR FORMING METAL SILICIDE CONTACTS USING AMORPHIZATION OF EXPOSED SILICON WHILE MINIMIZING DEVICE DEGRADATION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/1998
|
Application #:
|
08788403
|
Filing Dt:
|
01/27/1997
|
Title:
|
OXIDE FORMED IN SEMICONDUCTOR SUBSTRATE BY IMPLANTATION OF SUBSTRATE WITH A NOBLE GAS PRIOR TO OXIDATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/1999
|
Application #:
|
08789353
|
Filing Dt:
|
01/27/1997
|
Title:
|
METHOD AND APPARATUS FOR EFFICIENT DESIGN AND ANALYSIS OF INTEGRATED CIRCUITS USING MULTIPLE TIME SCALES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/1997
|
Application #:
|
08789892
|
Filing Dt:
|
01/29/1997
|
Title:
|
APPARATUS AND METHOD FOR MAKING INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2000
|
Application #:
|
08791244
|
Filing Dt:
|
01/30/1997
|
Title:
|
METHOD OF FABRICATING INSULATED-GATE FILED-EFFECT TRANSISTORS HAVING DIFFERENT GATE CAPACITANCES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08791283
|
Filing Dt:
|
01/30/1997
|
Title:
|
MOSFET DEVICE WITH IMPROVED LDD REGION AND METHOD OF MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/30/1998
|
Application #:
|
08792479
|
Filing Dt:
|
01/31/1997
|
Title:
|
MICROELECTRONIC CIRCUIT INCLUDING SILICIDED FIELD-EFFECT TRANSISTOR ELEMENTS THAT BIFUNCTION AS INTERCONNECTS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/1998
|
Application #:
|
08796945
|
Filing Dt:
|
02/07/1997
|
Title:
|
MULTISTEP TUNGSTEN CVD PROCESS WITH AMORPHIZATION STEP
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/1999
|
Application #:
|
08798327
|
Filing Dt:
|
02/10/1997
|
Title:
|
FIELD-EFFECT PHOTO-TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/1998
|
Application #:
|
08798580
|
Filing Dt:
|
02/10/1997
|
Title:
|
APPARATUS AND METHOD FOR MEASURING THE ORIENTATION OF A SINGLE CRYSTAL SURFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/23/2000
|
Application #:
|
08798598
|
Filing Dt:
|
02/11/1997
|
Title:
|
ADVANCED MODULAR CELL PLACEMENT SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/1999
|
Application #:
|
08798648
|
Filing Dt:
|
02/11/1997
|
Title:
|
EFFICIENT MULTIPROCESSING FOR CELL PLACEMENT OF INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/1999
|
Application #:
|
08798652
|
Filing Dt:
|
02/11/1997
|
Title:
|
INTEGRATED CIRCUIT FLOOR PLAN OPTIMIZATION SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/1999
|
Application #:
|
08798653
|
Filing Dt:
|
02/11/1997
|
Title:
|
INTEGRATED CIRCUIT CELL PLACEMENT PARALLELIZATION WITH MINIMAL NUMBER OF CONFLICTS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/1999
|
Application #:
|
08798880
|
Filing Dt:
|
02/11/1997
|
Title:
|
PARALLEL PROCESSOR IMPLEMENTATION OF NET ROUTING
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/1999
|
Application #:
|
08801668
|
Filing Dt:
|
02/18/1997
|
Title:
|
USE OF MEV IMPLANTATION TO FORM VERTICALLY MODULATED N+ BURIED LAYER IN AN NPN BIPOLAR TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08803474
|
Filing Dt:
|
02/20/1997
|
Title:
|
CLEANING SOLDER-BONDED FLIP-CHIP ASSEMBLIES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/1998
|
Application #:
|
08803703
|
Filing Dt:
|
02/21/1997
|
Title:
|
ENERGY-SENSITIVE RESIST MATERIAL AND A PROCESS FOR DEVICE FABRICATION USING AN ENERGY-SENSITIVE RESIST MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/1999
|
Application #:
|
08804782
|
Filing Dt:
|
02/24/1997
|
Title:
|
GAAS-BASED MOSFET, AND METHOD OF MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2001
|
Application #:
|
08805404
|
Filing Dt:
|
02/24/1997
|
Title:
|
SHADOW MASK DEPOSITION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/1999
|
Application #:
|
08807209
|
Filing Dt:
|
02/28/1997
|
Title:
|
FIELD EFFECT DEVICES AND CAPACITORS WITH IMPROVED THIN FILM DIELECTRICS AND METHOD FOR MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/1998
|
Application #:
|
08807310
|
Filing Dt:
|
02/27/1997
|
Title:
|
MECHANISM FOR CHANGING A PROBE BALANCE BEAM IN A SCANNING PROBE MICROSCOPE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/04/1998
|
Application #:
|
08811818
|
Filing Dt:
|
03/04/1997
|
Title:
|
METHOD FOR ELIMINATING PEELING AT END EDGE OF SEMICONDUCTOR SUBSTRATE IN METAL ORGANIC CHEMICAL VAPOR DEPOSITION OF TITANIUM NITRIDE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/2001
|
Application #:
|
08813340
|
Filing Dt:
|
03/07/1997
|
Title:
|
METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT USING PREDEFINED AND PREVERIFIED CORE MODULES HAVING A PLURALITY OF MATCHED CLOCK INPUTS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/1999
|
Application #:
|
08813732
|
Filing Dt:
|
03/07/1997
|
Title:
|
ENERGY-SENSITIVE RESIST MATERIAL AND A PROCESS FOR DEVICE FABRICATION USING AN ENERGY-SENSITIVE RESIST MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/1999
|
Application #:
|
08814051
|
Filing Dt:
|
03/06/1997
|
Title:
|
THIN FILM TANTALUM OXIDE CAPACITORS AND RESULTING PRODUCT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/1999
|
Application #:
|
08814670
|
Filing Dt:
|
03/11/1997
|
Title:
|
METHOD FOR FORMING A HIGH QUALITY ULTRATHIN GATE OXIDE LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/1998
|
Application #:
|
08814817
|
Filing Dt:
|
03/11/1997
|
Title:
|
SUBSTRATE ISOLATION FOR ANALOG/DIGITAL IC CHIPS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/1999
|
Application #:
|
08816185
|
Filing Dt:
|
03/12/1997
|
Title:
|
INTEGRATED CIRCUIT HAVING AMORPHOOUS SILICIDE LAYER IN CONTACTS AND VIAS AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1999
|
Application #:
|
08818640
|
Filing Dt:
|
03/14/1997
|
Title:
|
YIELD IMPROVEMENT TECHNIQUES THROUGH LAYOUT OPTIMIZATION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/1999
|
Application #:
|
08818813
|
Filing Dt:
|
03/14/1997
|
Title:
|
METHOD FOR FORMING INTEGRATED COMPOSITE SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/1999
|
Application #:
|
08819299
|
Filing Dt:
|
03/18/1997
|
Title:
|
SEMICONDUCTOR DIE HAVING ON-DIE DE-COUPLING CAPACITANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2000
|
Application #:
|
08819828
|
Filing Dt:
|
03/18/1997
|
Title:
|
SEMICONDUCTOR STRUCTURE FOR THERMAL SHUTDOWN PROTECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/1998
|
Application #:
|
08819856
|
Filing Dt:
|
03/17/1997
|
Title:
|
METHOD AND APPARATUS FOR SCAN CHAIN WITH REDUCED DELAY PENALTY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/1999
|
Application #:
|
08820063
|
Filing Dt:
|
03/18/1997
|
Title:
|
SEMICONDUCTOR DEVICE HAVING ALUMINUM CONTACTS OR VIAS AND METHOD OF MANUFACTURE THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/1999
|
Application #:
|
08822078
|
Filing Dt:
|
03/20/1997
|
Title:
|
POLISHING COMPOSITION FOR CMP OPERATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2001
|
Application #:
|
08823305
|
Filing Dt:
|
03/21/1997
|
Title:
|
TUNABLE DIELECTRIC CONSTANT OXIDE AND METHOD OF MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/1998
|
Application #:
|
08823829
|
Filing Dt:
|
03/25/1997
|
Title:
|
PRODUCT RESULTING FROM SELECTIVE DEPOSITION OF POLYSILICON OVER SINGLE CRYSTAL SILICON SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08824574
|
Filing Dt:
|
03/26/1997
|
Title:
|
APPARATUS FOR VISUALLY READING SEMICONDUCTOR WAFER IDENTIFICATION INDICIA
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/1999
|
Application #:
|
08825923
|
Filing Dt:
|
04/02/1997
|
Title:
|
FLIP CHIP METALLIZATION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/1998
|
Application #:
|
08826606
|
Filing Dt:
|
04/03/1997
|
Title:
|
COMPLIANT BUMP TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/1999
|
Application #:
|
08828155
|
Filing Dt:
|
03/27/1997
|
Title:
|
PROCESS FOR PRODUCING MULTI-LEVEL METALLIZATION IN AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08829520
|
Filing Dt:
|
03/28/1997
|
Title:
|
HIGH DENSITY GATE ARRAY CELL ARCHITECTURE WITH SHARING OF WELL TAPS BETWEEN CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08832245
|
Filing Dt:
|
04/03/1997
|
Title:
|
PROCESS FOR FABRICATING A MODERATE-DEPTH DIFFUSED EMITTER BIPOLAR TRANSISTOR IN A BICMOS DEVICE WITHOUT USING AN ADDITIONAL MASK
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/1999
|
Application #:
|
08832487
|
Filing Dt:
|
04/02/1997
|
Title:
|
EFFICIENT FREQUENCY DOMAIN ANALYSIS OF LARGE NONLINEAR ANALOG CIRCUITS USING COMPRESSED MATRIX STORAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/1999
|
Application #:
|
08833597
|
Filing Dt:
|
04/07/1997
|
Title:
|
PROCESS FOR FORMING IMPROVED COBALT SILICIDE LAYER ON INTEGRATED CIRCUIT STRUCTURE USING TWO CAPPING LAYERS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/1999
|
Application #:
|
08834261
|
Filing Dt:
|
04/15/1997
|
Title:
|
SYSTEMS AND METHODS FOR DETERMINING SEMICONDUCTOR WAFER TEMPERATURE AND CALIBRATING A VAPOR DEPOSITION DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/1998
|
Application #:
|
08837530
|
Filing Dt:
|
04/21/1997
|
Title:
|
BALL GRID ARRAY PACKAGE EMPLOYING RAISED METAL CONTACT RINGS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/1998
|
Application #:
|
08837570
|
Filing Dt:
|
04/21/1997
|
Title:
|
LOW PROFILE VARIABLE WIDTH INPUT/OUTPUT CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/1999
|
Application #:
|
08837618
|
Filing Dt:
|
04/21/1997
|
Title:
|
SEMICONDUCTOR DIE HAVING SACRIFICIAL BOND PADS FOR DIE TEST
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/1998
|
Application #:
|
08837685
|
Filing Dt:
|
04/21/1997
|
Title:
|
BALL GRID ARRAY PACKAGE EMPLOYING SOLID CORE SOLDER BALLS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2001
|
Application #:
|
08838536
|
Filing Dt:
|
04/09/1997
|
Title:
|
CIRCUIT AND METHOD FOR PROVIDING INTERCONNECTIONS AMONG INDIVIDUAL INTEGRATED CIRCUIT CHIPS IN A MULTI- CHIP MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/1999
|
Application #:
|
08839103
|
Filing Dt:
|
04/23/1997
|
Title:
|
GATE ARRAY LAYOUT TO ACCOMMODATE MULTI ANGLE ION IMPLANTATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2001
|
Application #:
|
08840948
|
Filing Dt:
|
04/21/1997
|
Title:
|
CAPACITORS WITH SILICIZED POLYSILICON SHIELDING IN DIGITAL CMOS PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/1998
|
Application #:
|
08841298
|
Filing Dt:
|
04/29/1997
|
Title:
|
SYSTEMS AND METHODS FOR DETERMINING CHARACTERISTICS OF A SINGULAR CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/1999
|
Application #:
|
08841947
|
Filing Dt:
|
04/08/1997
|
Title:
|
PRE-CONDITIONING POLISHING PADS FOR CHEMICAL-MECHANICAL POLISHING
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2000
|
Application #:
|
08842379
|
Filing Dt:
|
04/23/1997
|
Title:
|
HIGH POWER DISSIPATING TAPE BALL GRID ARRAY PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/1999
|
Application #:
|
08843427
|
Filing Dt:
|
04/15/1997
|
Title:
|
FAULT SIMULATOR FOR DIGITAL CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08845696
|
Filing Dt:
|
04/25/1997
|
Title:
|
STIFFENER WITH SLOTS FOR CLIP-ON HEAT SINK ATTACHMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/1999
|
Application #:
|
08845963
|
Filing Dt:
|
04/30/1997
|
Title:
|
SYSTEMS AND METHODS FOR TESTING AND MANUFACTURING LARGE-SCALE TRANSISTOR -BASED NONLINEAR CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/1999
|
Application #:
|
08846769
|
Filing Dt:
|
04/30/1997
|
Title:
|
PHOTOSENSING DEVICE WITH IMPROVED SPECTRAL RESPONSE AND LOW TRERMAL LEAKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/1999
|
Application #:
|
08846967
|
Filing Dt:
|
04/29/1997
|
Title:
|
INTEGRATED PHOTOSENSING DEVICE FOR ACTIVE PIXEL SENSOR IMAGERS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2000
|
Application #:
|
08847704
|
Filing Dt:
|
04/28/1997
|
Title:
|
DEUTERATED DIELECTRIC AND POLYSILICON FILM-BASED SEMICONDUCTOR DEVICES AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2000
|
Application #:
|
08848109
|
Filing Dt:
|
04/28/1997
|
Title:
|
USE OF SID4 FOR DEPOSITION OF ULTRA THIN AND CONTROLLABLE OXIDES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/1999
|
Application #:
|
08848113
|
Filing Dt:
|
04/28/1997
|
Title:
|
DEUTERATED BIPOLAR TRANSISTOR AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
04/25/2000
|
Application #:
|
08848141
|
Filing Dt:
|
04/28/1997
|
Title:
|
COMPLEMENTARY FIELD EFFECT DEVICES FOR ELIMINATING OR REDUCING DIODE EFFECT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/1999
|
Application #:
|
08850076
|
Filing Dt:
|
05/02/1997
|
Title:
|
STIFFENER WITH INTEGRATED HEAT SINK ATTACHMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2000
|
Application #:
|
08850292
|
Filing Dt:
|
05/05/1997
|
Title:
|
STIFFENER RING ATTACHMENT WITH HOLES AND REMOVABLE SNAP-IN HEAT SINK OR HEATSPREADER/LID
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/1999
|
Application #:
|
08851607
|
Filing Dt:
|
05/05/1997
|
Title:
|
METHOD OF USING A TEST RETICLE TO OPTIMIZE ALIGNMENT OF INTEGRATED CIRCUIT PROCESS LAYERS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/29/1998
|
Application #:
|
08851846
|
Filing Dt:
|
05/06/1997
|
Title:
|
GAS CONTROL TECHNIQUE FOR LIMITING SURGING OF GAS INTO A CVD CHAMBER
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/1999
|
Application #:
|
08852597
|
Filing Dt:
|
05/07/1997
|
Title:
|
PBGA STIFFENER PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2000
|
Application #:
|
08853154
|
Filing Dt:
|
05/08/1997
|
Title:
|
MISREGISTRATION FIDUTIAL
|
|