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Title:
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ELECTRONIC COMONENTS WITH DOPED METAL OXIDE DIELECTRIC MATERIALS AND A PROCESS FOR MAKING ELECTRONIC COMPONENTS WITH DOPED METAL OXIDE DIELECTRIC MATERIALS
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Patent #:
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Issue Dt:
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06/05/2001
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Application #:
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09042230
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Filing Dt:
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03/13/1998
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Title:
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METHOD AND APPARATUS FOR NETLIST FILTERING AND CELL PLACEMENT
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Patent #:
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Issue Dt:
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09/19/2000
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Application #:
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09042388
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Filing Dt:
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03/12/1998
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Title:
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PROCESS FOR FABRICATING BIPOLAR AND BICMOS DEVICES
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Patent #:
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Issue Dt:
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08/15/2000
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Application #:
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09045062
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Filing Dt:
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03/19/1998
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Title:
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CORROSION SENSITIVITY STRUCTURES FOR VIAS AND CONTACT HOLES IN INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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02/22/2000
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Application #:
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09045190
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Filing Dt:
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03/20/1998
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Title:
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ESTIMATION OF VOLTAGE DROP AND CURRENT DENSITIES IN ASIC POWER SUPPLY MESH
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Patent #:
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Issue Dt:
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10/10/2000
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Application #:
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09045738
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Filing Dt:
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03/19/1998
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Title:
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RETICLE BASED SKEW LOTS
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Patent #:
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Issue Dt:
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01/11/2000
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Application #:
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09046113
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Filing Dt:
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03/20/1998
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Title:
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STRUCTURE AND METHOD FOR MEASURING INTERFACE RESISTANCE IN MULTIPLE INTERFACE CONTACTS AND VIA STRUCTURES IN SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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06/06/2000
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Application #:
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09046242
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Filing Dt:
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03/23/1998
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Title:
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ISOLATION METHOD UTILIZING A HIGH PRESSURE OXIDATION
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Patent #:
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Issue Dt:
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10/31/2000
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Application #:
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09047877
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Filing Dt:
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03/25/1998
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Title:
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PULSE REJECTION CIRCUIT MODEL PROGRAM AND TECHNIQUE IN VHDL
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Patent #:
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Issue Dt:
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03/07/2000
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Application #:
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09049531
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Filing Dt:
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03/27/1998
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Title:
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MOLD FOR NON - PHOTOLITHOGRAPHIC FABRICATION OF MICROSTRUCTURES
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Patent #:
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Issue Dt:
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09/07/1999
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Application #:
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09050711
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Filing Dt:
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03/30/1998
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Title:
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BIPOLAR TRANSISTOR WITH MOS-CONTROLLED PROTECTION FOR REVERSE-BIASED EMITTER-BASE JUNCTION
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Patent #:
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Issue Dt:
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12/25/2001
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Application #:
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09050823
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Filing Dt:
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03/30/1998
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Title:
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METHOD FOR DESIGNING APPLICATION SPECIFIC INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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01/23/2001
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Application #:
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09050824
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Filing Dt:
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03/30/1998
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Title:
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PLD/ASIC HYBRID INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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05/16/2000
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Application #:
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09052043
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Filing Dt:
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03/30/1998
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Title:
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METHOD FOR REPAIRING AN ASIC MEMORY WITH REDUNDANCY ROW AND INPUT LINES
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Patent #:
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Issue Dt:
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03/19/2002
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Application #:
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09052793
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Filing Dt:
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03/31/1998
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Title:
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METHOD OF FORMING A TRENCH CAPACITOR EXTENDING BETWEEN AN UPPER AND A LOWER INTERCONNECTS
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Patent #:
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Issue Dt:
|
05/02/2000
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Application #:
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09052851
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Filing Dt:
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03/31/1998
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Title:
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HIGH ASPECT RATIO, METAL-TO-METAL, LINEAR CAPACITOR FOR AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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07/04/2000
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Application #:
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09052884
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Filing Dt:
|
03/31/1998
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Title:
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REMOVING SOLDER FROM INTEGRATED CIRCUITS FOR FAILURE ANALYSIS
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Patent #:
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Issue Dt:
|
02/22/2000
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Application #:
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09052914
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Filing Dt:
|
03/31/1998
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Title:
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METHOD OF DETERMINING DELAY IN LOGIC CELL MODELS
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Patent #:
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Issue Dt:
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10/02/2001
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Application #:
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09053357
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Filing Dt:
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04/01/1998
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Title:
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BONDABLE ANODIZED ALUMINUM HEATSPREADER FOR SEMICONDUCTOR PACKAGES
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Patent #:
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Issue Dt:
|
03/05/2002
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Application #:
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09053833
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Filing Dt:
|
04/01/1998
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Title:
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TESTING SYNCHRONIZATION CIRCUITRY USING DIGITAL SIMULATION
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Patent #:
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Issue Dt:
|
06/13/2000
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Application #:
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09053908
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Filing Dt:
|
04/02/1998
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Title:
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CALIBRATION SAMPLE FOR PARTICLE ANALYZERS AND METHOD FOR MAKING SAME
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Patent #:
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Issue Dt:
|
12/07/1999
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Application #:
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09054279
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Filing Dt:
|
04/02/1998
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Title:
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METHOD AND SYSTEM FOR ALIGNMENT OF OPENINGS IN SEMICONDUCTOR FABRICATION
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|
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Patent #:
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Issue Dt:
|
03/16/1999
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Application #:
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09055018
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Filing Dt:
|
04/03/1998
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Title:
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LOW POWER PROGRAMMABLE FUSE STRUCTURES AND METHODS FOR MAKING THE SAME
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|
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Patent #:
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Issue Dt:
|
11/02/1999
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Application #:
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09056133
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Filing Dt:
|
04/07/1998
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Title:
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PROCESS FOR FORMING PATTERNED DIELECTRIC OXIDE FILMS
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|
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Patent #:
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|
Issue Dt:
|
06/10/2003
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Application #:
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09056555
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Filing Dt:
|
04/07/1998
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Title:
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METHOD OF FORMING SEMICONDUCTOR DEVICE WITH LDD STRUCTURE
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|
|
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Patent #:
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Issue Dt:
|
11/16/1999
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Application #:
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09057420
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Filing Dt:
|
04/08/1998
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Title:
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MEMBRANE MASK FOR PROJECTION LITHOGRAPHY
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|
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Patent #:
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Issue Dt:
|
09/26/2000
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Application #:
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09058505
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Filing Dt:
|
04/10/1998
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Title:
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BALL GRID ARRAY SEMICONDUCTOR PACKAGE HAVING IMPORVED EMI CHARACTERISTICS
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|
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Patent #:
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Issue Dt:
|
07/18/2000
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Application #:
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09058826
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Filing Dt:
|
04/13/1998
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Title:
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TEMPERATURE COMPENSATION OF LDMOS DEVICES
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|
|
|
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Patent #:
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|
Issue Dt:
|
05/16/2000
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Application #:
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09058839
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Filing Dt:
|
04/13/1998
|
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Title:
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METHOD FOR TESTING PATH DELAY FAULTS IN SEQUENTIAL LOGIC CIRCUITS
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|
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|
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Patent #:
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Issue Dt:
|
12/05/2000
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Application #:
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09059359
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Filing Dt:
|
04/13/1998
|
|
Title:
|
TRILAYER LIFTOFF PROCESS FOR SEMICONDUCTOR DEVICE METALLIZATION
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|
|
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Patent #:
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|
Issue Dt:
|
12/14/1999
|
Application #:
|
09060420
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Filing Dt:
|
04/15/1998
|
|
Title:
|
METHOD FOR MAKING FIELD EFFECT DEVICES AND CAPACITORS WITH IMPROVED THIN FILM DIELECTRICS AND RESULTING DEVICES
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|
