Total properties:
14
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2001
|
Application #:
|
09457042
|
Filing Dt:
|
12/07/1999
|
Title:
|
BRIM AND GAS ESCAPE FOR NON-CONTACT WAFER HOLDER
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2002
|
Application #:
|
09633086
|
Filing Dt:
|
08/04/2000
|
Title:
|
NON-CONTACT WORKPIECE HOLDER USING VORTEX CHUCK WITH CENTRAL GAS FLOW
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2004
|
Application #:
|
09713137
|
Filing Dt:
|
11/14/2000
|
Title:
|
PLASMA PROCESSING COMPRISING THREE ROTATIONAL MOTIONS OF AN ARTICLE BEING PROCESSED
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2003
|
Application #:
|
09904638
|
Filing Dt:
|
07/13/2001
|
Publication #:
|
|
Pub Dt:
|
01/23/2003
| | | | |
Title:
|
ARTICLES HOLDERS WITH SENSORS DETECTING A TYPE OF ARTICLE HELD BY THE HOLDER
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2004
|
Application #:
|
09952263
|
Filing Dt:
|
09/13/2001
|
Publication #:
|
|
Pub Dt:
|
03/13/2003
| | | | |
Title:
|
SEMICONDUCTOR STRUCTURES WITH CAVITIES, AND METHODS OF FABRICATION
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10375218
|
Filing Dt:
|
02/26/2003
|
Publication #:
|
|
Pub Dt:
|
10/23/2003
| | | | |
Title:
|
Clock distribution networks and conductive lines in semiconductor integrated circuits
|
|
|
Patent #:
|
|
Issue Dt:
|
12/05/2006
|
Application #:
|
10397906
|
Filing Dt:
|
03/25/2003
|
Publication #:
|
|
Pub Dt:
|
01/22/2004
| | | | |
Title:
|
DETECTION AND HANDLING OF SEMICONDUCTOR WAFERS AND WAFERS-LIKE OBJECTS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10627038
|
Filing Dt:
|
07/24/2003
|
Publication #:
|
|
Pub Dt:
|
01/29/2004
| | | | |
Title:
|
Plasma processing comprising three rotational motions of an article being processed
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2006
|
Application #:
|
10659562
|
Filing Dt:
|
09/09/2003
|
Publication #:
|
|
Pub Dt:
|
03/11/2004
| | | | |
Title:
|
ARTICLE HOLDERS WITH SENSORS DETECTING A TYPE OF ARTICLE HELD BY THE HOLDER
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10956827
|
Filing Dt:
|
10/01/2004
|
Publication #:
|
|
Pub Dt:
|
03/10/2005
| | | | |
Title:
|
Clock distribution networks and conductive lines in semiconductor integrated circuits
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11055940
|
Filing Dt:
|
02/10/2005
|
Publication #:
|
|
Pub Dt:
|
08/04/2005
| | | | |
Title:
|
Electroplating and electroless plating of conductive materials into openings, and structures obtained thereby
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11136799
|
Filing Dt:
|
05/24/2005
|
Publication #:
|
|
Pub Dt:
|
09/29/2005
| | | | |
Title:
|
Integrated circuits and packaging substrates with cavities, and attachment methods including insertion of protruding contact pads into cavities
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11253490
|
Filing Dt:
|
10/19/2005
|
Publication #:
|
|
Pub Dt:
|
04/13/2006
| | | | |
Title:
|
Attachment of integrated circuit structures and other substrates to substrates with vias
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11559805
|
Filing Dt:
|
11/14/2006
|
Publication #:
|
|
Pub Dt:
|
03/29/2007
| | | | |
Title:
|
CLOCK DISTRIBUTION NETWORKS AND CONDUCTIVE LINES IN SEMICONDUCTOR INTEGRATED CIRCUITS
|
|