Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 064245/0025 | |
| Pages: | 6 |
| | Recorded: | 07/13/2023 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
10
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Patent #:
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Issue Dt:
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06/26/2007
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Application #:
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11001302
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Filing Dt:
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12/01/2004
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Publication #:
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Pub Dt:
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06/01/2006
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Title:
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PASSIVE MAGNETIC LATCH
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Patent #:
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Issue Dt:
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04/27/2010
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Application #:
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11043626
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Filing Dt:
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01/25/2005
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Publication #:
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Pub Dt:
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02/11/2010
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Title:
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DESTRUCTOR INTEGRATED CIRCUIT CHIP, INTERPOSER ELECTRONIC DEVICE AND METHODS
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Patent #:
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Issue Dt:
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01/05/2010
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Application #:
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11252402
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Filing Dt:
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10/18/2005
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Title:
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METHODS FOR FORMING AN ANTI-TAMPER PATTERN
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Patent #:
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Issue Dt:
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02/10/2009
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Application #:
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11252403
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Filing Dt:
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10/17/2005
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Title:
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DESTRUCTOR INTEGRATED CIRCUIT CHIP, INTERPOSER ELECTRONIC DEVICE AND METHODS
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Patent #:
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Issue Dt:
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05/24/2011
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Application #:
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11944771
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Filing Dt:
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11/26/2007
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Title:
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ANTI-TAMPER MESH
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Patent #:
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Issue Dt:
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02/01/2011
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Application #:
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12368256
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Filing Dt:
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02/09/2009
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Title:
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DESTRUCTOR INTEGRATED CIRCUIT CHIP, INTERPOSER ELECTRONIC DEVICE AND METHODS
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Patent #:
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Issue Dt:
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07/22/2014
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Application #:
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12641070
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Filing Dt:
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12/17/2009
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Title:
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CHIP SCALE FIBER OPTIC TRANSMITTER, RECEIVER, TRANSCEIVER
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Patent #:
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Issue Dt:
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08/14/2012
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Application #:
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12653919
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Filing Dt:
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12/21/2009
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Title:
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METHOD FOR FORMING AN ANTI-TAMPER MESH
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Patent #:
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Issue Dt:
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09/18/2012
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Application #:
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12798733
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Filing Dt:
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04/09/2010
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Title:
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DESTRUCTOR INTEGRATED CIRCUIT CHIP, INTERPOSER ELECTRONIC DEVICE AND METHODS
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Patent #:
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Issue Dt:
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03/19/2013
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Application #:
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13045348
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Filing Dt:
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03/10/2011
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Title:
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ANTI-TAMPER MESH
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Assignee
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| 1049 CAMINO DOS RIOS |
| THOUSAND OAKS, CALIFORNIA 91360 |
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Correspondence name and address
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ARISSA SAMANIEGO
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1049 CAMINO DOS RIOS
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THOUSAND OAKS, CA 91360
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