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Reel/Frame:	037684/0039			Pages:	448
		Recorded:	02/02/2016
Attorney Dkt #:	040981-0072
Conveyance:	TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031)

Total properties: 11127
Page 66 of 112
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Patent #:	6979869	Issue Dt:	12/27/2005	Application #:	10676602	Filing Dt:	10/01/2003
Publication #:	US20050082621	Pub Dt:	04/21/2005
Title:	SUBSTRATE-BIASED I/O AND POWER ESD PROTECTION CIRCUITS IN DEEP-SUBMICRON TWIN-WELL PROCESS

Patent #:	6838379	Issue Dt:	01/04/2005	Application #:	10676934	Filing Dt:	09/30/2003
Title:	PROCESS FOR REDUCING IMPURITY LEVELS, STRESS, AND RESISTIVITY, AND INCREASING GRAIN SIZE OF COPPER FILLER IN TRENCHES AND VIAS OF INTEGRATED CIRCUIT STRUCTURES TO ENHANCE ELECTRICAL PERFORMANCE OF COPPER FILLER

Patent #:	6828653	Issue Dt:	12/07/2004	Application #:	10678245	Filing Dt:	10/03/2003
Title:	METHOD OF FORMING METAL FUSES IN CMOS PROCESSES WITH COPPER INTERCONNECT

Patent #:	6982206	Issue Dt:	01/03/2006	Application #:	10679004	Filing Dt:	10/02/2003
Title:	MECHANISM FOR IMPROVING THE STRUCTURAL INTEGRITY OF LOW-K FILMS

Patent #:	7447317	Issue Dt:	11/04/2008	Application #:	10679085	Filing Dt:	10/02/2003
Publication #:	US20050074127	Pub Dt:	04/07/2005
Title:	Compatible multi-channel coding/decoding by weighting the downmix channel

Patent #:	6797585	Issue Dt:	09/28/2004	Application #:	10680047	Filing Dt:	10/07/2003
Title:	NONINTRUSIVE WAFER MARKING

Patent #:	6972840	Issue Dt:	12/06/2005	Application #:	10680503	Filing Dt:	10/06/2003
Title:	METHOD OF REDUCING PROCESS PLASMA DAMAGE USING OPTICAL SPECTROSCOPY

Patent #:	7345245	Issue Dt:	03/18/2008	Application #:	10681554	Filing Dt:	10/08/2003
Publication #:	US20050077081	Pub Dt:	04/14/2005
Title:	ROBUST HIGH DENSITY SUBSTRATE DESIGN FOR THERMAL CYCLING RELIABILITY

Patent #:	6826719	Issue Dt:	11/30/2004	Application #:	10681655	Filing Dt:	10/08/2003
Publication #:	US20040083411	Pub Dt:	04/29/2004
Title:	CELLULAR CDMA TRANSMISSION SYSTEM

Patent #:	7111118	Issue Dt:	09/19/2006	Application #:	10681757	Filing Dt:	10/08/2003
Publication #:	US20050080990	Pub Dt:	04/14/2005
Title:	HIGH PERFORMANCE RAID MAPPING

Patent #:	7260816	Issue Dt:	08/21/2007	Application #:	10682012	Filing Dt:	10/09/2003
Publication #:	US20050081217	Pub Dt:	04/14/2005
Title:	METHOD, SYSTEM, AND PRODUCT FOR PROXY-BASED METHOD TRANSLATIONS FOR MULTIPLE DIFFERENT FIRMWARE VERSIONS

Patent #:	7421710	Issue Dt:	09/02/2008	Application #:	10682149	Filing Dt:	10/08/2003
Publication #:	US20050091441	Pub Dt:	04/28/2005
Title:	SYSTEM AND METHOD OF CREATING VIRTUAL DATA PATHS USING A MULTIPLE-PATH DRIVER

Patent #:	7440500	Issue Dt:	10/21/2008	Application #:	10682631	Filing Dt:	10/09/2003
Publication #:	US20050013362	Pub Dt:	01/20/2005
Title:	SUPPORTING MOTION VECTORS OUTSIDE PICTURE BOUNDARIES IN MOTION ESTIMATION PROCESS

Patent #:	6825563	Issue Dt:	11/30/2004	Application #:	10683101	Filing Dt:	10/09/2003
Title:	SLOTTED BONDING PAD

Patent #:	7260803	Issue Dt:	08/21/2007	Application #:	10683369	Filing Dt:	10/10/2003
Publication #:	US20050080607	Pub Dt:	04/14/2005
Title:	INCREMENTAL DUMMY METAL INSERTIONS

Patent #:	6842032	Issue Dt:	01/11/2005	Application #:	10684119	Filing Dt:	10/10/2003
Publication #:	US20040080331	Pub Dt:	04/29/2004
Title:	IDDQ TEST METHODOLOGY BASED ON THE SENSITIVITY OF FAULT CURRENT TO POWER SUPPLY VARIATIONS

Patent #:	7056783	Issue Dt:	06/06/2006	Application #:	10684713	Filing Dt:	10/14/2003
Publication #:	US20050048709	Pub Dt:	03/03/2005
Title:	MULTIPLE OPERATING VOLTAGE VERTICAL REPLACEMENT-GATE (VRG) TRANSISTOR

Patent #:	6988251	Issue Dt:	01/17/2006	Application #:	10684733	Filing Dt:	10/14/2003
Publication #:	US20050078544	Pub Dt:	04/14/2005
Title:	EFFICIENT IMPLEMENTATION OF MULTIPLE CLOCK DOMAIN ACCESSES TO DIFFUSED MEMORIES IN STRUCTURED ASICS

Patent #:	7400690	Issue Dt:	07/15/2008	Application #:	10685018	Filing Dt:	10/14/2003
Publication #:	US20050078768	Pub Dt:	04/14/2005
Title:	ADAPTIVE PHASE CONTROLLER, METHOD OF CONTROLLING A PHASE AND TRANSMITTER EMPLOYING THE SAME

Patent #:	7206991	Issue Dt:	04/17/2007	Application #:	10685987	Filing Dt:	10/15/2003
Publication #:	US20050086429	Pub Dt:	04/21/2005
Title:	METHOD, APPARATUS AND PROGRAM FOR MIGRATING BETWEEN STRIPED STORAGE AND PARITY STRIPED STORAGE

Patent #:	7061267	Issue Dt:	06/13/2006	Application #:	10687991	Filing Dt:	10/17/2003
Publication #:	US20050086595	Pub Dt:	04/21/2005
Title:	PAGE BOUNDARY DETECTOR

Patent #:	6937513	Issue Dt:	08/30/2005	Application #:	10688023	Filing Dt:	10/16/2003
Title:	INTEGRATED NAND AND NOR-TYPE FLASH MEMORY DEVICE AND METHOD OF USING THE SAME

Patent #:	7005703	Issue Dt:	02/28/2006	Application #:	10688231	Filing Dt:	10/17/2003
Publication #:	US20050082610	Pub Dt:	04/21/2005
Title:	METAL-OXIDE-SEMICONDUCTOR DEVICE HAVING IMPROVED PERFORMANCE AND RELIABILITY

Patent #:	7111264	Issue Dt:	09/19/2006	Application #:	10688460	Filing Dt:	10/17/2003
Publication #:	US20050086624	Pub Dt:	04/21/2005
Title:	PROCESS AND APPARATUS FOR FAST ASSIGNMENT OF OBJECTS TO A RECTANGLE

Patent #:	7542425	Issue Dt:	06/02/2009	Application #:	10689090	Filing Dt:	10/20/2003
Publication #:	US20050005021	Pub Dt:	01/06/2005
Title:	TRAFFIC MANAGEMENT USING IN-BAND FLOW CONTROL AND MULTIPLE-RATE TRAFFIC SHAPING

Patent #:	6909591	Issue Dt:	06/21/2005	Application #:	10690861	Filing Dt:	10/22/2003
Publication #:	US20050088798	Pub Dt:	04/28/2005
Title:	COMPLIMENTARY METAL OXIDE SEMICONDUCTOR CAPACITOR AND METHOD FOR MAKING SAME

Patent #:	7324596	Issue Dt:	01/29/2008	Application #:	10690884	Filing Dt:	10/22/2003
Publication #:	US20050013367	Pub Dt:	01/20/2005
Title:	LOW COMPLEXITY BLOCK SIZE DECISION FOR VARIABLE BLOCK SIZE MOTION ESTIMATION

Patent #:	7000169	Issue Dt:	02/14/2006	Application #:	10691078	Filing Dt:	10/21/2003
Publication #:	US20040081261	Pub Dt:	04/29/2004
Title:	TURBO DECODING

Patent #:	6905909	Issue Dt:	06/14/2005	Application #:	10691400	Filing Dt:	10/22/2003
Publication #:	US20050090036	Pub Dt:	04/28/2005
Title:	ULTRA LOW DIELECTRIC CONSTANT THIN FILM

Patent #:	6870386	Issue Dt:	03/22/2005	Application #:	10691938	Filing Dt:	10/23/2003
Title:	METHOD AND APPARATUS FOR MEASURING SHEET RESISTANCE

Patent #:	7023719	Issue Dt:	04/04/2006	Application #:	10692091	Filing Dt:	10/23/2003
Title:	MEMORY MODULE HAVING MIRRORED PLACEMENT OF DRAM INTEGRATED CIRCUITS UPON A FOUR-LAYER PRINTED CIRCUIT BOARD

Patent #:	7181563	Issue Dt:	02/20/2007	Application #:	10692664	Filing Dt:	10/23/2003
Publication #:	US20050091465	Pub Dt:	04/28/2005
Title:	FIFO MEMORY WITH SINGLE PORT MEMORY MODULES FOR ALLOWING SIMULTANEOUS READ AND WRITE OPERATIONS

Patent #:	7111269	Issue Dt:	09/19/2006	Application #:	10693075	Filing Dt:	10/23/2003
Publication #:	US20050091627	Pub Dt:	04/28/2005
Title:	COMPARISON OF TWO HIERARCHICAL NETLIST TO GENERATE CHANGE ORDERS FOR UPDATING AN INTEGRATED CIRCUIT LAYOUT

Patent #:	6894524	Issue Dt:	05/17/2005	Application #:	10693078	Filing Dt:	10/23/2003
Publication #:	US20050088195	Pub Dt:	04/28/2005
Title:	DAISY CHAIN GANG TESTING

Patent #:	6927177	Issue Dt:	08/09/2005	Application #:	10693110	Filing Dt:	10/24/2003
Publication #:	US20050090121	Pub Dt:	04/28/2005
Title:	CHEMICAL MECHANICAL ELECTROPOLISHING SYSTEM

Patent #:	7036102	Issue Dt:	04/25/2006	Application #:	10694208	Filing Dt:	10/27/2003
Publication #:	US20050091625	Pub Dt:	04/28/2005
Title:	PROCESS AND APPARATUS FOR PLACEMENT OF CELLS IN AN IC DURING FLOORPLAN CREATION

Patent #:	6924674	Issue Dt:	08/02/2005	Application #:	10694246	Filing Dt:	10/27/2003
Publication #:	US20050088205	Pub Dt:	04/28/2005
Title:	COMPOSITE SOURCE FOLLOWER

Patent #:	7301107	Issue Dt:	11/27/2007	Application #:	10694611	Filing Dt:	10/27/2003
Publication #:	US20040084761	Pub Dt:	05/06/2004
Title:	SEMICONDUCTOR DEVICE HAVING REDUCED INTRA-LEVEL AND INTER-LEVEL CAPACITANCE

Patent #:	6975040	Issue Dt:	12/13/2005	Application #:	10695193	Filing Dt:	10/28/2003
Publication #:	US20050090071	Pub Dt:	04/28/2005
Title:	FABRICATING SEMICONDUCTOR CHIPS

Patent #:	6977833	Issue Dt:	12/20/2005	Application #:	10695929	Filing Dt:	10/28/2003
Publication #:	US20050088901	Pub Dt:	04/28/2005
Title:	CMOS ISOLATION CELL FOR EMBEDDED MEMORY IN POWER FAILURE ENVIRONMENTS

Patent #:	7062739	Issue Dt:	06/13/2006	Application #:	10696105	Filing Dt:	10/29/2003
Publication #:	US20050097493	Pub Dt:	05/05/2005
Title:	GATE REUSE METHODOLOGY FOR DIFFUSED CELL-BASED IP BLOCKS IN PLATFORM-BASED SILICON PRODUCTS

Patent #:	6790753	Issue Dt:	09/14/2004	Application #:	10696136	Filing Dt:	10/29/2003
Publication #:	US20040089908	Pub Dt:	05/13/2004
Title:	FIELD PLATED SCHOTTKY DIODE AND METHOD OF FABRICATION THEREFOR

Patent #:	7114143	Issue Dt:	09/26/2006	Application #:	10696203	Filing Dt:	10/29/2003
Publication #:	US20050097482	Pub Dt:	05/05/2005
Title:	PROCESS YIELD LEARNING

Patent #:	7190185	Issue Dt:	03/13/2007	Application #:	10696320	Filing Dt:	10/29/2003
Publication #:	US20050093560	Pub Dt:	05/05/2005
Title:	NEW METHODOLOGY TO MEASURE MANY MORE TRANSISTORS ON THE SAME TEST AREA

Patent #:	7057560	Issue Dt:	06/06/2006	Application #:	10696852	Filing Dt:	10/30/2003
Publication #:	US20040222923	Pub Dt:	11/11/2004
Title:	DUAL-BAND ANTENNA FOR A WIRELESS LOCAL AREA NETWORK DEVICE

Patent #:	7502390	Issue Dt:	03/10/2009	Application #:	10696912	Filing Dt:	10/30/2003
Publication #:	US20050094677	Pub Dt:	05/05/2005
Title:	OPTIMIZED INTERLEAVER AND/OR DEINTERLEAVER DESIGN

Patent #:	7107559	Issue Dt:	09/12/2006	Application #:	10697357	Filing Dt:	10/29/2003
Publication #:	US20050097488	Pub Dt:	05/05/2005
Title:	METHOD OF PARTITIONING AN INTEGRATED CIRCUIT DESIGN FOR PHYSICAL DESIGN VERIFICATION

Patent #:	7026217	Issue Dt:	04/11/2006	Application #:	10697446	Filing Dt:	10/29/2003
Title:	METHOD OF FORMING AN ANTIFUSE ON A SEMICONDUCTOR SUBSTRATE USING WET OXIDATION OF A NITRIDED SUBSTRATE

Patent #:	7323228	Issue Dt:	01/29/2008	Application #:	10697506	Filing Dt:	10/29/2003
Title:	METHOD OF VAPORIZING AND IONIZING METALS FOR USE IN SEMICONDUCTOR PROCESSING

Patent #:	7084408	Issue Dt:	08/01/2006	Application #:	10697507	Filing Dt:	10/29/2003
Title:	VAPORIZATION AND IONIZATION OF METALS FOR USE IN SEMICONDUCTOR PROCESSING

Patent #:	7206994	Issue Dt:	04/17/2007	Application #:	10697717	Filing Dt:	10/30/2003
Publication #:	US20050097433	Pub Dt:	05/05/2005
Title:	CHECKSUM CALCULATOR WITH TREE STRUCTURE OF REDUCTION STAGES

Patent #:	6987052	Issue Dt:	01/17/2006	Application #:	10697757	Filing Dt:	10/30/2003
Publication #:	US20050093097	Pub Dt:	05/05/2005
Title:	METHOD FOR MAKING ENHANCED SUBSTRATE CONTACT FOR A SEMICONDUCTOR DEVICE

Patent #:	6930362	Issue Dt:	08/16/2005	Application #:	10698167	Filing Dt:	10/30/2003
Title:	CALCIUM DOPED POLYSILICON GATE ELECTRODES

Patent #:	6989565	Issue Dt:	01/24/2006	Application #:	10698169	Filing Dt:	10/31/2003
Title:	MEMORY DEVICE HAVING AN ELECTRON TRAPPING LAYER IN A HIGH-K DIELECTRIC GATE STACK

Patent #:	6919228	Issue Dt:	07/19/2005	Application #:	10699021	Filing Dt:	10/31/2003
Publication #:	US20050092987	Pub Dt:	05/05/2005
Title:	METHODS AND APPARATUS FOR THE DETECTION OF DAMAGED REGIONS ON DIELECTRIC FILM OR OTHER PORTIONS OF A DIE

Patent #:	7277396	Issue Dt:	10/02/2007	Application #:	10699037	Filing Dt:	10/31/2003
Publication #:	US20050094565	Pub Dt:	05/05/2005
Title:	PROCESSOR WITH SCRIPT-BASED PERFORMANCE MONITORING

Patent #:	7574482	Issue Dt:	08/11/2009	Application #:	10699092	Filing Dt:	10/31/2003
Publication #:	US20050097184	Pub Dt:	05/05/2005
Title:	INTERNAL MEMORY CONTROLLER PROVIDING CONFIGURABLE ACCESS OF PROCESSOR CLIENTS TO MEMORY INSTANCES

Patent #:	6900075	Issue Dt:	05/31/2005	Application #:	10699276	Filing Dt:	10/31/2003
Publication #:	US20050093102	Pub Dt:	05/05/2005
Title:	MIXED LVR AND HVR RETICLE SET DESIGN FOR THE PROCESSING OF GATE ARRAYS, EMBEDDED ARRAYS AND RAPID CHIP PRODUCTS

Patent #:	6940768	Issue Dt:	09/06/2005	Application #:	10699932	Filing Dt:	11/04/2003
Publication #:	US20050105349	Pub Dt:	05/19/2005
Title:	PROGRAMMABLE DATA STROBE OFFSET WITH DLL FOR DOUBLE DATA RATE (DDR) RAM MEMORY

Patent #:	7536611	Issue Dt:	05/19/2009	Application #:	10700177	Filing Dt:	11/03/2003
Publication #:	US20050097383	Pub Dt:	05/05/2005
Title:	NEW HARD BISR SCHEME ALLOWING FIELD REPAIR AND USAGE OF RELIABILITY CONTROLLER

Patent #:	7532915	Issue Dt:	05/12/2009	Application #:	10700189	Filing Dt:	11/03/2003
Publication #:	US20050096106	Pub Dt:	05/05/2005
Title:	Electronic apparatus having three modes of operation

Patent #:	7003421	Issue Dt:	02/21/2006	Application #:	10700790	Filing Dt:	11/03/2003
Title:	VDD OVER AND UNDERVOLTAGE MEASUREMENT TECHNIQUES USING MONITOR CELLS

Patent #:	7023230	Issue Dt:	04/04/2006	Application #:	10700791	Filing Dt:	11/03/2003
Title:	METHOD FOR TESTING IDD AT MULTIPLE VOLTAGES

Patent #:	7376756	Issue Dt:	05/20/2008	Application #:	10701019	Filing Dt:	11/03/2003
Publication #:	US20050097236	Pub Dt:	05/05/2005
Title:	HDD FIRMWARE DOWNLOAD

Patent #:	6939727	Issue Dt:	09/06/2005	Application #:	10701328	Filing Dt:	11/03/2003
Title:	METHOD FOR PERFORMING STATISTICAL POST PROCESSING IN SEMICONDCTOR MANUFACTRING USING ID CELLS

Patent #:	7913125	Issue Dt:	03/22/2011	Application #:	10701332	Filing Dt:	11/04/2003
Publication #:	US20050097417	Pub Dt:	05/05/2005
Title:	NOVEL BISR MODE TO TEST THE REDUNDANT ELEMENTS AND REGULAR FUNCTIONAL MEMORY TO AVOID TEST ESCAPES

Patent #:	7243254	Issue Dt:	07/10/2007	Application #:	10701639	Filing Dt:	11/05/2003
Title:	LOW POWER MEMORY CONTROLLER THAT IS ADAPTABLE TO EITHER DOUBLE DATA RATE DRAM OR SINGLE DATA RATE SYNCHRONOUS DRAM CIRCUITS

Patent #:	6830943	Issue Dt:	12/14/2004	Application #:	10702165	Filing Dt:	11/04/2003
Title:	THIN FILM CMOS CALIBRATION STANDARD HAVING PROTECTIVE COVER LAYER

Patent #:	7254205	Issue Dt:	08/07/2007	Application #:	10702286	Filing Dt:	11/06/2003
Publication #:	US20040066870	Pub Dt:	04/08/2004
Title:	SIGNAL PROCESSING METHOD AND APPARATUS FOR ENSURING A DESIRED RELATIONSHIP BETWEEN SIGNALS

Patent #:	7314781	Issue Dt:	01/01/2008	Application #:	10702875	Filing Dt:	11/05/2003
Publication #:	US20060172456	Pub Dt:	08/03/2006
Title:	DEVICE PACKAGES HAVING STABLE WIREBONDS

Patent #:	7791210	Issue Dt:	09/07/2010	Application #:	10702996	Filing Dt:	11/05/2003
Publication #:	US20050093173	Pub Dt:	05/05/2005
Title:	SEMICONDUCTOR PACKAGE HAVING DISCRETE NON-ACTIVE ELECTRICAL COMPONENTS INCORPORATED INTO THE PACKAGE

Patent #:	7106219	Issue Dt:	09/12/2006	Application #:	10704040	Filing Dt:	11/07/2003
Publication #:	US20050099321	Pub Dt:	05/12/2005
Title:	DECENTRALIZED VEHICULAR TRAFFIC STATUS SYSTEM

Patent #:	6977128	Issue Dt:	12/20/2005	Application #:	10704449	Filing Dt:	11/07/2003
Publication #:	US20040094847	Pub Dt:	05/20/2004
Title:	MULTI-LAYERED SEMICONDUCTOR STRUCTURE

Patent #:	7082589	Issue Dt:	07/25/2006	Application #:	10704922	Filing Dt:	11/10/2003
Publication #:	US20050102645	Pub Dt:	05/12/2005
Title:	METHOD OF GENERATING A SCHEMATIC DRIVEN LAYOUT FOR A HIERARCHICAL INTEGRATED CIRCUIT DESIGN

Patent #:	6957162	Issue Dt:	10/18/2005	Application #:	10705638	Filing Dt:	11/10/2003
Publication #:	US20050114576	Pub Dt:	05/26/2005
Title:	LOW-IMPACT ANALYZER INTERFACE

Patent #:	7400543	Issue Dt:	07/15/2008	Application #:	10706110	Filing Dt:	11/12/2003
Publication #:	US20050099864	Pub Dt:	05/12/2005
Title:	METAL PROGRAMMABLE SELF-TIMED MEMORIES

Patent #:	6855586	Issue Dt:	02/15/2005	Application #:	10706120	Filing Dt:	11/12/2003
Publication #:	US20040104436	Pub Dt:	06/03/2004
Title:	LOW VOLTAGE BREAKDOWN ELEMENT FOR ESD TRIGGER DEVICE

Patent #:	7409602	Issue Dt:	08/05/2008	Application #:	10706127	Filing Dt:	11/12/2003
Publication #:	US20050102583	Pub Dt:	05/12/2005
Title:	METHODOLOGY FOR DEBUGGING RTL SIMULATIONS OF PROCESSOR BASED SYSTEM ON CHIP

Patent #:	7254002	Issue Dt:	08/07/2007	Application #:	10706467	Filing Dt:	11/12/2003
Publication #:	US20050099748	Pub Dt:	05/12/2005
Title:	REVERSE CONDUCTION PROTECTION METHOD AND APPARATUS FOR A DUAL POWER SUPPLY DRIVER

Patent #:	7415543	Issue Dt:	08/19/2008	Application #:	10706623	Filing Dt:	11/12/2003
Publication #:	US20050102433	Pub Dt:	05/12/2005
Title:	SERIAL PORT INITIALIZATION IN STORAGE SYSTEM CONTROLLERS

Patent #:	7899059	Issue Dt:	03/01/2011	Application #:	10706724	Filing Dt:	11/12/2003
Publication #:	US20050100022	Pub Dt:	05/12/2005
Title:	MEDIA DELIVERY USING QUALITY OF SERVICE DIFFERENTIATION WITHIN A MEDIA STREAM

Patent #:	7409561	Issue Dt:	08/05/2008	Application #:	10709967	Filing Dt:	06/09/2004
Title:	PIRACY PROTECTION FOR COMBINED HARDWARE/SOFTWARE PRODUCTS

Patent #:	7778168	Issue Dt:	08/17/2010	Application #:	10710772	Filing Dt:	08/02/2004
Title:	QUEUING SYSTEM WITH MECHANISM TO LIMIT BLOCKING OF HIGH-PRIORITY PACKETS

Patent #:	7480740	Issue Dt:	01/20/2009	Application #:	10711783	Filing Dt:	10/05/2004
Title:	METHOD AND SYSTEM FOR ENFORCING HARDWARE/SOFTWARE COMPATIBILITY CONSTRAINTS

Patent #:	7502513	Issue Dt:	03/10/2009	Application #:	10713441	Filing Dt:	11/14/2003
Publication #:	US20050108745	Pub Dt:	05/19/2005
Title:	COMMERCIAL DETECTOR WITH A START OF ACTIVE VIDEO DETECTOR

Patent #:	7257799	Issue Dt:	08/14/2007	Application #:	10713492	Filing Dt:	11/14/2003
Publication #:	US20050108495	Pub Dt:	05/19/2005
Title:	FLEXIBLE DESIGN FOR MEMORY USE IN INTEGRATED CIRCUITS

Patent #:	7453940	Issue Dt:	11/18/2008	Application #:	10714712	Filing Dt:	11/17/2003
Publication #:	US20050013368	Pub Dt:	01/20/2005
Title:	HIGH QUALITY, LOW MEMORY BANDWIDTH MOTION ESTIMATION PROCESSOR

Patent #:	7602849	Issue Dt:	10/13/2009	Application #:	10714736	Filing Dt:	11/17/2003
Publication #:	US20050105618	Pub Dt:	05/19/2005
Title:	ADAPTIVE REFERENCE PICTURE SELECTION BASED ON INTER-PICTURE MOTION MEASUREMENT

Patent #:	7076577	Issue Dt:	07/11/2006	Application #:	10715063	Filing Dt:	11/17/2003
Publication #:	US20050108449	Pub Dt:	05/19/2005
Title:	PIPELINE SCSI NEXUS ASSOCIATIVITY CIRCUIT

Patent #:	7231467	Issue Dt:	06/12/2007	Application #:	10715746	Filing Dt:	11/17/2003
Publication #:	US20050108454	Pub Dt:	05/19/2005
Title:	METHOD AND APPARATUS FOR PROVIDING AN INTER INTEGRATED CIRCUIT INTERFACE WITH AN EXPANDED ADDRESS RANGE AND EFFICIENT PRIORITY-BASED DATA THROUGHPUT

Patent #:	6980462	Issue Dt:	12/27/2005	Application #:	10715929	Filing Dt:	11/18/2003
Title:	MEMORY CELL ARCHITECTURE FOR REDUCED ROUTING CONGESTION

Patent #:	7400683	Issue Dt:	07/15/2008	Application #:	10716222	Filing Dt:	11/18/2003
Publication #:	US20050105623	Pub Dt:	05/19/2005
Title:	DEVICE WITH VIRTUAL TILIZED IMAGE MEMORY

Patent #:	7006370	Issue Dt:	02/28/2006	Application #:	10716259	Filing Dt:	11/18/2003
Title:	MEMORY CELL ARCHITECTURE

Patent #:	6950352	Issue Dt:	09/27/2005	Application #:	10716263	Filing Dt:	11/18/2003
Title:	METHOD AND APPARATUS FOR REPLACING A DEFECTIVE CELL WITHIN A MEMORY DEVICE HAVING TWISTED BIT LINES

Patent #:	6910907	Issue Dt:	06/28/2005	Application #:	10716299	Filing Dt:	11/18/2003
Publication #:	US20050106919	Pub Dt:	05/19/2005
Title:	CONTACT FOR USE IN AN INTEGRATED CIRCUIT AND A METHOD OF MANUFACTURE THEREFOR

Patent #:	7043591	Issue Dt:	05/09/2006	Application #:	10717083	Filing Dt:	11/19/2003
Publication #:	US20050108457	Pub Dt:	05/19/2005
Title:	CROSS SWITCH SUPPORTING SIMULTANEOUS DATA TRAFFIC IN OPPOSING DIRECTIONS

Patent #:	7363000	Issue Dt:	04/22/2008	Application #:	10717728	Filing Dt:	11/20/2003
Publication #:	US20040116070	Pub Dt:	06/17/2004
Title:	METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR PROVIDING MULTI-TIERED BROADCASTING SERVICES

Patent #:	7401164	Issue Dt:	07/15/2008	Application #:	10718286	Filing Dt:	11/19/2003
Publication #:	US20050108602	Pub Dt:	05/19/2005
Title:	METHODOLOGY FOR PERFORMING REGISTER READ/WRITES TO TWO OR MORE EXPANDERS WITH A COMMON TEST PORT

Patent #:	7003753	Issue Dt:	02/21/2006	Application #:	10718291	Filing Dt:	11/19/2003
Publication #:	US20050108672	Pub Dt:	05/19/2005
Title:	METHOD OF GENERATING A PHYSICAL NETLIST FOR A HIERARCHICAL INTEGRATED CIRCUIT DESIGN

100

Patent #:	7456064	Issue Dt:	11/25/2008	Application #:	10718536	Filing Dt:	11/24/2003
Publication #:	US20040099899	Pub Dt:	05/27/2004
Title:	HIGH K DIELECTRIC MATERIAL AND METHOD OF MAKING A HIGH K DIELECTRIC MATERIAL

Assignor

DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT

Exec Dt:

02/01/2016

Assignees

LSI CORPORATION

1320 RIDDER PARK DRIVE

SAN JOSE, CALIFORNIA 95131

AGERE SYSTEMS LLC

1110 AMERICAN PARKWAY NE

ALLENTOWN, PENNSYLVANIA 18109

Correspondence name and address
	LATHAM & WATKINS LLP
	650 TOWN CENTER DRIVE, SUITE 2000
	COSTA MESA, CA 92626

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