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Total properties:
22
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Patent #:
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Issue Dt:
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11/11/1997
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Application #:
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08645630
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Filing Dt:
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05/14/1996
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Title:
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FLASH EEPROM WORLDLINE DECODER
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Patent #:
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Issue Dt:
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07/07/1998
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Application #:
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08664639
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Filing Dt:
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06/17/1996
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Title:
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FLASH MEMORY READ/WRITE CONTROLLER
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Patent #:
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Issue Dt:
|
10/13/1998
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Application #:
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08676066
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Filing Dt:
|
07/05/1996
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Title:
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FLASH MEMORY WORDLINE DECODER WITH OVERERASE REPAIR
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Patent #:
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Issue Dt:
|
06/16/1998
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Application #:
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08745034
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Filing Dt:
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11/07/1996
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Title:
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BIT-REFRESHABLE METHOD AND CIRCUIT FOR REFRESHING A NONVOLATILE FLASH MEMORY
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Patent #:
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Issue Dt:
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05/05/1998
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Application #:
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08746665
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Filing Dt:
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11/14/1996
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Title:
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OR-PLANE MEMORY CELL ARRAY FOR FLASH MEMORY WITH BIT-BASED WRITE CAPABILITY, AND METHODS FOR PROGRAMMING AND ERASING THE MEMORY CELL ARRAY
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Patent #:
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Issue Dt:
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06/30/1998
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Application #:
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08762707
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Filing Dt:
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12/09/1996
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Title:
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FLASH MEMORY WITH ROW REDUNDANCY
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Patent #:
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Issue Dt:
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12/08/1998
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Application #:
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08819323
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Filing Dt:
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03/18/1997
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Title:
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FLASH MEMORY ADDRESS DECODER WITH NOVEL LATCH STRUCTURE
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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08823571
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Filing Dt:
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03/25/1997
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Title:
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FLASH MEMORY ARRAY HAVING MAXIMUM THRESHOLD VOLTAGE DETECTION FOR ELIMATING OVER ERASURE PROBLEM AND ENCHANCING WRITE OPERATION
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Patent #:
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Issue Dt:
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06/13/2000
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Application #:
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08845272
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Filing Dt:
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04/24/1997
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Title:
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MEDIA ACCESS CONTROL RECEIVER AND NETWORK MANAGEMENT SYSTEM
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Patent #:
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Issue Dt:
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08/22/2000
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Application #:
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08845562
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Filing Dt:
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04/24/1997
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Title:
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MEDIA ACCESS CONTROL ARCHITECTURES AND NETWORK MANAGEMENT SYSTEMS
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Patent #:
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Issue Dt:
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07/04/2000
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Application #:
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08845563
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Filing Dt:
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04/24/1997
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Title:
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MEDIA ACCESS CONTROL TRANSMITTER AND PARALLEL NETWORK MANAGEMENT SYSTEM
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Patent #:
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Issue Dt:
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07/06/1999
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Application #:
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08850489
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Filing Dt:
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05/02/1997
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Title:
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FLASH MEMORY WITH NOVEL BITLINE DECODER AND SOURCELINE LATCH
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Patent #:
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Issue Dt:
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07/07/1998
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Application #:
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08872475
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Filing Dt:
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06/05/1997
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Title:
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NOVEL FLASH MEMORY ARRAY AND DECODING ARCHITECTURE
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Patent #:
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Issue Dt:
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06/29/1999
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Application #:
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08882558
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Filing Dt:
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06/25/1997
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Title:
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FLASH MEMORY WITH HIGH SPEED ERASING STRUCTURE USING THIN OXIDE SEMICONDUCTOR DEVICES
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|
|
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Patent #:
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Issue Dt:
|
01/05/1999
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Application #:
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08884926
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Filing Dt:
|
06/30/1997
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|
Title:
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NOVEL FLASH MEMORY ARRAY AND DECODING ARCHITECTURE
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|
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Patent #:
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Issue Dt:
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01/05/1999
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Application #:
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08906198
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Filing Dt:
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08/05/1997
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Title:
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METHOD FOR PREVENTING SUB-THRESHOLD LEAKAGE IN FLASH MEMORY CELLS TO ACHIEVE ACCURATE READING, VERIFYING, AND FAST OVER-ERASED VT CORRECTION
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Patent #:
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Issue Dt:
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06/22/1999
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Application #:
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08915344
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Filing Dt:
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08/22/1997
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Title:
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FLASH MEMORY WITH HIGH SPEED ERASING STRUCTURE USING THIN OXIDE AND THICK OXIDE SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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01/09/2001
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Application #:
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08968551
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Filing Dt:
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11/12/1997
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Title:
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MEDIA ACCESS CONTROL MICRO-RISC STREAM PROCESSOR AND METHOD FOR IMPLEMENTING THE SAME
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Patent #:
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Issue Dt:
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02/08/2000
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Application #:
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09232115
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Filing Dt:
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01/15/1999
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Title:
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POSITIVE/NEGATIVE HIGH VOLTAGE CHARGE PUMP SYSTEM
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Patent #:
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Issue Dt:
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03/12/2002
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Application #:
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09417930
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Filing Dt:
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10/13/1999
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Title:
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PROGRAMMABLE EVENT COUNTER SYSTEM
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Patent #:
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|
Issue Dt:
|
10/23/2001
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Application #:
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09430060
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Filing Dt:
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10/29/1999
|
|
Title:
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FLASH MEMORY ARRAY AND DECODING ARCHITECTURE
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|
|
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Patent #:
|
|
Issue Dt:
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05/21/2002
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Application #:
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09594745
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Filing Dt:
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06/13/2000
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Title:
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MEDIA ACCESS CONTROL ARCHITECTURES AND NETWORK MANAGEMENT SYSTEMS
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